1 --- a/arch/mips/ath79/mach-ap81.c
2 +++ b/arch/mips/ath79/mach-ap81.c
4 * by the Free Software Foundation.
7 -#include "machtypes.h"
9 +#include <linux/mtd/mtd.h>
10 +#include <linux/mtd/partitions.h>
13 #include "dev-gpio-buttons.h"
14 #include "dev-leds-gpio.h"
16 +#include "dev-m25p80.h"
18 +#include "dev-wmac.h"
19 +#include "machtypes.h"
21 #define AP81_GPIO_LED_STATUS 1
22 #define AP81_GPIO_LED_AOSS 3
25 #define AP81_CAL_DATA_ADDR 0x1fff1000
27 +static struct mtd_partition ap81_partitions[] = {
32 + .mask_flags = MTD_WRITEABLE,
34 + .name = "u-boot-env",
49 + .mask_flags = MTD_WRITEABLE,
53 +static struct flash_platform_data ap81_flash_data = {
54 + .parts = ap81_partitions,
55 + .nr_parts = ARRAY_SIZE(ap81_partitions),
58 static struct gpio_led ap81_leds_gpio[] __initdata = {
60 .name = "ap81:green:status",
61 @@ -67,26 +102,6 @@ static struct gpio_keys_button ap81_gpio
65 -static struct ath79_spi_controller_data ap81_spi0_data = {
66 - .cs_type = ATH79_SPI_CS_TYPE_INTERNAL,
70 -static struct spi_board_info ap81_spi_info[] = {
74 - .max_speed_hz = 25000000,
75 - .modalias = "m25p64",
76 - .controller_data = &ap81_spi0_data,
80 -static struct ath79_spi_platform_data ap81_spi_data = {
82 - .num_chipselect = 1,
85 static void __init ap81_setup(void)
87 u8 *cal_data = (u8 *) KSEG1ADDR(AP81_CAL_DATA_ADDR);
88 @@ -96,10 +111,24 @@ static void __init ap81_setup(void)
89 ath79_register_gpio_keys_polled(-1, AP81_KEYS_POLL_INTERVAL,
90 ARRAY_SIZE(ap81_gpio_keys),
92 - ath79_register_spi(&ap81_spi_data, ap81_spi_info,
93 - ARRAY_SIZE(ap81_spi_info));
94 + ath79_register_m25p80(&ap81_flash_data);
95 ath79_register_wmac(cal_data, NULL);
98 + ath79_register_mdio(0, 0x0);
100 + ath79_init_mac(ath79_eth0_data.mac_addr, cal_data, 0);
101 + ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
102 + ath79_eth0_data.speed = SPEED_100;
103 + ath79_eth0_data.duplex = DUPLEX_FULL;
104 + ath79_eth0_data.has_ar8216 = 1;
106 + ath79_init_mac(ath79_eth1_data.mac_addr, cal_data, 1);
107 + ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
108 + ath79_eth1_data.phy_mask = 0x10;
110 + ath79_register_eth(0);
111 + ath79_register_eth(1);
114 MIPS_MACHINE(ATH79_MACH_AP81, "AP81", "Atheros AP81 reference board",
115 --- a/arch/mips/ath79/Kconfig
116 +++ b/arch/mips/ath79/Kconfig
117 @@ -18,9 +18,10 @@ config ATH79_MACH_AP121
118 config ATH79_MACH_AP81
119 bool "Atheros AP81 reference board"
121 + select ATH79_DEV_ETH
122 select ATH79_DEV_GPIO_BUTTONS
123 select ATH79_DEV_LEDS_GPIO
124 - select ATH79_DEV_SPI
125 + select ATH79_DEV_M25P80
127 select ATH79_DEV_WMAC