Entry point is now configurable via a Makefile variable. Entry point is detected...
[openwrt.git] / target / linux / brcm-2.4 / patches / 009-wrt54g3g_pcmcia.patch
1 diff -urN linux.old/arch/mips/bcm947xx/pcibios.c linux.dev/arch/mips/bcm947xx/pcibios.c
2 --- linux.old/arch/mips/bcm947xx/pcibios.c 2006-04-07 21:20:59.000000000 +0200
3 +++ linux.dev/arch/mips/bcm947xx/pcibios.c 2006-04-08 03:17:59.000000000 +0200
4 @@ -157,6 +157,7 @@
5
6 static u32 pci_iobase = 0x100;
7 static u32 pci_membase = SB_PCI_DMA;
8 +static u32 pcmcia_membase = 0x40004000;
9
10 void __init
11 pcibios_fixup_bus(struct pci_bus *b)
12 @@ -188,7 +189,7 @@
13 /* Fix up resource bases */
14 for (pos = 0; pos < 6; pos++) {
15 res = &d->resource[pos];
16 - base = (res->flags & IORESOURCE_IO) ? &pci_iobase : &pci_membase;
17 + base = (res->flags & IORESOURCE_IO) ? &pci_iobase : ((b->number == 2) ? &pcmcia_membase : &pci_membase);
18 if (res->end) {
19 size = res->end - res->start + 1;
20 if (*base & (size - 1))
21 @@ -308,7 +309,12 @@
22 where = PCI_BASE_ADDRESS_0 + (resource * 4);
23 size = res->end - res->start;
24 pci_read_config_dword(dev, where, &reg);
25 - reg = (reg & size) | (((u32)(res->start - root->start)) & ~size);
26 +
27 + if (dev->bus->number == 1)
28 + reg = (reg & size) | (((u32)(res->start - root->start)) & ~size);
29 + else
30 + reg = res->start;
31 +
32 pci_write_config_dword(dev, where, reg);
33 }
34
35 diff -urN linux.old/drivers/pcmcia/yenta.c linux.dev/drivers/pcmcia/yenta.c
36 --- linux.old/drivers/pcmcia/yenta.c 2004-11-17 12:54:21.000000000 +0100
37 +++ linux.dev/drivers/pcmcia/yenta.c 2006-04-11 17:47:45.000000000 +0200
38 @@ -543,6 +543,9 @@
39 * Probe for usable interrupts using the force
40 * register to generate bogus card status events.
41 */
42 +
43 +#ifndef CONFIG_BCM947XX
44 + /* WRT54G3G does not like this */
45 cb_writel(socket, CB_SOCKET_EVENT, -1);
46 cb_writel(socket, CB_SOCKET_MASK, CB_CSTSMASK);
47 exca_writeb(socket, I365_CSCINT, 0);
48 @@ -557,7 +560,8 @@
49 }
50 cb_writel(socket, CB_SOCKET_MASK, 0);
51 exca_writeb(socket, I365_CSCINT, 0);
52 -
53 +#endif
54 +
55 mask = probe_irq_mask(val) & 0xffff;
56
57 bridge_ctrl &= ~CB_BRIDGE_INTR;
58 @@ -578,6 +582,12 @@
59 socket->cap.cb_dev = socket->dev;
60 socket->cap.bus = NULL;
61
62 +#ifdef CONFIG_BCM947XX
63 + /* irq mask probing is broken for the WRT54G3G */
64 + if (socket->cap.irq_mask == 0)
65 + socket->cap.irq_mask = 0x6f8;
66 +#endif
67 +
68 printk(KERN_INFO "Yenta ISA IRQ mask 0x%04x, PCI irq %d\n",
69 socket->cap.irq_mask, socket->cb_irq);
70 }
71 @@ -609,6 +619,15 @@
72 printk(KERN_INFO "Socket status: %08x\n",
73 cb_readl(socket, CB_SOCKET_STATE));
74
75 + /* Generate an interrupt on card insert/remove */
76 + config_writew(socket, CB_SOCKET_MASK, CB_CSTSMASK | CB_CDMASK);
77 +
78 + /* Set up Multifunction Routing Status Register */
79 + config_writew(socket, 0x8C, 0x1000 /* MFUNC3 to GPIO3 */ | 0x2 /* MFUNC0 to INTA */);
80 +
81 + /* Switch interrupts to parallelized */
82 + config_writeb(socket, 0x92, 0x64);
83 +
84 /* Register it with the pcmcia layer.. */
85 cardbus_register(socket);
86
87 @@ -731,7 +750,7 @@
88 {
89 struct pci_bus *bus;
90 struct resource *root, *res;
91 - u32 start, end;
92 + u32 start = 0, end = 0;
93 u32 align, size, min, max;
94 unsigned offset;
95 unsigned mask;
96 @@ -750,6 +769,15 @@
97 res->end = 0;
98 root = pci_find_parent_resource(socket->dev, res);
99
100 +#ifdef CONFIG_BCM947XX
101 + /* default mem resources are completely fscked up on the wrt54g3g */
102 + /* bypass the entire resource allocation stuff below and just set it statically */
103 + if (type & IORESOURCE_MEM) {
104 + res->start = 0x40004000;
105 + res->end = res->start + 0x3fff;
106 + }
107 +
108 +#else
109 if (!root)
110 return;
111
112 @@ -794,6 +822,7 @@
113 res->start = res->end = 0;
114 return;
115 }
116 +#endif
117
118 config_writel(socket, offset, res->start);
119 config_writel(socket, offset+4, res->end);
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