update layer7 patches to 2.1 with --l7pkt mod
[openwrt.git] / openwrt / target / linux / ar7-2.4 / patches / 005-wdt_driver.patch
1 diff -ruN linux-2.4.30-patch006/drivers/char/ar7_wdt.c linux-2.4.30-patch007/drivers/char/ar7_wdt.c
2 --- linux-2.4.30-patch006/drivers/char/ar7_wdt.c 1970-01-01 01:00:00.000000000 +0100
3 +++ linux-2.4.30-patch007/drivers/char/ar7_wdt.c 2005-10-27 09:39:40.000000000 +0200
4 @@ -0,0 +1,335 @@
5 +/* linux/drivers/char/ar7_wdt.c
6 +
7 + TI AR7 watch dog timer support
8 +
9 + Copyright (c) 2005 Enrik Berkhan <Enrik.Berkhan@akk.org>
10 +
11 + Som code taken from:
12 + National Semiconductor SCx200 Watchdog support
13 + Copyright (c) 2001,2002 Christer Weinigel <wingel@nano-system.com>
14 +
15 + This program is free software; you can redistribute it and/or
16 + modify it under the terms of the GNU General Public License as
17 + published by the Free Software Foundation; either version 2 of the
18 + License, or (at your option) any later version.
19 +
20 + The author(s) of this software shall not be held liable for damages
21 + of any nature resulting due to the use of this software. This
22 + software is provided AS-IS with no warranties. */
23 +
24 +#include <linux/config.h>
25 +#include <linux/module.h>
26 +#include <linux/errno.h>
27 +#include <linux/kernel.h>
28 +#include <linux/init.h>
29 +#include <linux/miscdevice.h>
30 +#include <linux/watchdog.h>
31 +#include <linux/notifier.h>
32 +#include <linux/reboot.h>
33 +#include <linux/ioport.h>
34 +
35 +#include <asm/uaccess.h>
36 +
37 +#include <asm/ar7/avalanche_misc.h>
38 +#include <asm/ar7/sangam.h>
39 +
40 +#define NAME "ar7_wdt"
41 +#define LONGNAME "TI AR7 Watchdog Timer"
42 +
43 +MODULE_AUTHOR("Enrik Berkhan <Enrik.Berkhan@akk.org>");
44 +MODULE_DESCRIPTION(LONGNAME);
45 +MODULE_LICENSE("GPL");
46 +
47 +#ifndef CONFIG_WATCHDOG_NOWAYOUT
48 +#define CONFIG_WATCHDOG_NOWAYOUT 0
49 +#endif
50 +
51 +static int margin = 60;
52 +MODULE_PARM(margin, "i");
53 +MODULE_PARM_DESC(margin, "Watchdog margin in seconds (1 - ~68)");
54 +
55 +static int nowayout = CONFIG_WATCHDOG_NOWAYOUT;
56 +MODULE_PARM(nowayout, "i");
57 +MODULE_PARM_DESC(nowayout, "Disable watchdog shutdown on close");
58 +
59 +typedef struct {
60 + uint32_t kick_lock;
61 + uint32_t kick;
62 + uint32_t change_lock;
63 + uint32_t change ;
64 + uint32_t disable_lock;
65 + uint32_t disable;
66 + uint32_t prescale_lock;
67 + uint32_t prescale;
68 +} ar7_wdt_t;
69 +
70 +volatile ar7_wdt_t *ar7_wdt = (ar7_wdt_t *)AVALANCHE_WATCHDOG_TIMER_BASE;
71 +
72 +static struct semaphore open_semaphore;
73 +static unsigned expect_close;
74 +
75 +/* XXX correct? assumed to be sysfreq/2. get this dynamically ... */
76 +#define vbus_freq 62500000
77 +
78 +/* XXX currently fixed, allows max margin ~68.72 secs */
79 +#define prescale_value 0xFFFF
80 +
81 +static void ar7_wdt_kick(uint32_t value)
82 +{
83 + ar7_wdt->kick_lock = 0x5555;
84 + if ((ar7_wdt->kick_lock & 3) == 1) {
85 + ar7_wdt->kick_lock = 0xAAAA;
86 + if ((ar7_wdt->kick_lock & 3) == 3) {
87 + ar7_wdt->kick = value;
88 + return;
89 + }
90 + }
91 + printk(KERN_ERR NAME "failed to unlock WDT kick reg\n");
92 +}
93 +
94 +static void ar7_wdt_prescale(uint32_t value)
95 +{
96 + ar7_wdt->prescale_lock = 0x5A5A;
97 + if ((ar7_wdt->prescale_lock & 3) == 1) {
98 + ar7_wdt->prescale_lock = 0xA5A5;
99 + if ((ar7_wdt->prescale_lock & 3) == 3) {
100 + ar7_wdt->prescale = value;
101 + return;
102 + }
103 + }
104 + printk(KERN_ERR NAME "failed to unlock WDT prescale reg\n");
105 +}
106 +
107 +static void ar7_wdt_change(uint32_t value)
108 +{
109 + ar7_wdt->change_lock = 0x6666;
110 + if ((ar7_wdt->change_lock & 3) == 1) {
111 + ar7_wdt->change_lock = 0xBBBB;
112 + if ((ar7_wdt->change_lock & 3) == 3) {
113 + ar7_wdt->change = value;
114 + return;
115 + }
116 + }
117 + printk(KERN_ERR NAME "failed to unlock WDT change reg\n");
118 +}
119 +
120 +static void ar7_wdt_disable(uint32_t value)
121 +{
122 + ar7_wdt->disable_lock = 0x7777;
123 + if ((ar7_wdt->disable_lock & 3) == 1) {
124 + ar7_wdt->disable_lock = 0xCCCC;
125 + if ((ar7_wdt->disable_lock & 3) == 2) {
126 + ar7_wdt->disable_lock = 0xDDDD;
127 + if ((ar7_wdt->disable_lock & 3) == 3) {
128 + ar7_wdt->disable = value;
129 + return;
130 + }
131 + }
132 + }
133 + printk(KERN_ERR NAME "failed to unlock WDT disable reg\n");
134 + return;
135 +}
136 +
137 +static void ar7_wdt_update_margin(int new_margin)
138 +{
139 + uint32_t change;
140 +
141 + change = new_margin * (vbus_freq / prescale_value);
142 + if (change < 1) change = 1;
143 + if (change > 0xFFFF) change = 0xFFFF;
144 + ar7_wdt_change(change);
145 + margin = change * prescale_value / vbus_freq;
146 + printk(KERN_INFO NAME
147 + ": timer margin %d seconds (prescale %d, change %d, freq %d)\n",
148 + margin, prescale_value, change, vbus_freq);
149 +}
150 +
151 +static void ar7_wdt_enable_wdt(void)
152 +{
153 + printk(KERN_DEBUG NAME ": enabling watchdog timer\n");
154 + ar7_wdt_disable(1);
155 + ar7_wdt_kick(1);
156 +}
157 +
158 +static void ar7_wdt_disable_wdt(void)
159 +{
160 + printk(KERN_DEBUG NAME ": disabling watchdog timer\n");
161 + ar7_wdt_disable(0);
162 +}
163 +
164 +static int ar7_wdt_open(struct inode *inode, struct file *file)
165 +{
166 + /* only allow one at a time */
167 + if (down_trylock(&open_semaphore))
168 + return -EBUSY;
169 + ar7_wdt_enable_wdt();
170 + expect_close = 0;
171 +
172 + return 0;
173 +}
174 +
175 +static int ar7_wdt_release(struct inode *inode, struct file *file)
176 +{
177 + if (!expect_close) {
178 + printk(KERN_WARNING NAME ": watchdog device closed unexpectedly, will not disable the watchdog timer\n");
179 + } else if (!nowayout) {
180 + ar7_wdt_disable_wdt();
181 + }
182 + up(&open_semaphore);
183 +
184 + return 0;
185 +}
186 +
187 +static int ar7_wdt_notify_sys(struct notifier_block *this,
188 + unsigned long code, void *unused)
189 +{
190 + if (code == SYS_HALT || code == SYS_POWER_OFF)
191 + if (!nowayout)
192 + ar7_wdt_disable_wdt();
193 +
194 + return NOTIFY_DONE;
195 +}
196 +
197 +static struct notifier_block ar7_wdt_notifier =
198 +{
199 + .notifier_call = ar7_wdt_notify_sys
200 +};
201 +
202 +static ssize_t ar7_wdt_write(struct file *file, const char *data,
203 + size_t len, loff_t *ppos)
204 +{
205 + if (ppos != &file->f_pos)
206 + return -ESPIPE;
207 +
208 + /* check for a magic close character */
209 + if (len)
210 + {
211 + size_t i;
212 +
213 + ar7_wdt_kick(1);
214 +
215 + expect_close = 0;
216 + for (i = 0; i < len; ++i) {
217 + char c;
218 + if (get_user(c, data+i))
219 + return -EFAULT;
220 + if (c == 'V')
221 + expect_close = 1;
222 + }
223 +
224 + }
225 + return len;
226 +}
227 +
228 +static int ar7_wdt_ioctl(struct inode *inode, struct file *file,
229 + unsigned int cmd, unsigned long arg)
230 +{
231 + static struct watchdog_info ident = {
232 + .identity = LONGNAME,
233 + .firmware_version = 1,
234 + .options = (WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING),
235 + };
236 + int new_margin;
237 +
238 + switch (cmd) {
239 + default:
240 + return -ENOTTY;
241 + case WDIOC_GETSUPPORT:
242 + if(copy_to_user((struct watchdog_info *)arg, &ident,
243 + sizeof(ident)))
244 + return -EFAULT;
245 + return 0;
246 + case WDIOC_GETSTATUS:
247 + case WDIOC_GETBOOTSTATUS:
248 + if (put_user(0, (int *)arg))
249 + return -EFAULT;
250 + return 0;
251 + case WDIOC_KEEPALIVE:
252 + ar7_wdt_kick(1);
253 + return 0;
254 + case WDIOC_SETTIMEOUT:
255 + if (get_user(new_margin, (int *)arg))
256 + return -EFAULT;
257 + if (new_margin < 1)
258 + return -EINVAL;
259 +
260 + ar7_wdt_update_margin(new_margin);
261 + ar7_wdt_kick(1);
262 +
263 + case WDIOC_GETTIMEOUT:
264 + if (put_user(margin, (int *)arg))
265 + return -EFAULT;
266 + return 0;
267 + }
268 +}
269 +
270 +static struct file_operations ar7_wdt_fops = {
271 + .owner = THIS_MODULE,
272 + .write = ar7_wdt_write,
273 + .ioctl = ar7_wdt_ioctl,
274 + .open = ar7_wdt_open,
275 + .release = ar7_wdt_release,
276 +};
277 +
278 +static struct miscdevice ar7_wdt_miscdev = {
279 + .minor = WATCHDOG_MINOR,
280 + .name = "watchdog",
281 + .fops = &ar7_wdt_fops,
282 +};
283 +
284 +static __initdata char *last_initiator[] = {
285 + [HARDWARE_RESET] = "hardware reset",
286 + [SOFTWARE_RESET0] = "SW0 software reset",
287 + [SOFTWARE_RESET1] = "SW1 software reset",
288 + [WATCHDOG_RESET] = "watchdog"
289 +};
290 +
291 +static int __init ar7_wdt_init(void)
292 +{
293 + int r;
294 +
295 + if (!request_mem_region(AVALANCHE_WATCHDOG_TIMER_BASE,
296 + sizeof(ar7_wdt_t), LONGNAME)) {
297 + printk(KERN_WARNING NAME ": watchdog I/O region busy\n");
298 + return -EBUSY;
299 + }
300 +
301 + printk(KERN_INFO NAME ": last system reset initiated by %s\n",
302 + last_initiator[avalanche_get_sys_last_reset_status()]);
303 +
304 +
305 + ar7_wdt_disable_wdt();
306 + ar7_wdt_prescale(prescale_value);
307 + ar7_wdt_update_margin(margin);
308 +
309 + sema_init(&open_semaphore, 1);
310 +
311 + r = misc_register(&ar7_wdt_miscdev);
312 + if (r) {
313 + printk(KERN_ERR NAME ": unable to register misc device\n");
314 + release_mem_region(AVALANCHE_WATCHDOG_TIMER_BASE,
315 + sizeof(ar7_wdt_t));
316 + return r;
317 + }
318 +
319 + r = register_reboot_notifier(&ar7_wdt_notifier);
320 + if (r) {
321 + printk(KERN_ERR NAME ": unable to register reboot notifier\n");
322 + misc_deregister(&ar7_wdt_miscdev);
323 + release_mem_region(AVALANCHE_WATCHDOG_TIMER_BASE,
324 + sizeof(ar7_wdt_t));
325 + return r;
326 + }
327 +
328 + return 0;
329 +}
330 +
331 +static void __exit ar7_wdt_cleanup(void)
332 +{
333 + unregister_reboot_notifier(&ar7_wdt_notifier);
334 + misc_deregister(&ar7_wdt_miscdev);
335 + release_mem_region(AVALANCHE_WATCHDOG_TIMER_BASE, sizeof(ar7_wdt_t));
336 +}
337 +
338 +module_init(ar7_wdt_init);
339 +module_exit(ar7_wdt_cleanup);
340 diff -ruN linux-2.4.30-patch006/drivers/char/Config.in linux-2.4.30-patch007/drivers/char/Config.in
341 --- linux-2.4.30-patch006/drivers/char/Config.in 2005-10-27 11:25:29.000000000 +0200
342 +++ linux-2.4.30-patch007/drivers/char/Config.in 2005-10-27 11:17:32.000000000 +0200
343 @@ -251,6 +251,9 @@
344 bool 'Watchdog Timer Support' CONFIG_WATCHDOG
345 if [ "$CONFIG_WATCHDOG" != "n" ]; then
346 bool ' Disable watchdog shutdown on close' CONFIG_WATCHDOG_NOWAYOUT
347 + if [ "$CONFIG_AR7" = "y" ] ; then
348 + tristate ' TI AR7 Watchdog Timer' CONFIG_AR7_WDT
349 + else
350 tristate ' Acquire SBC Watchdog Timer' CONFIG_ACQUIRE_WDT
351 tristate ' Advantech SBC Watchdog Timer' CONFIG_ADVANTECH_WDT
352 tristate ' ALi M7101 PMU on ALi 1535D+ Watchdog Timer' CONFIG_ALIM1535_WDT
353 @@ -271,7 +274,6 @@
354 tristate ' SBC-60XX Watchdog Timer' CONFIG_60XX_WDT
355 dep_tristate ' SC1200 Watchdog Timer (EXPERIMENTAL)' CONFIG_SC1200_WDT $CONFIG_EXPERIMENTAL
356 tristate ' NatSemi SCx200 Watchdog' CONFIG_SCx200_WDT
357 - tristate ' Software Watchdog' CONFIG_SOFT_WATCHDOG
358 tristate ' W83877F (EMACS) Watchdog Timer' CONFIG_W83877F_WDT
359 tristate ' WDT Watchdog timer' CONFIG_WDT
360 tristate ' WDT PCI Watchdog timer' CONFIG_WDTPCI
361 @@ -282,6 +284,8 @@
362 fi
363 fi
364 tristate ' ZF MachZ Watchdog' CONFIG_MACHZ_WDT
365 + fi
366 + tristate ' Software Watchdog' CONFIG_SOFT_WATCHDOG
367 if [ "$CONFIG_SGI_IP22" = "y" ]; then
368 dep_tristate ' Indy/I2 Hardware Watchdog' CONFIG_INDYDOG $CONFIG_SGI_IP22
369 fi
370 diff -ruN linux-2.4.30-patch006/drivers/char/Makefile linux-2.4.30-patch007/drivers/char/Makefile
371 --- linux-2.4.30-patch006/drivers/char/Makefile 2005-10-27 11:19:38.000000000 +0200
372 +++ linux-2.4.30-patch007/drivers/char/Makefile 2005-10-27 09:39:40.000000000 +0200
373 @@ -342,6 +342,7 @@
374 obj-$(CONFIG_SOFT_WATCHDOG) += softdog.o
375 obj-$(CONFIG_INDYDOG) += indydog.o
376 obj-$(CONFIG_8xx_WDT) += mpc8xx_wdt.o
377 +obj-$(CONFIG_AR7_WDT) += ar7_wdt.o
378
379 subdir-$(CONFIG_MWAVE) += mwave
380 ifeq ($(CONFIG_MWAVE),y)
381 diff -ruN linux-2.4.30-patch006/include/asm-mips/ar7/sangam.h linux-2.4.30-patch007/include/asm-mips/ar7/sangam.h
382 --- linux-2.4.30-patch006/include/asm-mips/ar7/sangam.h 2005-10-27 11:25:51.000000000 +0200
383 +++ linux-2.4.30-patch007/include/asm-mips/ar7/sangam.h 2005-10-27 11:13:37.000000000 +0200
384 @@ -152,7 +152,7 @@
385 #define AVALANCHE_EMIF_SDRAM_CFG (AVALANCHE_EMIF_CONTROL_BASE + 0x8)
386 #define AVALANCHE_RST_CTRL_PRCR (KSEG1ADDR(0x08611600))
387 #define AVALANCHE_RST_CTRL_SWRCR (KSEG1ADDR(0x08611604))
388 -#define AVALANCHE_RST_CTRL_RSR (KSEG1ADDR(0x08611600))
389 +#define AVALANCHE_RST_CTRL_RSR (KSEG1ADDR(0x08611608))
390
391 #define AVALANCHE_POWER_CTRL_PDCR (KSEG1ADDR(0x08610A00))
392 #define AVALANCHE_WAKEUP_CTRL_WKCR (KSEG1ADDR(0x08610A0C))
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