target/linux/s3c24xx/patches-2.6.26/1227-fix-s3c2410-serial-fwd-ref.patch.patch.patch

   1 From 0535fda1958587000a4abe711a50d221e0f82379 Mon Sep 17 00:00:00 2001
   2 From: Andy Green <andy@openmoko.com>
   3 Date: Fri, 25 Jul 2008 23:16:57 +0100
   4 Subject: [PATCH] fix-s3c2410-serial-fwd-ref.patch.patch
   5
   6 Signed-off-by: Andy Green <andy@openmoko.com>
   7 ---
   8  drivers/serial/s3c2410.c |  129 +++++++++++++++++++++++----------------------
   9  1 files changed, 66 insertions(+), 63 deletions(-)
  10
  11 diff --git a/drivers/serial/s3c2410.c b/drivers/serial/s3c2410.c
  12 index f20f63b..b4833bd 100644
  13 --- a/drivers/serial/s3c2410.c
  14 +++ b/drivers/serial/s3c2410.c
  15 @@ -1167,6 +1167,10 @@ static int s3c24xx_serial_resume(struct platform_device *dev)
  16  #define s3c24xx_serial_resume  NULL
  17  #endif
  18
  19 +static void s3c24xx_serial_force_debug_port_up(void);
  20 +static void s3c2410_printascii(const char *sz);
  21 +
  22 +
  23  static int s3c24xx_serial_init(struct platform_driver *drv,
  24                                struct s3c24xx_uart_info *info)
  25  {
  26 @@ -1521,6 +1525,68 @@ static struct platform_driver s3c2440_serial_drv = {
  27  };
  28
  29
  30 +static void s3c24xx_serial_force_debug_port_up(void)
  31 +{
  32 +       struct s3c24xx_uart_port *ourport = &s3c24xx_serial_ports[
  33 +                                                        CONFIG_DEBUG_S3C_UART];
  34 +       struct s3c24xx_uart_clksrc *clksrc = NULL;
  35 +       struct clk *clk = NULL;
  36 +       unsigned long tmp;
  37 +
  38 +       s3c24xx_serial_getclk(&ourport->port, &clksrc, &clk, 115200);
  39 +
  40 +       tmp = __raw_readl(S3C2410_CLKCON);
  41 +
  42 +       /* re-start uart clocks */
  43 +       tmp |= S3C2410_CLKCON_UART0;
  44 +       tmp |= S3C2410_CLKCON_UART1;
  45 +       tmp |= S3C2410_CLKCON_UART2;
  46 +
  47 +       __raw_writel(tmp, S3C2410_CLKCON);
  48 +       udelay(10);
  49 +
  50 +       s3c24xx_serial_setsource(&ourport->port, clksrc);
  51 +
  52 +       if (ourport->baudclk != NULL && !IS_ERR(ourport->baudclk)) {
  53 +               clk_disable(ourport->baudclk);
  54 +               ourport->baudclk  = NULL;
  55 +       }
  56 +
  57 +       clk_enable(clk);
  58 +
  59 +       ourport->clksrc = clksrc;
  60 +       ourport->baudclk = clk;
  61 +}
  62 +
  63 +static void s3c2410_printascii(const char *sz)
  64 +{
  65 +       struct s3c24xx_uart_port *ourport = &s3c24xx_serial_ports[
  66 +                                                        CONFIG_DEBUG_S3C_UART];
  67 +       struct uart_port *port = &ourport->port;
  68 +
  69 +       /* 8 N 1 */
  70 +       wr_regl(port, S3C2410_ULCON, (rd_regl(port, S3C2410_ULCON)) | 3);
  71 +       /* polling mode */
  72 +       wr_regl(port, S3C2410_UCON, (rd_regl(port, S3C2410_UCON) & ~0xc0f) | 5);
  73 +       /* disable FIFO */
  74 +       wr_regl(port, S3C2410_UFCON, (rd_regl(port, S3C2410_UFCON) & ~0x01));
  75 +       /* fix baud rate */
  76 +       wr_regl(port, S3C2410_UBRDIV, 26);
  77 +
  78 +       while (*sz) {
  79 +               int timeout = 10000000;
  80 +
  81 +               /* spin on it being busy */
  82 +               while ((!(rd_regl(port, S3C2410_UTRSTAT) & 2)) && timeout--)
  83 +                       ;
  84 +
  85 +               /* transmit register */
  86 +               wr_regl(port, S3C2410_UTXH, *sz);
  87 +
  88 +               sz++;
  89 +       }
  90 +}
  91 +
  92  static inline int s3c2440_serial_init(void)
  93  {
  94         return s3c24xx_serial_init(&s3c2440_serial_drv, &s3c2440_uart_inf);
  95 @@ -1654,69 +1720,6 @@ static struct platform_driver s3c2412_serial_drv = {
  96         },
  97  };
  98
  99 -static void s3c24xx_serial_force_debug_port_up(void)
 100 -{
 101 -       struct s3c24xx_uart_port *ourport = &s3c24xx_serial_ports[
 102 -                                                        CONFIG_DEBUG_S3C_UART];
 103 -       struct s3c24xx_uart_clksrc *clksrc = NULL;
 104 -       struct clk *clk = NULL;
 105 -       unsigned long tmp;
 106 -
 107 -       s3c24xx_serial_getclk(&ourport->port, &clksrc, &clk, 115200);
 108 -
 109 -       tmp = __raw_readl(S3C2410_CLKCON);
 110 -
 111 -       /* re-start uart clocks */
 112 -       tmp |= S3C2410_CLKCON_UART0;
 113 -       tmp |= S3C2410_CLKCON_UART1;
 114 -       tmp |= S3C2410_CLKCON_UART2;
 115 -
 116 -       __raw_writel(tmp, S3C2410_CLKCON);
 117 -       udelay(10);
 118 -
 119 -       s3c24xx_serial_setsource(&ourport->port, clksrc);
 120 -
 121 -       if (ourport->baudclk != NULL && !IS_ERR(ourport->baudclk)) {
 122 -               clk_disable(ourport->baudclk);
 123 -               ourport->baudclk  = NULL;
 124 -       }
 125 -
 126 -       clk_enable(clk);
 127 -
 128 -       ourport->clksrc = clksrc;
 129 -       ourport->baudclk = clk;
 130 -}
 131 -
 132 -static void s3c2410_printascii(const char *sz)
 133 -{
 134 -       struct s3c24xx_uart_port *ourport = &s3c24xx_serial_ports[
 135 -                                                        CONFIG_DEBUG_S3C_UART];
 136 -       struct uart_port *port = &ourport->port;
 137 -
 138 -       /* 8 N 1 */
 139 -       wr_regl(port, S3C2410_ULCON, (rd_regl(port, S3C2410_ULCON)) | 3);
 140 -       /* polling mode */
 141 -       wr_regl(port, S3C2410_UCON, (rd_regl(port, S3C2410_UCON) & ~0xc0f) | 5);
 142 -       /* disable FIFO */
 143 -       wr_regl(port, S3C2410_UFCON, (rd_regl(port, S3C2410_UFCON) & ~0x01));
 144 -       /* fix baud rate */
 145 -       wr_regl(port, S3C2410_UBRDIV, 26);
 146 -
 147 -       while (*sz) {
 148 -               int timeout = 10000000;
 149 -
 150 -               /* spin on it being busy */
 151 -               while ((!(rd_regl(port, S3C2410_UTRSTAT) & 2)) && timeout--)
 152 -                       ;
 153 -
 154 -               /* transmit register */
 155 -               wr_regl(port, S3C2410_UTXH, *sz);
 156 -
 157 -               sz++;
 158 -       }
 159 -}
 160 -
 161 -
 162  /* s3c24xx_serial_resetport
 163   *
 164   * wrapper to call the specific reset for this port (reset the fifos
 165 --
 166 1.5.6.3
 167