[kernel] fix gpiommc build failure with 3.2
[openwrt.git] / target / linux / brcm47xx / patches-3.2 / 0033-USB-Add-driver-for-the-ssb-bus.patch
1 From ca1db834336ac19edc7a5d342f8acece1ae1feb9 Mon Sep 17 00:00:00 2001
2 From: Hauke Mehrtens <hauke@hauke-m.de>
3 Date: Sat, 26 Nov 2011 21:35:17 +0100
4 Subject: [PATCH 20/30] USB: Add driver for the ssb bus
5
6 This adds a USB driver using the generic platform device driver for the
7 USB controller found on the Broadcom ssb bus. The ssb bus just
8 exposes one device which serves the OHCI and the EHCI controller at the
9 same time. This driver probes for this USB controller and creates and
10 registers two new platform devices which will be probed by the new
11 generic platform device driver. This makes it possible to use the EHCI
12 and the OCHI controller on the ssb bus at the same time.
13
14 The old ssb OHCI USB driver will be removed in the next step as this
15 driver also provide an OHCI driver and an EHCI for the cores supporting
16 it.
17
18 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
19 ---
20 drivers/usb/host/Kconfig | 12 ++
21 drivers/usb/host/Makefile | 1 +
22 drivers/usb/host/ssb-hcd.c | 272 ++++++++++++++++++++++++++++++++++++++++++++
23 3 files changed, 285 insertions(+), 0 deletions(-)
24 create mode 100644 drivers/usb/host/ssb-hcd.c
25
26 --- a/drivers/usb/host/Kconfig
27 +++ b/drivers/usb/host/Kconfig
28 @@ -630,3 +630,15 @@ config USB_HCD_BCMA
29 for ehci and ohci.
30
31 If unsure, say N.
32 +
33 +config USB_HCD_SSB
34 + tristate "SSB usb host driver"
35 + depends on SSB && EXPERIMENTAL
36 + select USB_OHCI_HCD_PLATFORM if USB_OHCI_HCD
37 + select USB_EHCI_HCD_PLATFORM if USB_EHCI_HCD
38 + help
39 + Enbale support for the EHCI and OCHI host controller on an bcma bus.
40 + It converts the bcma driver into two platform device drivers
41 + for ehci and ohci.
42 +
43 + If unsure, say N.
44 --- a/drivers/usb/host/Makefile
45 +++ b/drivers/usb/host/Makefile
46 @@ -38,3 +38,4 @@ obj-$(CONFIG_USB_FSL_MPH_DR_OF) += fsl-m
47 obj-$(CONFIG_USB_OCTEON2_COMMON) += octeon2-common.o
48 obj-$(CONFIG_MIPS_ALCHEMY) += alchemy-common.o
49 obj-$(CONFIG_USB_HCD_BCMA) += bcma-hcd.o
50 +obj-$(CONFIG_USB_HCD_SSB) += ssb-hcd.o
51 --- /dev/null
52 +++ b/drivers/usb/host/ssb-hcd.c
53 @@ -0,0 +1,272 @@
54 +/*
55 + * Sonics Silicon Backplane
56 + * Broadcom USB-core driver (SSB bus glue)
57 + *
58 + * Copyright 2011 Hauke Mehrtens <hauke@hauke-m.de>
59 + *
60 + * Based on ssb-ohci driver
61 + * Copyright 2007 Michael Buesch <m@bues.ch>
62 + *
63 + * Derived from the OHCI-PCI driver
64 + * Copyright 1999 Roman Weissgaerber
65 + * Copyright 2000-2002 David Brownell
66 + * Copyright 1999 Linus Torvalds
67 + * Copyright 1999 Gregory P. Smith
68 + *
69 + * Derived from the USBcore related parts of Broadcom-SB
70 + * Copyright 2005-2011 Broadcom Corporation
71 + *
72 + * Licensed under the GNU/GPL. See COPYING for details.
73 + */
74 +#include <linux/ssb/ssb.h>
75 +#include <linux/delay.h>
76 +#include <linux/platform_device.h>
77 +#include <linux/module.h>
78 +
79 +MODULE_AUTHOR("Hauke Mehrtens");
80 +MODULE_DESCRIPTION("Common USB driver for SSB Bus");
81 +MODULE_LICENSE("GPL");
82 +
83 +#define SSB_HCD_TMSLOW_HOSTMODE (1 << 29)
84 +
85 +struct ssb_hcd_device {
86 + struct platform_device *ehci_dev;
87 + struct platform_device *ohci_dev;
88 +
89 + u32 enable_flags;
90 +};
91 +
92 +static void __devinit ssb_hcd_5354wa(struct ssb_device *dev)
93 +{
94 +#ifdef CONFIG_SSB_DRIVER_MIPS
95 + /* Work around for 5354 failures */
96 + if (dev->id.revision == 2 && dev->bus->chip_id == 0x5354) {
97 + /* Change syn01 reg */
98 + ssb_write32(dev, 0x894, 0x00fe00fe);
99 +
100 + /* Change syn03 reg */
101 + ssb_write32(dev, 0x89c, ssb_read32(dev, 0x89c) | 0x1);
102 + }
103 +#endif
104 +}
105 +
106 +static void __devinit ssb_hcd_usb20wa(struct ssb_device *dev)
107 +{
108 + if (dev->id.coreid == SSB_DEV_USB20_HOST) {
109 + /*
110 + * USB 2.0 special considerations:
111 + *
112 + * In addition to the standard SSB reset sequence, the Host
113 + * Control Register must be programmed to bring the USB core
114 + * and various phy components out of reset.
115 + */
116 + ssb_write32(dev, 0x200, 0x7ff);
117 +
118 + /* Change Flush control reg */
119 + ssb_write32(dev, 0x400, ssb_read32(dev, 0x400) & ~8);
120 + ssb_read32(dev, 0x400);
121 +
122 + /* Change Shim control reg */
123 + ssb_write32(dev, 0x304, ssb_read32(dev, 0x304) & ~0x100);
124 + ssb_read32(dev, 0x304);
125 +
126 + udelay(1);
127 +
128 + ssb_hcd_5354wa(dev);
129 + }
130 +}
131 +
132 +/* based on arch/mips/brcm-boards/bcm947xx/pcibios.c */
133 +static u32 __devinit ssb_hcd_init_chip(struct ssb_device *dev)
134 +{
135 + u32 flags = 0;
136 +
137 + if (dev->id.coreid == SSB_DEV_USB11_HOSTDEV)
138 + /* Put the device into host-mode. */
139 + flags |= SSB_HCD_TMSLOW_HOSTMODE;
140 +
141 + ssb_device_enable(dev, flags);
142 +
143 + ssb_hcd_usb20wa(dev);
144 +
145 + return flags;
146 +}
147 +
148 +static struct platform_device * __devinit
149 +ssb_hcd_create_pdev(struct ssb_device *dev, char *name, u32 addr, u32 len)
150 +{
151 + struct platform_device *hci_dev;
152 + struct resource hci_res[2];
153 + int ret = -ENOMEM;
154 +
155 + memset(hci_res, 0, sizeof(hci_res));
156 +
157 + hci_res[0].start = addr;
158 + hci_res[0].end = hci_res[0].start + len - 1;
159 + hci_res[0].flags = IORESOURCE_MEM;
160 +
161 + hci_res[1].start = dev->irq;
162 + hci_res[1].flags = IORESOURCE_IRQ;
163 +
164 + hci_dev = platform_device_alloc(name, 0);
165 + if (!hci_dev)
166 + goto err_alloc;
167 +
168 + hci_dev->dev.parent = dev->dev;
169 + hci_dev->dev.dma_mask = &hci_dev->dev.coherent_dma_mask;
170 +
171 + ret = platform_device_add_resources(hci_dev, hci_res, 2);
172 + if (ret)
173 + goto err_alloc;
174 +
175 + ret = platform_device_add(hci_dev);
176 + if (ret) {
177 +err_alloc:
178 + platform_device_put(hci_dev);
179 + return ERR_PTR(ret);
180 + }
181 +
182 + return hci_dev;
183 +}
184 +
185 +static int __devinit ssb_hcd_probe(struct ssb_device *dev,
186 + const struct ssb_device_id *id)
187 +{
188 + int err, tmp;
189 + int start, len;
190 + u16 chipid_top;
191 + struct ssb_hcd_device *usb_dev;
192 +
193 + /* USBcores are only connected on embedded devices. */
194 + chipid_top = (dev->bus->chip_id & 0xFF00);
195 + if (chipid_top != 0x4700 && chipid_top != 0x5300)
196 + return -ENODEV;
197 +
198 + /* TODO: Probably need checks here; is the core connected? */
199 +
200 + if (dma_set_mask(dev->dma_dev, DMA_BIT_MASK(32)) ||
201 + dma_set_coherent_mask(dev->dma_dev, DMA_BIT_MASK(32)))
202 + return -EOPNOTSUPP;
203 +
204 + usb_dev = kzalloc(sizeof(struct ssb_hcd_device), GFP_KERNEL);
205 + if (!usb_dev)
206 + return -ENOMEM;
207 +
208 + /* We currently always attach SSB_DEV_USB11_HOSTDEV
209 + * as HOST OHCI. If we want to attach it as Client device,
210 + * we must branch here and call into the (yet to
211 + * be written) Client mode driver. Same for remove(). */
212 + usb_dev->enable_flags = ssb_hcd_init_chip(dev);
213 +
214 + tmp = ssb_read32(dev, SSB_ADMATCH0);
215 +
216 + start = ssb_admatch_base(tmp);
217 + len = ssb_admatch_size(tmp);
218 + usb_dev->ohci_dev = ssb_hcd_create_pdev(dev, "ohci-platform", start,
219 + len);
220 + if (IS_ERR(usb_dev->ohci_dev)) {
221 + err = PTR_ERR(usb_dev->ohci_dev);
222 + goto err_free_usb_dev;
223 + }
224 +
225 + if (dev->id.coreid == SSB_DEV_USB20_HOST) {
226 + start = ssb_admatch_base(tmp) + 0x800; /* ehci core offset */
227 + len = 0x100; /* ehci reg block size */
228 + usb_dev->ehci_dev = ssb_hcd_create_pdev(dev, "ehci-platform",
229 + start, len);
230 + if (IS_ERR(usb_dev->ehci_dev)) {
231 + err = PTR_ERR(usb_dev->ehci_dev);
232 + goto err_unregister_ohci_dev;
233 + }
234 + }
235 +
236 + ssb_set_drvdata(dev, usb_dev);
237 + return 0;
238 +
239 +err_unregister_ohci_dev:
240 + platform_device_unregister(usb_dev->ohci_dev);
241 +err_free_usb_dev:
242 + kfree(usb_dev);
243 + return err;
244 +}
245 +
246 +static void __devexit ssb_hcd_remove(struct ssb_device *dev)
247 +{
248 + struct ssb_hcd_device *usb_dev;
249 + struct platform_device *ohci_dev;
250 + struct platform_device *ehci_dev;
251 +
252 + usb_dev = ssb_get_drvdata(dev);
253 + if (!usb_dev)
254 + return;
255 +
256 + ohci_dev = usb_dev->ohci_dev;
257 + ehci_dev = usb_dev->ehci_dev;
258 +
259 + if (ohci_dev) {
260 + platform_device_unregister(ohci_dev);
261 + }
262 + if (ehci_dev) {
263 + platform_device_unregister(ehci_dev);
264 + }
265 +
266 + ssb_device_disable(dev, 0);
267 +}
268 +
269 +static void __devexit ssb_hcd_shutdown(struct ssb_device *dev)
270 +{
271 + ssb_device_disable(dev, 0);
272 +}
273 +
274 +#ifdef CONFIG_PM
275 +
276 +static int ssb_hcd_suspend(struct ssb_device *dev, pm_message_t state)
277 +{
278 + ssb_device_disable(dev, 0);
279 +
280 + return 0;
281 +}
282 +
283 +static int ssb_hcd_resume(struct ssb_device *dev)
284 +{
285 + struct ssb_hcd_device *usb_dev = ssb_get_drvdata(dev);
286 +
287 + ssb_device_enable(dev, usb_dev->enable_flags);
288 +
289 + return 0;
290 +}
291 +
292 +#else /* !CONFIG_PM */
293 +#define ssb_hcd_suspend NULL
294 +#define ssb_hcd_resume NULL
295 +#endif /* CONFIG_PM */
296 +
297 +static const struct ssb_device_id ssb_hcd_table[] __devinitconst = {
298 + SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_USB11_HOSTDEV, SSB_ANY_REV),
299 + SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_USB11_HOST, SSB_ANY_REV),
300 + SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_USB20_HOST, SSB_ANY_REV),
301 + SSB_DEVTABLE_END
302 +};
303 +MODULE_DEVICE_TABLE(ssb, ssb_hcd_table);
304 +
305 +static struct ssb_driver ssb_hcd_driver = {
306 + .name = KBUILD_MODNAME,
307 + .id_table = ssb_hcd_table,
308 + .probe = ssb_hcd_probe,
309 + .remove = __devexit_p(ssb_hcd_remove),
310 + .shutdown = ssb_hcd_shutdown,
311 + .suspend = ssb_hcd_suspend,
312 + .resume = ssb_hcd_resume,
313 +};
314 +
315 +static int __init ssb_hcd_init(void)
316 +{
317 + return ssb_driver_register(&ssb_hcd_driver);
318 +}
319 +module_init(ssb_hcd_init);
320 +
321 +static void __exit ssb_hcd_exit(void)
322 +{
323 + ssb_driver_unregister(&ssb_hcd_driver);
324 +}
325 +module_exit(ssb_hcd_exit);
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