[kernel] fix gpiommc build failure with 3.2
[openwrt.git] / target / linux / brcm47xx / patches-3.2 / 0046-bcma-complete-workaround-for-BCMA43224.patch
1 From efe89df0326b777563d197b8cf1c25209a31ceb0 Mon Sep 17 00:00:00 2001
2 From: Hauke Mehrtens <hauke@hauke-m.de>
3 Date: Sat, 21 Jan 2012 18:47:42 +0100
4 Subject: [PATCH 32/34] bcma: complete workaround for BCMA43224
5
6
7 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
8 ---
9 drivers/bcma/driver_chipcommon_pmu.c | 15 +++++++++++----
10 include/linux/bcma/bcma_driver_chipcommon.h | 5 +++++
11 2 files changed, 16 insertions(+), 4 deletions(-)
12
13 --- a/drivers/bcma/driver_chipcommon_pmu.c
14 +++ b/drivers/bcma/driver_chipcommon_pmu.c
15 @@ -141,12 +141,19 @@ void bcma_pmu_workarounds(struct bcma_dr
16 /* BCM4331 workaround is SPROM-related, we put it in sprom.c */
17 break;
18 case 43224:
19 + case 43421:
20 + /* enable 12 mA drive strenth for 43224 and set chipControl register bit 15 */
21 if (bus->chipinfo.rev == 0) {
22 - pr_err("Workarounds for 43224 rev 0 not fully "
23 - "implemented\n");
24 - bcma_chipco_chipctl_maskset(cc, 0, ~0, 0x00F000F0);
25 + bcma_cc_maskset32(cc, BCMA_CC_CHIPCTL,
26 + BCMA_CCTRL_43224_GPIO_TOGGLE,
27 + BCMA_CCTRL_43224_GPIO_TOGGLE);
28 + bcma_chipco_chipctl_maskset(cc, 0,
29 + BCMA_CCTRL_43224A0_12MA_LED_DRIVE,
30 + BCMA_CCTRL_43224A0_12MA_LED_DRIVE);
31 } else {
32 - bcma_chipco_chipctl_maskset(cc, 0, ~0, 0xF0);
33 + bcma_chipco_chipctl_maskset(cc, 0,
34 + BCMA_CCTRL_43224B0_12MA_LED_DRIVE,
35 + BCMA_CCTRL_43224B0_12MA_LED_DRIVE);
36 }
37 break;
38 case 43225:
39 --- a/include/linux/bcma/bcma_driver_chipcommon.h
40 +++ b/include/linux/bcma/bcma_driver_chipcommon.h
41 @@ -374,6 +374,11 @@
42 #define BCMA_CHIPCTL_4331_BT_SHD0_ON_GPIO4 BIT(16) /* enable bt_shd0 at gpio4 */
43 #define BCMA_CHIPCTL_4331_BT_SHD1_ON_GPIO5 BIT(17) /* enable bt_shd1 at gpio5 */
44
45 +/* 43224 chip-specific ChipControl register bits */
46 +#define BCMA_CCTRL_43224_GPIO_TOGGLE 0x8000 /* gpio[3:0] pins as btcoex or s/w gpio */
47 +#define BCMA_CCTRL_43224A0_12MA_LED_DRIVE 0x00F000F0 /* 12 mA drive strength */
48 +#define BCMA_CCTRL_43224B0_12MA_LED_DRIVE 0xF0 /* 12 mA drive strength for later 43224s */
49 +
50 #define BCMA_FLASH2 0x1c000000 /* Flash Region 2 (region 1 shadowed here) */
51 #define BCMA_FLASH2_SZ 0x02000000 /* Size of Flash Region 2 */
52 #define BCMA_FLASH1 0x1fc00000 /* MIPS Flash Region 1 */
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