target/linux/brcm47xx/patches-3.0/0014-ssb-move-flash-to-chipcommon.patch

   1 From be495ba9c365a31cf6a9fa0f67df9a9a9e0f1a1f Mon Sep 17 00:00:00 2001
   2 From: Hauke Mehrtens <hauke@hauke-m.de>
   3 Date: Sat, 23 Jul 2011 23:57:06 +0200
   4 Subject: [PATCH 14/26] ssb: move flash to chipcommon
   5
   6
   7 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
   8 ---
   9  arch/mips/bcm47xx/nvram.c                 |    8 +++---
  10  arch/mips/bcm47xx/wgt634u.c               |    8 +++---
  11  drivers/ssb/driver_mipscore.c             |   31 +++++++++++++++++++---------
  12  include/linux/ssb/ssb_driver_chipcommon.h |   18 ++++++++++++++++
  13  include/linux/ssb/ssb_driver_mips.h       |    4 ---
  14  5 files changed, 47 insertions(+), 22 deletions(-)
  15
  16 --- a/arch/mips/bcm47xx/nvram.c
  17 +++ b/arch/mips/bcm47xx/nvram.c
  18 @@ -27,7 +27,7 @@ static char nvram_buf[NVRAM_SPACE];
  19  static void early_nvram_init(void)
  20  {
  21  #ifdef CONFIG_BCM47XX_SSB
  22 -       struct ssb_mipscore *mcore_ssb;
  23 +       struct ssb_chipcommon *ssb_cc;
  24  #endif
  25  #ifdef CONFIG_BCM47XX_BCMA
  26         struct bcma_drv_cc *bcma_cc;
  27 @@ -42,9 +42,9 @@ static void early_nvram_init(void)
  28         switch (bcm47xx_bus_type) {
  29  #ifdef CONFIG_BCM47XX_SSB
  30         case BCM47XX_BUS_TYPE_SSB:
  31 -               mcore_ssb = &bcm47xx_bus.ssb.mipscore;
  32 -               base = mcore_ssb->flash_window;
  33 -               lim = mcore_ssb->flash_window_size;
  34 +               ssb_cc = &bcm47xx_bus.ssb.chipco;
  35 +               base = ssb_cc->pflash.window;
  36 +               lim = ssb_cc->pflash.window_size;
  37                 break;
  38  #endif
  39  #ifdef CONFIG_BCM47XX_BCMA
  40 --- a/arch/mips/bcm47xx/wgt634u.c
  41 +++ b/arch/mips/bcm47xx/wgt634u.c
  42 @@ -156,10 +156,10 @@ static int __init wgt634u_init(void)
  43                                             SSB_CHIPCO_IRQ_GPIO);
  44                 }
  45
  46 -               wgt634u_flash_data.width = mcore->flash_buswidth;
  47 -               wgt634u_flash_resource.start = mcore->flash_window;
  48 -               wgt634u_flash_resource.end = mcore->flash_window
  49 -                                          + mcore->flash_window_size
  50 +               wgt634u_flash_data.width = mcore->pflash.buswidth;
  51 +               wgt634u_flash_resource.start = mcore->pflash.window;
  52 +               wgt634u_flash_resource.end = mcore->pflash.window
  53 +                                          + mcore->pflash.window_size
  54                                            - 1;
  55                 return platform_add_devices(wgt634u_devices,
  56                                             ARRAY_SIZE(wgt634u_devices));
  57 --- a/drivers/ssb/driver_mipscore.c
  58 +++ b/drivers/ssb/driver_mipscore.c
  59 @@ -190,16 +190,27 @@ static void ssb_mips_flash_detect(struct
  60  {
  61         struct ssb_bus *bus = mcore->dev->bus;
  62
  63 -       mcore->flash_buswidth = 2;
  64 -       if (bus->chipco.dev) {
  65 -               mcore->flash_window = 0x1c000000;
  66 -               mcore->flash_window_size = 0x02000000;
  67 -               if ((ssb_read32(bus->chipco.dev, SSB_CHIPCO_FLASH_CFG)
  68 -                              & SSB_CHIPCO_CFG_DS16) == 0)
  69 -                       mcore->flash_buswidth = 1;
  70 -       } else {
  71 -               mcore->flash_window = 0x1fc00000;
  72 -               mcore->flash_window_size = 0x00400000;
  73 +       switch (bus->chipco.capabilities & SSB_CHIPCO_CAP_FLASHT) {
  74 +       case SSB_CHIPCO_FLASHT_STSER:
  75 +       case SSB_CHIPCO_FLASHT_ATSER:
  76 +               pr_info("serial flash not supported.\n");
  77 +               break;
  78 +       case SSB_CHIPCO_FLASHT_PARA:
  79 +               pr_info("found parallel flash.\n");
  80 +               bus->chipco.flash_type = SSB_PFLASH;
  81 +               bus->chipco.pflash.buswidth = 2;
  82 +               if (bus->chipco.dev) {
  83 +                       bus->chipco.pflash.window = 0x1c000000;
  84 +                       bus->chipco.pflash.window_size = 0x02000000;
  85 +                       if ((ssb_read32(bus->chipco.dev, SSB_CHIPCO_FLASH_CFG)
  86 +                            & SSB_CHIPCO_CFG_DS16) == 0)
  87 +                               bus->chipco.pflash.buswidth = 1;
  88 +               } else {
  89 +                       bus->chipco.pflash.window = 0x1fc00000;
  90 +                       bus->chipco.pflash.window_size = 0x00400000;
  91 +               }
  92 +       default:
  93 +               pr_err("flash not supported.\n");
  94         }
  95  }
  96
  97 --- a/include/linux/ssb/ssb_driver_chipcommon.h
  98 +++ b/include/linux/ssb/ssb_driver_chipcommon.h
  99 @@ -582,6 +582,18 @@ struct ssb_chipcommon_pmu {
 100         u32 crystalfreq;        /* The active crystal frequency (in kHz) */
 101  };
 102
 103 +#ifdef CONFIG_SSB_DRIVER_MIPS
 104 +enum ssb_flash_type {
 105 +       SSB_PFLASH,
 106 +};
 107 +
 108 +struct ssb_pflash {
 109 +       u8 buswidth;
 110 +       u32 window;
 111 +       u32 window_size;
 112 +};
 113 +#endif /* CONFIG_SSB_DRIVER_MIPS */
 114 +
 115  struct ssb_chipcommon {
 116         struct ssb_device *dev;
 117         u32 capabilities;
 118 @@ -589,6 +601,12 @@ struct ssb_chipcommon {
 119         /* Fast Powerup Delay constant */
 120         u16 fast_pwrup_delay;
 121         struct ssb_chipcommon_pmu pmu;
 122 +#ifdef CONFIG_SSB_DRIVER_MIPS
 123 +       enum ssb_flash_type flash_type;
 124 +       union {
 125 +               struct ssb_pflash pflash;
 126 +       };
 127 +#endif /* CONFIG_SSB_DRIVER_MIPS */
 128  };
 129
 130  static inline bool ssb_chipco_available(struct ssb_chipcommon *cc)
 131 --- a/include/linux/ssb/ssb_driver_mips.h
 132 +++ b/include/linux/ssb/ssb_driver_mips.h
 133 @@ -19,10 +19,6 @@ struct ssb_mipscore {
 134
 135         int nr_serial_ports;
 136         struct ssb_serial_port serial_ports[4];
 137 -
 138 -       u8 flash_buswidth;
 139 -       u32 flash_window;
 140 -       u32 flash_window_size;
 141  };
 142
 143  extern void ssb_mipscore_init(struct ssb_mipscore *mcore);