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ath9k: fix a null pointer deref issue
[openwrt.git] / package / mac80211 / patches / 310-pending_endian_fixes.patch
1 --- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
2 +++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
3 @@ -57,6 +57,8 @@
4 #define SUB_NUM_CTL_MODES_AT_5G_40 2 /* excluding HT40, EXT-OFDM */
5 #define SUB_NUM_CTL_MODES_AT_2G_40 3 /* excluding HT40, EXT-OFDM, EXT-CCK */
6
7 +#define CTL(_tpower, _flag) ((_tpower) | ((_flag) << 6))
8 +
9 static int ar9003_hw_power_interpolate(int32_t x,
10 int32_t *px, int32_t *py, u_int16_t np);
11 static const struct ar9300_eeprom ar9300_default = {
12 @@ -296,21 +298,21 @@ static const struct ar9300_eeprom ar9300
13 }
14 },
15 .ctlPowerData_2G = {
16 - { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
17 - { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
18 - { { {60, 1}, {60, 0}, {60, 0}, {60, 1} } },
19 -
20 - { { {60, 1}, {60, 0}, {0, 0}, {0, 0} } },
21 - { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
22 - { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
23 -
24 - { { {60, 0}, {60, 1}, {60, 1}, {60, 0} } },
25 - { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
26 - { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
27 -
28 - { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
29 - { { {60, 0}, {60, 1}, {60, 1}, {60, 1} } },
30 - { { {60, 0}, {60, 1}, {60, 1}, {60, 1} } },
31 + { { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
32 + { { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
33 + { { CTL(60, 1), CTL(60, 0), CTL(60, 0), CTL(60, 1) } },
34 +
35 + { { CTL(60, 1), CTL(60, 0), CTL(0, 0), CTL(0, 0) } },
36 + { { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
37 + { { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
38 +
39 + { { CTL(60, 0), CTL(60, 1), CTL(60, 1), CTL(60, 0) } },
40 + { { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
41 + { { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
42 +
43 + { { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
44 + { { CTL(60, 0), CTL(60, 1), CTL(60, 1), CTL(60, 1) } },
45 + { { CTL(60, 0), CTL(60, 1), CTL(60, 1), CTL(60, 1) } },
46 },
47 .modalHeader5G = {
48 /* 4 idle,t1,t2,b (4 bits per setting) */
49 @@ -582,56 +584,56 @@ static const struct ar9300_eeprom ar9300
50 .ctlPowerData_5G = {
51 {
52 {
53 - {60, 1}, {60, 1}, {60, 1}, {60, 1},
54 - {60, 1}, {60, 1}, {60, 1}, {60, 0},
55 + CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
56 + CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 0),
57 }
58 },
59 {
60 {
61 - {60, 1}, {60, 1}, {60, 1}, {60, 1},
62 - {60, 1}, {60, 1}, {60, 1}, {60, 0},
63 + CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
64 + CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 0),
65 }
66 },
67 {
68 {
69 - {60, 0}, {60, 1}, {60, 0}, {60, 1},
70 - {60, 1}, {60, 1}, {60, 1}, {60, 1},
71 + CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 1),
72 + CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
73 }
74 },
75 {
76 {
77 - {60, 0}, {60, 1}, {60, 1}, {60, 0},
78 - {60, 1}, {60, 0}, {60, 0}, {60, 0},
79 + CTL(60, 0), CTL(60, 1), CTL(60, 1), CTL(60, 0),
80 + CTL(60, 1), CTL(60, 0), CTL(60, 0), CTL(60, 0),
81 }
82 },
83 {
84 {
85 - {60, 1}, {60, 1}, {60, 1}, {60, 0},
86 - {60, 0}, {60, 0}, {60, 0}, {60, 0},
87 + CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 0),
88 + CTL(60, 0), CTL(60, 0), CTL(60, 0), CTL(60, 0),
89 }
90 },
91 {
92 {
93 - {60, 1}, {60, 1}, {60, 1}, {60, 1},
94 - {60, 1}, {60, 0}, {60, 0}, {60, 0},
95 + CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
96 + CTL(60, 1), CTL(60, 0), CTL(60, 0), CTL(60, 0),
97 }
98 },
99 {
100 {
101 - {60, 1}, {60, 1}, {60, 1}, {60, 1},
102 - {60, 1}, {60, 1}, {60, 1}, {60, 1},
103 + CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
104 + CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
105 }
106 },
107 {
108 {
109 - {60, 1}, {60, 1}, {60, 0}, {60, 1},
110 - {60, 1}, {60, 1}, {60, 1}, {60, 0},
111 + CTL(60, 1), CTL(60, 1), CTL(60, 0), CTL(60, 1),
112 + CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 0),
113 }
114 },
115 {
116 {
117 - {60, 1}, {60, 0}, {60, 1}, {60, 1},
118 - {60, 1}, {60, 1}, {60, 0}, {60, 1},
119 + CTL(60, 1), CTL(60, 0), CTL(60, 1), CTL(60, 1),
120 + CTL(60, 1), CTL(60, 1), CTL(60, 0), CTL(60, 1),
121 }
122 },
123 }
124 @@ -873,21 +875,21 @@ static const struct ar9300_eeprom ar9300
125 }
126 },
127 .ctlPowerData_2G = {
128 - { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
129 - { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
130 - { { {60, 1}, {60, 0}, {60, 0}, {60, 1} } },
131 -
132 - { { {60, 1}, {60, 0}, {0, 0}, {0, 0} } },
133 - { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
134 - { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
135 -
136 - { { {60, 0}, {60, 1}, {60, 1}, {60, 0} } },
137 - { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
138 - { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
139 -
140 - { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
141 - { { {60, 0}, {60, 1}, {60, 1}, {60, 1} } },
142 - { { {60, 0}, {60, 1}, {60, 1}, {60, 1} } },
143 + { { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
144 + { { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
145 + { { CTL(60, 1), CTL(60, 0), CTL(60, 0), CTL(60, 1) } },
146 +
147 + { { CTL(60, 1), CTL(60, 0), CTL(0, 0), CTL(0, 0) } },
148 + { { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
149 + { { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
150 +
151 + { { CTL(60, 0), CTL(60, 1), CTL(60, 1), CTL(60, 0) } },
152 + { { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
153 + { { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
154 +
155 + { { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
156 + { { CTL(60, 0), CTL(60, 1), CTL(60, 1), CTL(60, 1) } },
157 + { { CTL(60, 0), CTL(60, 1), CTL(60, 1), CTL(60, 1) } },
158 },
159 .modalHeader5G = {
160 /* 4 idle,t1,t2,b (4 bits per setting) */
161 @@ -1159,56 +1161,56 @@ static const struct ar9300_eeprom ar9300
162 .ctlPowerData_5G = {
163 {
164 {
165 - {60, 1}, {60, 1}, {60, 1}, {60, 1},
166 - {60, 1}, {60, 1}, {60, 1}, {60, 0},
167 + CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
168 + CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 0),
169 }
170 },
171 {
172 {
173 - {60, 1}, {60, 1}, {60, 1}, {60, 1},
174 - {60, 1}, {60, 1}, {60, 1}, {60, 0},
175 + CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
176 + CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 0),
177 }
178 },
179 {
180 {
181 - {60, 0}, {60, 1}, {60, 0}, {60, 1},
182 - {60, 1}, {60, 1}, {60, 1}, {60, 1},
183 + CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 1),
184 + CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
185 }
186 },
187 {
188 {
189 - {60, 0}, {60, 1}, {60, 1}, {60, 0},
190 - {60, 1}, {60, 0}, {60, 0}, {60, 0},
191 + CTL(60, 0), CTL(60, 1), CTL(60, 1), CTL(60, 0),
192 + CTL(60, 1), CTL(60, 0), CTL(60, 0), CTL(60, 0),
193 }
194 },
195 {
196 {
197 - {60, 1}, {60, 1}, {60, 1}, {60, 0},
198 - {60, 0}, {60, 0}, {60, 0}, {60, 0},
199 + CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 0),
200 + CTL(60, 0), CTL(60, 0), CTL(60, 0), CTL(60, 0),
201 }
202 },
203 {
204 {
205 - {60, 1}, {60, 1}, {60, 1}, {60, 1},
206 - {60, 1}, {60, 0}, {60, 0}, {60, 0},
207 + CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
208 + CTL(60, 1), CTL(60, 0), CTL(60, 0), CTL(60, 0),
209 }
210 },
211 {
212 {
213 - {60, 1}, {60, 1}, {60, 1}, {60, 1},
214 - {60, 1}, {60, 1}, {60, 1}, {60, 1},
215 + CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
216 + CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
217 }
218 },
219 {
220 {
221 - {60, 1}, {60, 1}, {60, 0}, {60, 1},
222 - {60, 1}, {60, 1}, {60, 1}, {60, 0},
223 + CTL(60, 1), CTL(60, 1), CTL(60, 0), CTL(60, 1),
224 + CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 0),
225 }
226 },
227 {
228 {
229 - {60, 1}, {60, 0}, {60, 1}, {60, 1},
230 - {60, 1}, {60, 1}, {60, 0}, {60, 1},
231 + CTL(60, 1), CTL(60, 0), CTL(60, 1), CTL(60, 1),
232 + CTL(60, 1), CTL(60, 1), CTL(60, 0), CTL(60, 1),
233 }
234 },
235 }
236 @@ -1451,21 +1453,21 @@ static const struct ar9300_eeprom ar9300
237 }
238 },
239 .ctlPowerData_2G = {
240 - { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
241 - { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
242 - { { {60, 1}, {60, 0}, {60, 0}, {60, 1} } },
243 -
244 - { { {60, 1}, {60, 0}, {0, 0}, {0, 0} } },
245 - { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
246 - { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
247 -
248 - { { {60, 0}, {60, 1}, {60, 1}, {60, 0} } },
249 - { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
250 - { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
251 -
252 - { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
253 - { { {60, 0}, {60, 1}, {60, 1}, {60, 1} } },
254 - { { {60, 0}, {60, 1}, {60, 1}, {60, 1} } },
255 + { { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
256 + { { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
257 + { { CTL(60, 1), CTL(60, 0), CTL(60, 0), CTL(60, 1) } },
258 +
259 + { { CTL(60, 1), CTL(60, 0), CTL(0, 0), CTL(0, 0) } },
260 + { { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
261 + { { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
262 +
263 + { { CTL(60, 0), CTL(60, 1), CTL(60, 1), CTL(60, 0) } },
264 + { { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
265 + { { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
266 +
267 + { { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
268 + { { CTL(60, 0), CTL(60, 1), CTL(60, 1), CTL(60, 1) } },
269 + { { CTL(60, 0), CTL(60, 1), CTL(60, 1), CTL(60, 1) } },
270 },
271 .modalHeader5G = {
272 /* 4 idle,t1,t2,b (4 bits per setting) */
273 @@ -1737,56 +1739,56 @@ static const struct ar9300_eeprom ar9300
274 .ctlPowerData_5G = {
275 {
276 {
277 - {60, 1}, {60, 1}, {60, 1}, {60, 1},
278 - {60, 1}, {60, 1}, {60, 1}, {60, 0},
279 + CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
280 + CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 0),
281 }
282 },
283 {
284 {
285 - {60, 1}, {60, 1}, {60, 1}, {60, 1},
286 - {60, 1}, {60, 1}, {60, 1}, {60, 0},
287 + CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
288 + CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 0),
289 }
290 },
291 {
292 {
293 - {60, 0}, {60, 1}, {60, 0}, {60, 1},
294 - {60, 1}, {60, 1}, {60, 1}, {60, 1},
295 + CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 1),
296 + CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
297 }
298 },
299 {
300 {
301 - {60, 0}, {60, 1}, {60, 1}, {60, 0},
302 - {60, 1}, {60, 0}, {60, 0}, {60, 0},
303 + CTL(60, 0), CTL(60, 1), CTL(60, 1), CTL(60, 0),
304 + CTL(60, 1), CTL(60, 0), CTL(60, 0), CTL(60, 0),
305 }
306 },
307 {
308 {
309 - {60, 1}, {60, 1}, {60, 1}, {60, 0},
310 - {60, 0}, {60, 0}, {60, 0}, {60, 0},
311 + CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 0),
312 + CTL(60, 0), CTL(60, 0), CTL(60, 0), CTL(60, 0),
313 }
314 },
315 {
316 {
317 - {60, 1}, {60, 1}, {60, 1}, {60, 1},
318 - {60, 1}, {60, 0}, {60, 0}, {60, 0},
319 + CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
320 + CTL(60, 1), CTL(60, 0), CTL(60, 0), CTL(60, 0),
321 }
322 },
323 {
324 {
325 - {60, 1}, {60, 1}, {60, 1}, {60, 1},
326 - {60, 1}, {60, 1}, {60, 1}, {60, 1},
327 + CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
328 + CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
329 }
330 },
331 {
332 {
333 - {60, 1}, {60, 1}, {60, 0}, {60, 1},
334 - {60, 1}, {60, 1}, {60, 1}, {60, 0},
335 + CTL(60, 1), CTL(60, 1), CTL(60, 0), CTL(60, 1),
336 + CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 0),
337 }
338 },
339 {
340 {
341 - {60, 1}, {60, 0}, {60, 1}, {60, 1},
342 - {60, 1}, {60, 1}, {60, 0}, {60, 1},
343 + CTL(60, 1), CTL(60, 0), CTL(60, 1), CTL(60, 1),
344 + CTL(60, 1), CTL(60, 1), CTL(60, 0), CTL(60, 1),
345 }
346 },
347 }
348 @@ -2029,21 +2031,21 @@ static const struct ar9300_eeprom ar9300
349 }
350 },
351 .ctlPowerData_2G = {
352 - { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
353 - { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
354 - { { {60, 1}, {60, 0}, {60, 0}, {60, 1} } },
355 -
356 - { { {60, 1}, {60, 0}, {0, 0}, {0, 0} } },
357 - { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
358 - { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
359 -
360 - { { {60, 0}, {60, 1}, {60, 1}, {60, 0} } },
361 - { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
362 - { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
363 -
364 - { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
365 - { { {60, 0}, {60, 1}, {60, 1}, {60, 1} } },
366 - { { {60, 0}, {60, 1}, {60, 1}, {60, 1} } },
367 + { { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
368 + { { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
369 + { { CTL(60, 1), CTL(60, 0), CTL(60, 0), CTL(60, 1) } },
370 +
371 + { { CTL(60, 1), CTL(60, 0), CTL(0, 0), CTL(0, 0) } },
372 + { { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
373 + { { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
374 +
375 + { { CTL(60, 0), CTL(60, 1), CTL(60, 1), CTL(60, 0) } },
376 + { { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
377 + { { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
378 +
379 + { { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
380 + { { CTL(60, 0), CTL(60, 1), CTL(60, 1), CTL(60, 1) } },
381 + { { CTL(60, 0), CTL(60, 1), CTL(60, 1), CTL(60, 1) } },
382 },
383 .modalHeader5G = {
384 /* 4 idle,t1,t2,b (4 bits per setting) */
385 @@ -2315,56 +2317,56 @@ static const struct ar9300_eeprom ar9300
386 .ctlPowerData_5G = {
387 {
388 {
389 - {60, 1}, {60, 1}, {60, 1}, {60, 1},
390 - {60, 1}, {60, 1}, {60, 1}, {60, 0},
391 + CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
392 + CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 0),
393 }
394 },
395 {
396 {
397 - {60, 1}, {60, 1}, {60, 1}, {60, 1},
398 - {60, 1}, {60, 1}, {60, 1}, {60, 0},
399 + CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
400 + CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 0),
401 }
402 },
403 {
404 {
405 - {60, 0}, {60, 1}, {60, 0}, {60, 1},
406 - {60, 1}, {60, 1}, {60, 1}, {60, 1},
407 + CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 1),
408 + CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
409 }
410 },
411 {
412 {
413 - {60, 0}, {60, 1}, {60, 1}, {60, 0},
414 - {60, 1}, {60, 0}, {60, 0}, {60, 0},
415 + CTL(60, 0), CTL(60, 1), CTL(60, 1), CTL(60, 0),
416 + CTL(60, 1), CTL(60, 0), CTL(60, 0), CTL(60, 0),
417 }
418 },
419 {
420 {
421 - {60, 1}, {60, 1}, {60, 1}, {60, 0},
422 - {60, 0}, {60, 0}, {60, 0}, {60, 0},
423 + CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 0),
424 + CTL(60, 0), CTL(60, 0), CTL(60, 0), CTL(60, 0),
425 }
426 },
427 {
428 {
429 - {60, 1}, {60, 1}, {60, 1}, {60, 1},
430 - {60, 1}, {60, 0}, {60, 0}, {60, 0},
431 + CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
432 + CTL(60, 1), CTL(60, 0), CTL(60, 0), CTL(60, 0),
433 }
434 },
435 {
436 {
437 - {60, 1}, {60, 1}, {60, 1}, {60, 1},
438 - {60, 1}, {60, 1}, {60, 1}, {60, 1},
439 + CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
440 + CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
441 }
442 },
443 {
444 {
445 - {60, 1}, {60, 1}, {60, 0}, {60, 1},
446 - {60, 1}, {60, 1}, {60, 1}, {60, 0},
447 + CTL(60, 1), CTL(60, 1), CTL(60, 0), CTL(60, 1),
448 + CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 0),
449 }
450 },
451 {
452 {
453 - {60, 1}, {60, 0}, {60, 1}, {60, 1},
454 - {60, 1}, {60, 1}, {60, 0}, {60, 1},
455 + CTL(60, 1), CTL(60, 0), CTL(60, 1), CTL(60, 1),
456 + CTL(60, 1), CTL(60, 1), CTL(60, 0), CTL(60, 1),
457 }
458 },
459 }
460 @@ -2606,21 +2608,21 @@ static const struct ar9300_eeprom ar9300
461 }
462 },
463 .ctlPowerData_2G = {
464 - { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
465 - { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
466 - { { {60, 1}, {60, 0}, {60, 0}, {60, 1} } },
467 -
468 - { { {60, 1}, {60, 0}, {0, 0}, {0, 0} } },
469 - { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
470 - { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
471 -
472 - { { {60, 0}, {60, 1}, {60, 1}, {60, 0} } },
473 - { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
474 - { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
475 -
476 - { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
477 - { { {60, 0}, {60, 1}, {60, 1}, {60, 1} } },
478 - { { {60, 0}, {60, 1}, {60, 1}, {60, 1} } },
479 + { { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
480 + { { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
481 + { { CTL(60, 1), CTL(60, 0), CTL(60, 0), CTL(60, 1) } },
482 +
483 + { { CTL(60, 1), CTL(60, 0), CTL(0, 0), CTL(0, 0) } },
484 + { { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
485 + { { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
486 +
487 + { { CTL(60, 0), CTL(60, 1), CTL(60, 1), CTL(60, 0) } },
488 + { { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
489 + { { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
490 +
491 + { { CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 0) } },
492 + { { CTL(60, 0), CTL(60, 1), CTL(60, 1), CTL(60, 1) } },
493 + { { CTL(60, 0), CTL(60, 1), CTL(60, 1), CTL(60, 1) } },
494 },
495 .modalHeader5G = {
496 /* 4 idle,t1,t2,b (4 bits per setting) */
497 @@ -2892,56 +2894,56 @@ static const struct ar9300_eeprom ar9300
498 .ctlPowerData_5G = {
499 {
500 {
501 - {60, 1}, {60, 1}, {60, 1}, {60, 1},
502 - {60, 1}, {60, 1}, {60, 1}, {60, 0},
503 + CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
504 + CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 0),
505 }
506 },
507 {
508 {
509 - {60, 1}, {60, 1}, {60, 1}, {60, 1},
510 - {60, 1}, {60, 1}, {60, 1}, {60, 0},
511 + CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
512 + CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 0),
513 }
514 },
515 {
516 {
517 - {60, 0}, {60, 1}, {60, 0}, {60, 1},
518 - {60, 1}, {60, 1}, {60, 1}, {60, 1},
519 + CTL(60, 0), CTL(60, 1), CTL(60, 0), CTL(60, 1),
520 + CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
521 }
522 },
523 {
524 {
525 - {60, 0}, {60, 1}, {60, 1}, {60, 0},
526 - {60, 1}, {60, 0}, {60, 0}, {60, 0},
527 + CTL(60, 0), CTL(60, 1), CTL(60, 1), CTL(60, 0),
528 + CTL(60, 1), CTL(60, 0), CTL(60, 0), CTL(60, 0),
529 }
530 },
531 {
532 {
533 - {60, 1}, {60, 1}, {60, 1}, {60, 0},
534 - {60, 0}, {60, 0}, {60, 0}, {60, 0},
535 + CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 0),
536 + CTL(60, 0), CTL(60, 0), CTL(60, 0), CTL(60, 0),
537 }
538 },
539 {
540 {
541 - {60, 1}, {60, 1}, {60, 1}, {60, 1},
542 - {60, 1}, {60, 0}, {60, 0}, {60, 0},
543 + CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
544 + CTL(60, 1), CTL(60, 0), CTL(60, 0), CTL(60, 0),
545 }
546 },
547 {
548 {
549 - {60, 1}, {60, 1}, {60, 1}, {60, 1},
550 - {60, 1}, {60, 1}, {60, 1}, {60, 1},
551 + CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
552 + CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 1),
553 }
554 },
555 {
556 {
557 - {60, 1}, {60, 1}, {60, 0}, {60, 1},
558 - {60, 1}, {60, 1}, {60, 1}, {60, 0},
559 + CTL(60, 1), CTL(60, 1), CTL(60, 0), CTL(60, 1),
560 + CTL(60, 1), CTL(60, 1), CTL(60, 1), CTL(60, 0),
561 }
562 },
563 {
564 {
565 - {60, 1}, {60, 0}, {60, 1}, {60, 1},
566 - {60, 1}, {60, 1}, {60, 0}, {60, 1},
567 + CTL(60, 1), CTL(60, 0), CTL(60, 1), CTL(60, 1),
568 + CTL(60, 1), CTL(60, 1), CTL(60, 0), CTL(60, 1),
569 }
570 },
571 }
572 @@ -4365,9 +4367,9 @@ static u16 ar9003_hw_get_direct_edge_pow
573 struct cal_ctl_data_5g *ctl_5g = eep->ctlPowerData_5G;
574
575 if (is2GHz)
576 - return ctl_2g[idx].ctlEdges[edge].tPower;
577 + return CTL_EDGE_TPOWER(ctl_2g[idx].ctlEdges[edge]);
578 else
579 - return ctl_5g[idx].ctlEdges[edge].tPower;
580 + return CTL_EDGE_TPOWER(ctl_5g[idx].ctlEdges[edge]);
581 }
582
583 static u16 ar9003_hw_get_indirect_edge_power(struct ar9300_eeprom *eep,
584 @@ -4385,12 +4387,12 @@ static u16 ar9003_hw_get_indirect_edge_p
585
586 if (is2GHz) {
587 if (ath9k_hw_fbin2freq(ctl_freqbin[edge - 1], 1) < freq &&
588 - ctl_2g[idx].ctlEdges[edge - 1].flag)
589 - return ctl_2g[idx].ctlEdges[edge - 1].tPower;
590 + CTL_EDGE_FLAGS(ctl_2g[idx].ctlEdges[edge - 1]))
591 + return CTL_EDGE_TPOWER(ctl_2g[idx].ctlEdges[edge - 1]);
592 } else {
593 if (ath9k_hw_fbin2freq(ctl_freqbin[edge - 1], 0) < freq &&
594 - ctl_5g[idx].ctlEdges[edge - 1].flag)
595 - return ctl_5g[idx].ctlEdges[edge - 1].tPower;
596 + CTL_EDGE_FLAGS(ctl_5g[idx].ctlEdges[edge - 1]))
597 + return CTL_EDGE_TPOWER(ctl_5g[idx].ctlEdges[edge - 1]);
598 }
599
600 return AR9300_MAX_RATE_POWER;
601 --- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.h
602 +++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.h
603 @@ -270,17 +270,12 @@ struct cal_tgt_pow_ht {
604 u8 tPow2x[14];
605 } __packed;
606
607 -struct cal_ctl_edge_pwr {
608 - u8 tPower:6,
609 - flag:2;
610 -} __packed;
611 -
612 struct cal_ctl_data_2g {
613 - struct cal_ctl_edge_pwr ctlEdges[AR9300_NUM_BAND_EDGES_2G];
614 + u8 ctlEdges[AR9300_NUM_BAND_EDGES_2G];
615 } __packed;
616
617 struct cal_ctl_data_5g {
618 - struct cal_ctl_edge_pwr ctlEdges[AR9300_NUM_BAND_EDGES_5G];
619 + u8 ctlEdges[AR9300_NUM_BAND_EDGES_5G];
620 } __packed;
621
622 struct ar9300_BaseExtension_1 {
623 --- a/drivers/net/wireless/ath/ath9k/eeprom.c
624 +++ b/drivers/net/wireless/ath/ath9k/eeprom.c
625 @@ -240,16 +240,16 @@ u16 ath9k_hw_get_max_edge_power(u16 freq
626 for (i = 0; (i < num_band_edges) &&
627 (pRdEdgesPower[i].bChannel != AR5416_BCHAN_UNUSED); i++) {
628 if (freq == ath9k_hw_fbin2freq(pRdEdgesPower[i].bChannel, is2GHz)) {
629 - twiceMaxEdgePower = pRdEdgesPower[i].tPower;
630 + twiceMaxEdgePower = CTL_EDGE_TPOWER(pRdEdgesPower[i].ctl);
631 break;
632 } else if ((i > 0) &&
633 (freq < ath9k_hw_fbin2freq(pRdEdgesPower[i].bChannel,
634 is2GHz))) {
635 if (ath9k_hw_fbin2freq(pRdEdgesPower[i - 1].bChannel,
636 is2GHz) < freq &&
637 - pRdEdgesPower[i - 1].flag) {
638 + CTL_EDGE_FLAGS(pRdEdgesPower[i - 1].ctl)) {
639 twiceMaxEdgePower =
640 - pRdEdgesPower[i - 1].tPower;
641 + CTL_EDGE_TPOWER(pRdEdgesPower[i - 1].ctl);
642 }
643 break;
644 }
645 --- a/drivers/net/wireless/ath/ath9k/eeprom.h
646 +++ b/drivers/net/wireless/ath/ath9k/eeprom.h
647 @@ -233,6 +233,18 @@
648
649 #define AR9287_CHECKSUM_LOCATION (AR9287_EEP_START_LOC + 1)
650
651 +#define CTL_EDGE_TPOWER(_ctl) ((_ctl) & 0x3f)
652 +#define CTL_EDGE_FLAGS(_ctl) (((_ctl) >> 6) & 0x03)
653 +
654 +#define LNA_CTL_BUF_MODE BIT(0)
655 +#define LNA_CTL_ISEL_LO BIT(1)
656 +#define LNA_CTL_ISEL_HI BIT(2)
657 +#define LNA_CTL_BUF_IN BIT(3)
658 +#define LNA_CTL_FEM_BAND BIT(4)
659 +#define LNA_CTL_LOCAL_BIAS BIT(5)
660 +#define LNA_CTL_FORCE_XPA BIT(6)
661 +#define LNA_CTL_USE_ANT1 BIT(7)
662 +
663 enum eeprom_param {
664 EEP_NFTHRESH_5,
665 EEP_NFTHRESH_2,
666 @@ -379,10 +391,7 @@ struct modal_eep_header {
667 u8 xatten2Margin[AR5416_MAX_CHAINS];
668 u8 ob_ch1;
669 u8 db_ch1;
670 - u8 useAnt1:1,
671 - force_xpaon:1,
672 - local_bias:1,
673 - femBandSelectUsed:1, xlnabufin:1, xlnaisel:2, xlnabufmode:1;
674 + u8 lna_ctl;
675 u8 miscBits;
676 u16 xpaBiasLvlFreq[3];
677 u8 futureModal[6];
678 @@ -536,18 +545,10 @@ struct cal_target_power_ht {
679 u8 tPow2x[8];
680 } __packed;
681
682 -
683 -#ifdef __BIG_ENDIAN_BITFIELD
684 struct cal_ctl_edges {
685 u8 bChannel;
686 - u8 flag:2, tPower:6;
687 + u8 ctl;
688 } __packed;
689 -#else
690 -struct cal_ctl_edges {
691 - u8 bChannel;
692 - u8 tPower:6, flag:2;
693 -} __packed;
694 -#endif
695
696 struct cal_data_op_loop_ar9287 {
697 u8 pwrPdg[2][5];
698 --- a/drivers/net/wireless/ath/ath9k/eeprom_def.c
699 +++ b/drivers/net/wireless/ath/ath9k/eeprom_def.c
700 @@ -451,9 +451,10 @@ static void ath9k_hw_def_set_board_value
701 ath9k_hw_analog_shift_rmw(ah, AR_AN_TOP2,
702 AR_AN_TOP2_LOCALBIAS,
703 AR_AN_TOP2_LOCALBIAS_S,
704 - pModal->local_bias);
705 + !!(pModal->lna_ctl &
706 + LNA_CTL_LOCAL_BIAS));
707 REG_RMW_FIELD(ah, AR_PHY_XPA_CFG, AR_PHY_FORCE_XPA_CFG,
708 - pModal->force_xpaon);
709 + !!(pModal->lna_ctl & LNA_CTL_FORCE_XPA));
710 }
711
712 REG_RMW_FIELD(ah, AR_PHY_SETTLING, AR_PHY_SETTLING_SWITCH,
713 @@ -1435,9 +1436,9 @@ static u8 ath9k_hw_def_get_num_ant_confi
714
715 num_ant_config = 1;
716
717 - if (pBase->version >= 0x0E0D)
718 - if (pModal->useAnt1)
719 - num_ant_config += 1;
720 + if (pBase->version >= 0x0E0D &&
721 + (pModal->lna_ctl & LNA_CTL_USE_ANT1))
722 + num_ant_config += 1;
723
724 return num_ant_config;
725 }
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