brcm-2.4: add support for 8-bit flash bus width
[openwrt.git] / tools / firmware-utils / src / zynos.h
1 /*
2 *
3 * Copyright (C) 2007-2008 OpenWrt.org
4 * Copyright (C) 2007-2008 Gabor Juhos <juhosg at openwrt.org>
5 *
6 * This code was based on the information of the ZyXEL's firmware
7 * image format written by Kolja Waschk, can be found at:
8 * http://www.ixo.de/info/zyxel_uclinux
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License version 2 as published
12 * by the Free Software Foundation.
13 *
14 */
15
16 #ifndef _ZYNOS_H
17 #define _ZYNOS_H
18
19 #define BOOTBASE_NAME_LEN 32
20 #define BOOTBASE_MAC_LEN 6
21 #define BOOTBASE_FEAT_LEN 22
22
23 #define BOOTEXT_DEF_SIZE 0x18000
24
25 struct zyn_bootbase_info {
26 char vendor[BOOTBASE_NAME_LEN]; /* Vendor name */
27 char model[BOOTBASE_NAME_LEN]; /* Model name */
28 uint32_t bootext_addr; /* absolute address of the Boot Extension */
29 uint16_t res0; /* reserved/unknown */
30 uint8_t sys_type; /* system type */
31 uint8_t res1; /* reserved/unknown */
32 uint16_t model_id; /* model id */
33 uint8_t feat_other[BOOTBASE_FEAT_LEN]; /* other feature bits */
34 uint8_t feat_main; /* main feature bits */
35 uint8_t res2; /* reserved/unknown */
36 uint8_t mac[BOOTBASE_MAC_LEN]; /* mac address */
37 uint8_t country; /* default country code */
38 uint8_t dbgflag; /* debug flag */
39 } __attribute__((packed));
40
41 #define ROMBIN_SIG_LEN 3
42 #define ROMBIN_VER_LEN 15
43
44 struct zyn_rombin_hdr {
45 uint32_t addr; /* load address of the object */
46 uint16_t res0; /* unknown/unused */
47 char sig[ROMBIN_SIG_LEN]; /* magic, must be "SIG" */
48 uint8_t type; /* type of the object */
49 uint32_t osize; /* size of the uncompressed data */
50 uint32_t csize; /* size of the compressed data */
51 uint8_t flags; /* various flags */
52 uint8_t res1; /* unknown/unused */
53 uint16_t ocsum; /* csum of the uncompressed data */
54 uint16_t ccsum; /* csum of the compressed data */
55 char ver[ROMBIN_VER_LEN];
56 uint32_t mmap_addr; /* address of the Memory Map Table*/
57 uint32_t res2; /* unknown/unused*/
58 uint8_t res3; /* unknown/unused*/
59 } __attribute__((packed));
60
61 #define ROMBIN_SIGNATURE "SIG"
62
63 /* Rombin flag bits */
64 #define ROMBIN_FLAG_01 0x01
65 #define ROMBIN_FLAG_02 0x02
66 #define ROMBIN_FLAG_04 0x04
67 #define ROMBIN_FLAG_08 0x08
68 #define ROMBIN_FLAG_10 0x10
69 #define ROMBIN_FLAG_CCSUM 0x20 /* compressed checksum is valid */
70 #define ROMBIN_FLAG_OCSUM 0x40 /* original checksum is valid */
71 #define ROMBIN_FLAG_COMPRESSED 0x80 /* the binary is compressed */
72
73 /* Object types */
74 #define OBJECT_TYPE_ROMIMG 0x01
75 #define OBJECT_TYPE_ROMBOOT 0x02
76 #define OBJECT_TYPE_BOOTEXT 0x03
77 #define OBJECT_TYPE_ROMBIN 0x04
78 #define OBJECT_TYPE_ROMDIR 0x05
79 #define OBJECT_TYPE_6 0x06
80 #define OBJECT_TYPE_ROMMAP 0x07
81 #define OBJECT_TYPE_RAM 0x80
82 #define OBJECT_TYPE_RAMCODE 0x81
83 #define OBJECT_TYPE_RAMBOOT 0x82
84
85 /*
86 * Memory Map Table header
87 */
88 struct zyn_mmt_hdr {
89 uint16_t count;
90 uint32_t user_start;
91 uint32_t user_end;
92 uint16_t csum;
93 uint8_t res[12];
94 } __attribute__((packed));
95
96 #define OBJECT_NAME_LEN 8
97
98 struct zyn_mmt_item {
99 uint8_t type; /* type of the object */
100 uint8_t name[OBJECT_NAME_LEN]; /* name of the object */
101 uint8_t res0; /* unused/unknown */
102 uint32_t addr;
103 uint32_t size; /* size of the object */
104 uint8_t res1[3]; /* unused/unknown */
105 uint8_t type2;
106 } __attribute__((packed));
107
108 /*
109 * Vendor IDs
110 */
111 #define ZYNOS_VENDOR_ID_ZYXEL 0
112 #define ZYNOS_VENDOR_ID_NETGEAR 1
113 #define ZYNOS_VENDOR_ID_DLINK 2
114 #define ZYNOS_VENDOR_ID_03 3
115 #define ZYNOS_VENDOR_ID_LUCENT 4
116 #define ZYNOS_VENDOR_ID_O2 10
117
118 /*
119 * Model IDs (in big-endian format)
120 */
121 #define MID(x) (((x) & 0xFF) << 8) | (((x) & 0xFF00) >> 8)
122
123 /*
124 * Infineon/ADMtek ADM5120 based models
125 */
126 #define ZYNOS_MODEL_ES_2024A MID( 221)
127 #define ZYNOS_MODEL_ES_2024PWR MID( 4097)
128 #define ZYNOS_MODEL_ES_2108 MID(61952)
129 #define ZYNOS_MODEL_ES_2108_F MID(44801)
130 #define ZYNOS_MODEL_ES_2108_G MID(62208)
131 #define ZYNOS_MODEL_ES_2108_LC MID(64512)
132 #define ZYNOS_MODEL_ES_2108PWR MID(62464)
133 #define ZYNOS_MODEL_HS_100 MID(61855)
134 #define ZYNOS_MODEL_HS_100W ZYNOS_MODEL_HS_100
135 #define ZYNOS_MODEL_P_334 MID(62879)
136 #define ZYNOS_MODEL_P_334U MID(56735)
137 #define ZYNOS_MODEL_P_334W MID(62367)
138 #define ZYNOS_MODEL_P_334WH MID(57344)
139 #define ZYNOS_MODEL_P_334WHD MID(57600)
140 #define ZYNOS_MODEL_P_334WT MID(61343)
141 #define ZYNOS_MODEL_P_335 MID(60831)
142 #define ZYNOS_MODEL_P_335PLUS MID( 9472)
143 #define ZYNOS_MODEL_P_335U MID(56479)
144 #define ZYNOS_MODEL_P_335WT ZYNOS_MODEL_P_335
145
146 /*
147 * Texas Instruments AR7 based models
148 */
149 #define ZYNOS_MODEL_P_2602H_61C MID( 3229)
150 #define ZYNOS_MODEL_P_2602H_63C MID( 3485)
151 #define ZYNOS_MODEL_P_2602H_D1A /* n.a. */
152 #define ZYNOS_MODEL_P_2602H_D3A /* n.a. */
153 #define ZYNOS_MODEL_P_2602HW_61C /* n.a. */
154 #define ZYNOS_MODEL_P_2602HW_63 /* n.a. */
155 #define ZYNOS_MODEL_P_2602HW_63C ZYNOS_MODEL_P_2602H_63C
156 #define ZYNOS_MODEL_P_2602HW_D1A MID( 6301)
157 #define ZYNOS_MODEL_P_2602HW_D3A /* n.a. */
158 #define ZYNOS_MODEL_P_2602HWL_61 MID( 1181)
159 #define ZYNOS_MODEL_P_2602HWL_61C ZYNOS_MODEL_P_2602H_61C
160 #define ZYNOS_MODEL_P_2602HWL_63C ZYNOS_MODEL_P_2602H_63C
161 #define ZYNOS_MODEL_P_2602HWL_D1A ZYNOS_MODEL_P_2602HW_D1A
162 #define ZYNOS_MODEL_P_2602HWL_D3A MID( 7581)
163 #define ZYNOS_MODEL_P_2602HWN_D7A MID(30464)
164 #define ZYNOS_MODEL_P_2602HWNLI_D7A MID( 6813)
165
166 #define ZYNOS_MODEL_P_2602R_61 MID( 2205)
167 #define ZYNOS_MODEL_P_2602R_63 MID( 3997)
168 #define ZYNOS_MODEL_P_2602R_D1A /* n.a. */
169 #define ZYNOS_MODEL_P_2602R_D3A /* n.a. */
170 #define ZYNOS_MODEL_P_2602RL_D1A MID( 6045)
171 #define ZYNOS_MODEL_P_2602RL_D3A MID( 7069)
172
173 #define ZYNOS_MODEL_P_660H_61 MID(19346)
174 #define ZYNOS_MODEL_P_660H_63 MID(22162)
175 #define ZYNOS_MODEL_P_660H_67 /* n.a. */
176 #define ZYNOS_MODEL_P_660H_D1 MID( 7066)
177 #define ZYNOS_MODEL_P_660H_D3 MID(13210)
178
179 #define ZYNOS_MODEL_P_660HW_61 ZYNOS_MODEL_P_660H_61
180 #define ZYNOS_MODEL_P_660HW_63 ZYNOS_MODEL_P_660H_63
181 #define ZYNOS_MODEL_P_660HW_67 ZYNOS_MODEL_P_660HW_63
182 #define ZYNOS_MODEL_P_660HW_D1 MID( 9114)
183 #define ZYNOS_MODEL_P_660HW_D3 MID(12698)
184
185 #define ZYNOS_MODEL_P_660R_61 MID(20882)
186 #define ZYNOS_MODEL_P_660R_61C MID( 1178)
187 #define ZYNOS_MODEL_P_660R_63 MID(21138)
188 #define ZYNOS_MODEL_P_660R_63C MID( 922)
189 #define ZYNOS_MODEL_P_660R_67 ZYNOS_MODEL_P_660R_63
190 #define ZYNOS_MODEL_P_660R_67C /* n.a. */
191 #define ZYNOS_MODEL_P_660R_D1 MID( 7322)
192 #define ZYNOS_MODEL_P_660R_D3 MID(10138)
193
194 #define ZYNOS_MODEL_P_661H_61 MID(19346)
195 #define ZYNOS_MODEL_P_661H_63 MID( 1946)
196 #define ZYNOS_MODEL_P_661H_D1 MID(10650)
197 #define ZYNOS_MODEL_P_661H_D3 MID(12442)
198
199 #define ZYNOS_MODEL_P_661HW_61 ZYNOS_MODEL_P_661H_61
200 #define ZYNOS_MODEL_P_661HW_63 ZYNOS_MODEL_P_661H_63
201 #define ZYNOS_MODEL_P_661HW_D1 MID(10906)
202 #define ZYNOS_MODEL_P_661HW_D3 MID(14746)
203
204 #define ZYNOS_MODEL_P_662H_61 MID(22418)
205 #define ZYNOS_MODEL_P_662H_63 /* n.a. */
206 #define ZYNOS_MODEL_P_662H_67 /* n.a. */
207 #define ZYNOS_MODEL_P_662H_D1 /* n.a. */
208 #define ZYNOS_MODEL_P_662H_D3 /* n.a. */
209
210 #define ZYNOS_MODEL_P_662HW_61 /* n.a. */
211 #define ZYNOS_MODEL_P_662HW_63 MID(22674)
212 #define ZYNOS_MODEL_P_662HW_67 /* n.a. */
213 #define ZYNOS_MODEL_P_662HW_D1 MID(10394)
214 #define ZYNOS_MODEL_P_662HW_D3 MID(12954)
215
216 /* OEM boards */
217 #define ZYNOS_MODEL_O2SURF ZYNOS_MODEL_P_2602HWN_D7A
218
219 /* Atheros AR2318 based boards */
220 #define ZYNOS_MODEL_NBG_318S MID(59392)
221
222 #endif /* _ZYNOS_H */
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