1 From 7e59b95e3424c078de0d75d699433da0dd289fc1 Mon Sep 17 00:00:00 2001
2 From: Gabor Juhos <juhosg@openwrt.org>
3 Date: Fri, 18 Nov 2011 10:13:37 +0100
4 Subject: [PATCH 04/35] MIPS: ath79: make ath724x_pcibios_init visible for external code
6 Content-Type: text/plain; charset=UTF-8
7 Content-Transfer-Encoding: 8bit
9 Signed-off-by: René Bolldorf <xsecute@googlemail.com>
10 Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
14 v2: - fix a typo in my e-mail address
16 arch/mips/include/asm/mach-ath79/pci.h | 20 ++++++++++++++++++++
17 arch/mips/pci/pci-ath724x.c | 3 ++-
18 2 files changed, 22 insertions(+), 1 deletions(-)
19 create mode 100644 arch/mips/include/asm/mach-ath79/pci.h
22 +++ b/arch/mips/include/asm/mach-ath79/pci.h
25 + * Atheros 724x PCI support
27 + * Copyright (C) 2011 René Bolldorf <xsecute@googlemail.com>
29 + * This program is free software; you can redistribute it and/or modify it
30 + * under the terms of the GNU General Public License version 2 as published
31 + * by the Free Software Foundation.
34 +#ifndef __ASM_MACH_ATH79_PCI_H
35 +#define __ASM_MACH_ATH79_PCI_H
37 +#if defined(CONFIG_PCI) && defined(CONFIG_SOC_AR724X)
38 +int ath724x_pcibios_init(void);
40 +static inline int ath724x_pcibios_init(void) { return 0 };
43 +#endif /* __ASM_MACH_ATH79_PCI_H */
44 --- a/arch/mips/pci/pci-ath724x.c
45 +++ b/arch/mips/pci/pci-ath724x.c
49 #include <linux/pci.h>
50 +#include <asm/mach-ath79/pci.h>
52 #define reg_read(_phys) (*(unsigned int *) KSEG1ADDR(_phys))
53 #define reg_write(_phys, _val) ((*(unsigned int *) KSEG1ADDR(_phys)) = (_val))
54 @@ -130,7 +131,7 @@ static struct pci_controller ath724x_pci
55 .mem_resource = &ath724x_mem_resource,
58 -static int __init ath724x_pcibios_init(void)
59 +int __init ath724x_pcibios_init(void)
61 register_pci_controller(&ath724x_pci_controller);