package/mac80211/patches/531-ath9k_paprd_rate_mask.patch

   1 --- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.h
   2 +++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.h
   3 @@ -31,6 +31,12 @@
   4  #define AR9300_ANT_16S               25
   5  #define AR9300_FUTURE_MODAL_SZ       6
   6
   7 +#define AR9300_PAPRD_RATE_MASK         0x01ffffff
   8 +#define AR9300_PAPRD_SCALE_1           0x0e000000
   9 +#define AR9300_PAPRD_SCALE_1_S         25
  10 +#define AR9300_PAPRD_SCALE_2           0x70000000
  11 +#define AR9300_PAPRD_SCALE_2_S         28
  12 +
  13  /* Delta from which to start power to pdadc table */
  14  /* This offset is used in both open loop and closed loop power control
  15   * schemes. In open loop power control, it is not really needed, but for
  16 --- a/drivers/net/wireless/ath/ath9k/ar9003_paprd.c
  17 +++ b/drivers/net/wireless/ath/ath9k/ar9003_paprd.c
  18 @@ -52,8 +52,8 @@ static void ar9003_paprd_setup_single_ta
  19         else
  20                 hdr = &eep->modalHeader2G;
  21
  22 -       am_mask = le32_to_cpu(hdr->papdRateMaskHt20);
  23 -       ht40_mask = le32_to_cpu(hdr->papdRateMaskHt40);
  24 +       am_mask = le32_to_cpu(hdr->papdRateMaskHt20) & AR9300_PAPRD_RATE_MASK;
  25 +       ht40_mask = le32_to_cpu(hdr->papdRateMaskHt40) & AR9300_PAPRD_RATE_MASK;
  26
  27         REG_RMW_FIELD(ah, AR_PHY_PAPRD_AM2AM, AR_PHY_PAPRD_AM2AM_MASK, am_mask);
  28         REG_RMW_FIELD(ah, AR_PHY_PAPRD_AM2PM, AR_PHY_PAPRD_AM2PM_MASK, am_mask);