2 Copyright (C) 2004 - 2007 rt2x00 SourceForge Project
3 <http://rt2x00.serialmonkey.com>
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the
17 Free Software Foundation, Inc.,
18 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
23 Abstract: rt2x00 generic pci device routines.
24 Supported chipsets: rt2460, rt2560, rt2561, rt2561s & rt2661.
28 * Set enviroment defines for rt2x00.h
30 #define DRV_NAME "rt2x00pci"
32 #include <linux/kernel.h>
33 #include <linux/module.h>
34 #include <linux/version.h>
35 #include <linux/init.h>
36 #include <linux/pci.h>
39 #include "rt2x00pci.h"
44 int rt2x00pci_beacon_update(struct ieee80211_hw
*hw
, struct sk_buff
*skb
,
45 struct ieee80211_tx_control
*control
)
47 struct rt2x00_dev
*rt2x00dev
= hw
->priv
;
48 struct data_ring
*ring
=
49 rt2x00_get_ring(rt2x00dev
, IEEE80211_TX_QUEUE_BEACON
);
50 struct data_entry
*entry
= rt2x00_get_data_entry(ring
);
53 * Just in case the ieee80211 doesn't set this,
54 * but we need this queue set for the descriptor
57 control
->queue
= IEEE80211_TX_QUEUE_BEACON
;
60 * Update the beacon entry.
62 memcpy(entry
->data_addr
, skb
->data
, skb
->len
);
63 rt2x00lib_write_tx_desc(rt2x00dev
, entry
, entry
->priv
,
64 (struct ieee80211_hdr
*)skb
->data
, skb
->len
, control
);
67 * Enable beacon generation.
69 rt2x00dev
->ops
->lib
->kick_tx_queue(rt2x00dev
, control
->queue
);
73 EXPORT_SYMBOL_GPL(rt2x00pci_beacon_update
);
75 void rt2x00pci_beacondone(struct rt2x00_dev
*rt2x00dev
, const int queue
)
77 struct data_ring
*ring
= rt2x00_get_ring(rt2x00dev
, queue
);
78 struct data_entry
*entry
= rt2x00_get_data_entry(ring
);
81 skb
= ieee80211_beacon_get(rt2x00dev
->hw
,
82 rt2x00dev
->interface
.id
, &entry
->tx_status
.control
);
86 rt2x00dev
->ops
->hw
->beacon_update(rt2x00dev
->hw
, skb
,
87 &entry
->tx_status
.control
);
91 EXPORT_SYMBOL_GPL(rt2x00pci_beacondone
);
96 int rt2x00pci_write_tx_data(struct rt2x00_dev
*rt2x00dev
,
97 struct data_ring
*ring
, struct sk_buff
*skb
,
98 struct ieee80211_tx_control
*control
)
100 struct ieee80211_hdr
*ieee80211hdr
= (struct ieee80211_hdr
*)skb
->data
;
101 struct data_entry
*entry
= rt2x00_get_data_entry(ring
);
102 struct data_desc
*txd
= entry
->priv
;
105 if (rt2x00_ring_full(ring
)) {
106 ieee80211_stop_queue(rt2x00dev
->hw
, control
->queue
);
110 rt2x00_desc_read(txd
, 0, &word
);
112 if (rt2x00_get_field32(word
, TXD_ENTRY_AVAILABLE
)) {
114 "Arrived at non-free entry in the non-full queue %d.\n"
115 "Please file bug report to %s.\n",
116 control
->queue
, DRV_PROJECT
);
117 ieee80211_stop_queue(rt2x00dev
->hw
, control
->queue
);
121 memcpy(entry
->data_addr
, skb
->data
, skb
->len
);
122 rt2x00lib_write_tx_desc(rt2x00dev
, entry
, txd
, ieee80211hdr
,
124 memcpy(&entry
->tx_status
.control
, control
, sizeof(*control
));
127 rt2x00_ring_index_inc(ring
);
129 if (rt2x00_ring_full(ring
))
130 ieee80211_stop_queue(rt2x00dev
->hw
, control
->queue
);
134 EXPORT_SYMBOL_GPL(rt2x00pci_write_tx_data
);
137 * Device initialization handlers.
139 #define priv_offset(__ring, __i) \
141 ring->data_addr + (i * ring->desc_size); \
144 #define data_addr_offset(__ring, __i) \
146 (__ring)->data_addr \
147 + ((__ring)->stats.limit * (__ring)->desc_size) \
148 + ((__i) * (__ring)->data_size); \
151 #define data_dma_offset(__ring, __i) \
154 + ((__ring)->stats.limit * (__ring)->desc_size) \
155 + ((__i) * (__ring)->data_size); \
158 static int rt2x00pci_alloc_ring(struct rt2x00_dev
*rt2x00dev
,
159 struct data_ring
*ring
)
164 * Allocate DMA memory for descriptor and buffer.
166 ring
->data_addr
= pci_alloc_consistent(rt2x00dev_pci(rt2x00dev
),
167 rt2x00_get_ring_size(ring
), &ring
->data_dma
);
168 if (!ring
->data_addr
)
172 * Initialize all ring entries to contain valid
175 for (i
= 0; i
< ring
->stats
.limit
; i
++) {
176 ring
->entry
[i
].priv
= priv_offset(ring
, i
);
177 ring
->entry
[i
].data_addr
= data_addr_offset(ring
, i
);
178 ring
->entry
[i
].data_dma
= data_dma_offset(ring
, i
);
184 int rt2x00pci_initialize(struct rt2x00_dev
*rt2x00dev
)
186 struct pci_dev
*pci_dev
= rt2x00dev_pci(rt2x00dev
);
187 struct data_ring
*ring
;
193 ring_for_each(rt2x00dev
, ring
) {
194 status
= rt2x00pci_alloc_ring(rt2x00dev
, ring
);
200 * Register interrupt handler.
202 status
= request_irq(pci_dev
->irq
, rt2x00dev
->ops
->lib
->irq_handler
,
203 IRQF_SHARED
, pci_dev
->driver
->name
, rt2x00dev
);
205 ERROR(rt2x00dev
, "IRQ %d allocation failed (error %d).\n",
206 pci_dev
->irq
, status
);
213 rt2x00pci_uninitialize(rt2x00dev
);
217 EXPORT_SYMBOL_GPL(rt2x00pci_initialize
);
219 void rt2x00pci_uninitialize(struct rt2x00_dev
*rt2x00dev
)
221 struct data_ring
*ring
;
226 free_irq(rt2x00dev_pci(rt2x00dev
)->irq
, rt2x00dev
);
231 ring_for_each(rt2x00dev
, ring
) {
233 pci_free_consistent(rt2x00dev_pci(rt2x00dev
),
234 rt2x00_get_ring_size(ring
),
235 ring
->data_addr
, ring
->data_dma
);
236 ring
->data_addr
= NULL
;
239 EXPORT_SYMBOL_GPL(rt2x00pci_uninitialize
);
242 * PCI driver handlers.
244 static int rt2x00pci_alloc_csr(struct rt2x00_dev
*rt2x00dev
)
246 rt2x00dev
->csr_addr
= ioremap(
247 pci_resource_start(rt2x00dev_pci(rt2x00dev
), 0),
248 pci_resource_len(rt2x00dev_pci(rt2x00dev
), 0));
249 if (!rt2x00dev
->csr_addr
) {
250 ERROR(rt2x00dev
, "Ioremap failed.\n");
257 static void rt2x00pci_free_csr(struct rt2x00_dev
*rt2x00dev
)
259 if (rt2x00dev
->csr_addr
) {
260 iounmap(rt2x00dev
->csr_addr
);
261 rt2x00dev
->csr_addr
= NULL
;
265 int rt2x00pci_probe(struct pci_dev
*pci_dev
, const struct pci_device_id
*id
)
267 struct rt2x00_ops
*ops
= (struct rt2x00_ops
*)id
->driver_data
;
268 struct ieee80211_hw
*hw
;
269 struct rt2x00_dev
*rt2x00dev
;
272 retval
= pci_request_regions(pci_dev
, pci_name(pci_dev
));
274 ERROR_PROBE("PCI request regions failed.\n");
278 retval
= pci_enable_device(pci_dev
);
280 ERROR_PROBE("Enable device failed.\n");
281 goto exit_release_regions
;
284 pci_set_master(pci_dev
);
286 if (pci_set_mwi(pci_dev
))
287 ERROR_PROBE("MWI not available.\n");
289 if (pci_set_dma_mask(pci_dev
, DMA_64BIT_MASK
) &&
290 pci_set_dma_mask(pci_dev
, DMA_32BIT_MASK
)) {
291 ERROR_PROBE("PCI DMA not supported.\n");
293 goto exit_disable_device
;
296 hw
= ieee80211_alloc_hw(sizeof(struct rt2x00_dev
), ops
->hw
);
298 ERROR_PROBE("Failed to allocate hardware.\n");
300 goto exit_disable_device
;
303 pci_set_drvdata(pci_dev
, hw
);
305 rt2x00dev
= hw
->priv
;
306 rt2x00dev
->dev
= pci_dev
;
307 rt2x00dev
->device
= &pci_dev
->dev
;
308 rt2x00dev
->ops
= ops
;
311 retval
= rt2x00pci_alloc_csr(rt2x00dev
);
313 goto exit_free_device
;
315 retval
= rt2x00lib_probe_dev(rt2x00dev
);
322 rt2x00pci_free_csr(rt2x00dev
);
325 ieee80211_free_hw(hw
);
328 if (retval
!= -EBUSY
)
329 pci_disable_device(pci_dev
);
331 exit_release_regions
:
332 pci_release_regions(pci_dev
);
334 pci_set_drvdata(pci_dev
, NULL
);
338 EXPORT_SYMBOL_GPL(rt2x00pci_probe
);
340 void rt2x00pci_remove(struct pci_dev
*pci_dev
)
342 struct ieee80211_hw
*hw
= pci_get_drvdata(pci_dev
);
343 struct rt2x00_dev
*rt2x00dev
= hw
->priv
;
346 * Free all allocated data.
348 rt2x00lib_remove_dev(rt2x00dev
);
349 ieee80211_free_hw(hw
);
352 * Free the PCI device data.
354 pci_set_drvdata(pci_dev
, NULL
);
355 pci_disable_device(pci_dev
);
356 pci_release_regions(pci_dev
);
358 EXPORT_SYMBOL_GPL(rt2x00pci_remove
);
361 int rt2x00pci_suspend(struct pci_dev
*pci_dev
, pm_message_t state
)
363 struct ieee80211_hw
*hw
= pci_get_drvdata(pci_dev
);
364 struct rt2x00_dev
*rt2x00dev
= hw
->priv
;
367 retval
= rt2x00lib_suspend(rt2x00dev
, state
);
371 rt2x00pci_free_csr(rt2x00dev
);
373 pci_save_state(pci_dev
);
374 pci_disable_device(pci_dev
);
375 return pci_set_power_state(pci_dev
, pci_choose_state(pci_dev
, state
));
377 EXPORT_SYMBOL_GPL(rt2x00pci_suspend
);
379 int rt2x00pci_resume(struct pci_dev
*pci_dev
)
381 struct ieee80211_hw
*hw
= pci_get_drvdata(pci_dev
);
382 struct rt2x00_dev
*rt2x00dev
= hw
->priv
;
385 if (pci_set_power_state(pci_dev
, PCI_D0
) ||
386 pci_enable_device(pci_dev
) ||
387 pci_restore_state(pci_dev
)) {
388 ERROR(rt2x00dev
, "Failed to resume device.\n");
392 retval
= rt2x00pci_alloc_csr(rt2x00dev
);
396 return rt2x00lib_resume(rt2x00dev
);
398 EXPORT_SYMBOL_GPL(rt2x00pci_resume
);
399 #endif /* CONFIG_PM */
402 * rt2x00pci module information.
404 MODULE_AUTHOR(DRV_PROJECT
);
405 MODULE_VERSION(DRV_VERSION
);
406 MODULE_DESCRIPTION("rt2x00 library");
407 MODULE_LICENSE("GPL");