target/linux/cns21xx/patches-2.6.37/204-cns21xx-add-gec-device.patch

   1 --- a/arch/arm/mach-cns21xx/Kconfig
   2 +++ b/arch/arm/mach-cns21xx/Kconfig
   3 @@ -3,6 +3,9 @@ if ARCH_CNS21XX
   4  menu "Cavium Networks CNS21xx based machines"
   5  endmenu
   6
   7 +config CNS21XX_DEV_GEC
   8 +       def_bool n
   9 +
  10  config CNS21XX_DEV_USB
  11         def_bool n
  12
  13 --- a/arch/arm/mach-cns21xx/Makefile
  14 +++ b/arch/arm/mach-cns21xx/Makefile
  15 @@ -7,6 +7,7 @@
  16  obj-y          := core.o devices.o gpio.o irq.o mm.o time.o
  17
  18  # devices
  19 +obj-$(CONFIG_CNS21XX_DEV_GEC)          += dev-gec.o
  20  obj-$(CONFIG_CNS21XX_DEV_USB)          += dev-usb.o
  21  obj-$(CONFIG_CNS21XX_DEV_SPI_MASTER)   += dev-spi-master.o
  22
  23 --- /dev/null
  24 +++ b/arch/arm/mach-cns21xx/dev-gec.c
  25 @@ -0,0 +1,98 @@
  26 +/*
  27 + *  Copyright (c) 2010 Gabor Juhos <juhosg@openwrt.org>
  28 + *
  29 + *  This file is free software; you can redistribute it and/or modify
  30 + *  it under the terms of the GNU General Public License, Version 2, as
  31 + *  published by the Free Software Foundation.
  32 + */
  33 +
  34 +#include <linux/init.h>
  35 +#include <linux/dma-mapping.h>
  36 +#include <linux/platform_device.h>
  37 +#include <linux/etherdevice.h>
  38 +
  39 +#include <asm/sizes.h>
  40 +#include <mach/cns21xx.h>
  41 +#include <mach/irqs.h>
  42 +
  43 +#include "dev-gec.h"
  44 +
  45 +static u8 cns21xx_ethaddr[ETH_ALEN];
  46 +struct cns21xx_gec_plat_data cns21xx_gec_data;
  47 +
  48 +static struct resource cns21xx_gec_resources[] = {
  49 +       {
  50 +               .start  = CNS21XX_NIC_BASE,
  51 +               .end    = CNS21XX_NIC_BASE + SZ_4K - 1,
  52 +               .flags  = IORESOURCE_MEM,
  53 +       }, {
  54 +               .name   = CNS21XX_GEC_STATUS_IRQ_NAME,
  55 +               .start  = CNS21XX_IRQ_NIC_STATUS,
  56 +               .end    = CNS21XX_IRQ_NIC_STATUS,
  57 +               .flags  = IORESOURCE_IRQ,
  58 +       }, {
  59 +               .name   = CNS21XX_GEC_RXRC_IRQ_NAME,
  60 +               .start  = CNS21XX_IRQ_NIC_RXRC,
  61 +               .end    = CNS21XX_IRQ_NIC_RXRC,
  62 +               .flags  = IORESOURCE_IRQ,
  63 +       }, {
  64 +               .name   = CNS21XX_GEC_RXQF_IRQ_NAME,
  65 +               .start  = CNS21XX_IRQ_NIC_RXQF,
  66 +               .end    = CNS21XX_IRQ_NIC_RXQF,
  67 +               .flags  = IORESOURCE_IRQ,
  68 +       }, {
  69 +               .name   = CNS21XX_GEC_TXTC_IRQ_NAME,
  70 +               .start  = CNS21XX_IRQ_NIC_TXTC,
  71 +               .end    = CNS21XX_IRQ_NIC_TXTC,
  72 +               .flags  = IORESOURCE_IRQ,
  73 +       }, {
  74 +               .name   = CNS21XX_GEC_TXQE_IRQ_NAME,
  75 +               .start  = CNS21XX_IRQ_NIC_TXQE,
  76 +               .end    = CNS21XX_IRQ_NIC_TXQE,
  77 +               .flags  = IORESOURCE_IRQ,
  78 +       }
  79 +};
  80 +
  81 +static u64 cns21xx_gec_dmamask = DMA_BIT_MASK(32);
  82 +static struct platform_device cns21xx_gec_device = {
  83 +       .name                   = "cns21xx-gec",
  84 +       .id                     = -1,
  85 +       .resource               = cns21xx_gec_resources,
  86 +       .num_resources          = ARRAY_SIZE(cns21xx_gec_resources),
  87 +       .dev = {
  88 +               .dma_mask               = &cns21xx_gec_dmamask,
  89 +               .coherent_dma_mask      = DMA_BIT_MASK(32),
  90 +               .platform_data          = &cns21xx_gec_data,
  91 +       },
  92 +};
  93 +
  94 +static int __init cns21xx_ethaddr_setup(char *str)
  95 +{
  96 +       int t;
  97 +
  98 +       t = sscanf(str, "%02hhx:%02hhx:%02hhx:%02hhx:%02hhx:%02hhx",
  99 +                  &cns21xx_ethaddr[0], &cns21xx_ethaddr[1],
 100 +                  &cns21xx_ethaddr[2], &cns21xx_ethaddr[3],
 101 +                  &cns21xx_ethaddr[4], &cns21xx_ethaddr[5]);
 102 +
 103 +       if (t != ETH_ALEN)
 104 +               pr_err("cns21xx: failed to parse mac address \"%s\"\n", str);
 105 +
 106 +       return 1;
 107 +}
 108 +
 109 +__setup("ethaddr=", cns21xx_ethaddr_setup);
 110 +
 111 +__init int cns21xx_register_gec(void)
 112 +{
 113 +       if (cns21xx_gec_data.mac_addr == NULL)
 114 +               cns21xx_gec_data.mac_addr = cns21xx_ethaddr;
 115 +
 116 +       if (!is_valid_ether_addr(cns21xx_gec_data.mac_addr)) {
 117 +               random_ether_addr(cns21xx_gec_data.mac_addr);
 118 +               pr_debug("cns21xx: using random MAC address \"%s\"\n",
 119 +                       cns21xx_gec_data.mac_addr);
 120 +       }
 121 +
 122 +       return platform_device_register(&cns21xx_gec_device);
 123 +}
 124 --- /dev/null
 125 +++ b/arch/arm/mach-cns21xx/dev-gec.h
 126 @@ -0,0 +1,18 @@
 127 +/*
 128 + *  Copyright (c) 2010 Gabor Juhos <juhosg@openwrt.org>
 129 + *
 130 + *  This file is free software; you can redistribute it and/or modify
 131 + *  it under the terms of the GNU General Public License, Version 2, as
 132 + *  published by the Free Software Foundation.
 133 + */
 134 +
 135 +#ifndef _CNS21XX_DEV_GEC_H
 136 +#define _CNS21XX_DEV_GEC_H
 137 +
 138 +#include <mach/cns21xx_gec_platform.h>
 139 +
 140 +extern struct cns21xx_gec_plat_data cns21xx_gec_data;
 141 +
 142 +__init int cns21xx_register_gec(void);
 143 +
 144 +#endif /* _CNS21XX_DEV_GEC_H */
 145 --- /dev/null
 146 +++ b/arch/arm/mach-cns21xx/include/mach/cns21xx_gec_platform.h
 147 @@ -0,0 +1,31 @@
 148 +/*
 149 + *  Copyright (c) 2010 Gabor Juhos <juhosg@openwrt.org>
 150 + *
 151 + *  This file is free software; you can redistribute it and/or modify
 152 + *  it under the terms of the GNU General Public License, Version 2, as
 153 + *  published by the Free Software Foundation.
 154 + */
 155 +
 156 +#ifndef _CNS21XX_GEC_PLATFORM_H
 157 +#define _CNS21XX_GEC_PLATFORM_H
 158 +
 159 +#define CNS21XX_GEC_STATUS_IRQ_NAME    "status"
 160 +#define CNS21XX_GEC_RXRC_IRQ_NAME      "rxrc"
 161 +#define CNS21XX_GEC_RXQF_IRQ_NAME      "rxqf"
 162 +#define CNS21XX_GEC_TXTC_IRQ_NAME      "txtc"
 163 +#define CNS21XX_GEC_TXQE_IRQ_NAME      "txqe"
 164 +
 165 +enum cns21xx_gec_phy_type {
 166 +       CNS21XX_GEC_PHY_TYPE_INTERNAL = 0,
 167 +       CNS21XX_GEC_PHY_TYPE_VSC8601,
 168 +       CNS21XX_GEC_PHY_TYPE_IP101A,
 169 +       CNS21XX_GEC_PHY_TYPE_IP1001,
 170 +};
 171 +
 172 +struct cns21xx_gec_plat_data {
 173 +       u8                              *mac_addr;
 174 +       enum cns21xx_gec_phy_type       phy_type;
 175 +       u8                              phy_addr;
 176 +};
 177 +
 178 +#endif /* _CNS21XX_GEC_PLATFORM_H */