atheros: update to 2.6.37.1
[openwrt.git] / target / linux / ar7 / patches-2.6.37 / 972-cpmac_fixup.patch
1 --- a/arch/mips/ar7/platform.c
2 +++ b/arch/mips/ar7/platform.c
3 @@ -33,7 +33,6 @@
4 #include <linux/string.h>
5 #include <linux/etherdevice.h>
6 #include <linux/phy.h>
7 -#include <linux/phy_fixed.h>
8 #include <linux/gpio.h>
9 #include <linux/clk.h>
10
11 @@ -248,12 +247,6 @@ static struct resource cpmac_high_res[]
12 },
13 };
14
15 -static struct fixed_phy_status fixed_phy_status __initdata = {
16 - .link = 1,
17 - .speed = 100,
18 - .duplex = 1,
19 -};
20 -
21 static struct plat_cpmac_data cpmac_low_data = {
22 .reset_bit = 17,
23 .power_bit = 20,
24 @@ -643,26 +636,18 @@ static int __init ar7_register_devices(v
25 }
26
27 if (ar7_has_high_cpmac()) {
28 - res = fixed_phy_add(PHY_POLL, cpmac_high.id, &fixed_phy_status);
29 - if (!res) {
30 - cpmac_get_mac(1, cpmac_high_data.dev_addr);
31 -
32 - res = platform_device_register(&cpmac_high);
33 - if (res)
34 - pr_warning("unable to register cpmac-high: %d\n", res);
35 - } else
36 - pr_warning("unable to add cpmac-high phy: %d\n", res);
37 - } else
38 - cpmac_low_data.phy_mask = 0xffffffff;
39 + cpmac_get_mac(1, cpmac_high_data.dev_addr);
40
41 - res = fixed_phy_add(PHY_POLL, cpmac_low.id, &fixed_phy_status);
42 - if (!res) {
43 - cpmac_get_mac(0, cpmac_low_data.dev_addr);
44 - res = platform_device_register(&cpmac_low);
45 + res = platform_device_register(&cpmac_high);
46 if (res)
47 - pr_warning("unable to register cpmac-low: %d\n", res);
48 + pr_warning("unable to register cpmac-high: %d\n", res);
49 } else
50 - pr_warning("unable to add cpmac-low phy: %d\n", res);
51 + cpmac_low_data.phy_mask = 0xffffffff;
52 +
53 + cpmac_get_mac(0, cpmac_low_data.dev_addr);
54 + res = platform_device_register(&cpmac_low);
55 + if (res)
56 + pr_warning("unable to register cpmac-low: %d\n", res);
57
58 detect_leds();
59 res = platform_device_register(&ar7_gpio_leds);
60 @@ -675,8 +660,10 @@ static int __init ar7_register_devices(v
61
62 /* Register watchdog only if enabled in hardware */
63 bootcr = ioremap_nocache(AR7_REGS_DCL, 4);
64 - val = readl(bootcr);
65 - iounmap(bootcr);
66 + if (bootcr) {
67 + val = readl(bootcr);
68 + iounmap(bootcr);
69 + }
70 if (val & AR7_WDT_HW_ENA) {
71 if (ar7_has_high_vlynq())
72 ar7_wdt_res.start = UR8_REGS_WDT;
73 --- a/arch/mips/include/asm/mach-ar7/ar7.h
74 +++ b/arch/mips/include/asm/mach-ar7/ar7.h
75 @@ -42,6 +42,7 @@
76 #define AR7_REGS_PINSEL (AR7_REGS_BASE + 0x160C)
77 #define AR7_REGS_VLYNQ0 (AR7_REGS_BASE + 0x1800)
78 #define AR7_REGS_DCL (AR7_REGS_BASE + 0x1a00)
79 +#define AR7_REGS_MII (AR7_REGS_BASE + 0x1a08)
80 #define AR7_REGS_VLYNQ1 (AR7_REGS_BASE + 0x1c00)
81 #define AR7_REGS_MDIO (AR7_REGS_BASE + 0x1e00)
82 #define AR7_REGS_IRQ (AR7_REGS_BASE + 0x2400)
83 --- a/drivers/net/cpmac.c
84 +++ b/drivers/net/cpmac.c
85 @@ -34,7 +34,6 @@
86 #include <linux/skbuff.h>
87 #include <linux/mii.h>
88 #include <linux/phy.h>
89 -#include <linux/phy_fixed.h>
90 #include <linux/platform_device.h>
91 #include <linux/dma-mapping.h>
92 #include <linux/clk.h>
93 @@ -47,14 +46,11 @@ MODULE_LICENSE("GPL");
94 MODULE_ALIAS("platform:cpmac");
95
96 static int debug_level = 8;
97 -static int dumb_switch;
98
99 -/* Next 2 are only used in cpmac_probe, so it's pointless to change them */
100 +/* Next is only used in cpmac_probe, so it's pointless to change them */
101 module_param(debug_level, int, 0444);
102 -module_param(dumb_switch, int, 0444);
103
104 MODULE_PARM_DESC(debug_level, "Number of NETIF_MSG bits to enable");
105 -MODULE_PARM_DESC(dumb_switch, "Assume switch is not connected to MDIO bus");
106
107 #define CPMAC_VERSION "0.5.2"
108 /* frame size + 802.1q tag + FCS size */
109 @@ -673,9 +669,8 @@ static void cpmac_hw_start(struct net_de
110 for (i = 0; i < 8; i++)
111 cpmac_write(priv->regs, CPMAC_MAC_ADDR_LO(i), dev->dev_addr[5]);
112 cpmac_write(priv->regs, CPMAC_MAC_ADDR_MID, dev->dev_addr[4]);
113 - cpmac_write(priv->regs, CPMAC_MAC_ADDR_HI, dev->dev_addr[0] |
114 - (dev->dev_addr[1] << 8) | (dev->dev_addr[2] << 16) |
115 - (dev->dev_addr[3] << 24));
116 + cpmac_write(priv->regs, CPMAC_MAC_ADDR_HI, be32_to_cpu(*(u32 *)
117 + dev->dev_addr));
118 cpmac_write(priv->regs, CPMAC_MAX_LENGTH, CPMAC_SKB_SIZE);
119 cpmac_write(priv->regs, CPMAC_UNICAST_CLEAR, 0xff);
120 cpmac_write(priv->regs, CPMAC_RX_INT_CLEAR, 0xff);
121 @@ -1107,8 +1102,6 @@ static const struct net_device_ops cpmac
122 .ndo_set_mac_address = eth_mac_addr,
123 };
124
125 -static int external_switch;
126 -
127 static int __devinit cpmac_probe(struct platform_device *pdev)
128 {
129 int rc, phy_id;
130 @@ -1120,25 +1113,18 @@ static int __devinit cpmac_probe(struct
131
132 pdata = pdev->dev.platform_data;
133
134 - if (external_switch || dumb_switch) {
135 - strncpy(mdio_bus_id, "0", MII_BUS_ID_SIZE); /* fixed phys bus */
136 - phy_id = pdev->id;
137 - } else {
138 - for (phy_id = 0; phy_id < PHY_MAX_ADDR; phy_id++) {
139 - if (!(pdata->phy_mask & (1 << phy_id)))
140 - continue;
141 - if (!cpmac_mii->phy_map[phy_id])
142 - continue;
143 - strncpy(mdio_bus_id, cpmac_mii->id, MII_BUS_ID_SIZE);
144 - break;
145 - }
146 + for (phy_id = 0; phy_id < PHY_MAX_ADDR; phy_id++) {
147 + if (!(pdata->phy_mask & (1 << phy_id)))
148 + continue;
149 + if (!cpmac_mii->phy_map[phy_id])
150 + continue;
151 + strncpy(mdio_bus_id, cpmac_mii->id, MII_BUS_ID_SIZE);
152 + break;
153 }
154
155 if (phy_id == PHY_MAX_ADDR) {
156 - dev_err(&pdev->dev, "no PHY present, falling back "
157 - "to switch on MDIO bus 0\n");
158 - strncpy(mdio_bus_id, "0", MII_BUS_ID_SIZE); /* fixed phys bus */
159 - phy_id = pdev->id;
160 + printk(KERN_ERR "cpmac: No PHY present\n");
161 + return -ENXIO;
162 }
163
164 dev = alloc_etherdev_mq(sizeof(*priv), CPMAC_QUEUES);
165 @@ -1227,6 +1213,7 @@ int __devinit cpmac_init(void)
166 {
167 u32 mask;
168 int i, res;
169 + void __iomem *mii_reg;
170
171 cpmac_mii = mdiobus_alloc();
172 if (cpmac_mii == NULL)
173 @@ -1250,14 +1237,14 @@ int __devinit cpmac_init(void)
174 ar7_gpio_disable(26);
175 ar7_gpio_disable(27);
176
177 - if (!ar7_is_titan()) {
178 + if (ar7_is_titan()) {
179 + ar7_device_reset(AR7_RESET_BIT_EPHY);
180 + ar7_device_reset(TITAN_RESET_BIT_EPHY1);
181 + } else {
182 + ar7_device_reset(AR7_RESET_BIT_EPHY);
183 ar7_device_reset(AR7_RESET_BIT_CPMAC_LO);
184 ar7_device_reset(AR7_RESET_BIT_CPMAC_HI);
185 }
186 - ar7_device_reset(AR7_RESET_BIT_EPHY);
187 -
188 - if (ar7_is_titan())
189 - ar7_device_reset(TITAN_RESET_BIT_EPHY1);
190
191 cpmac_mii->reset(cpmac_mii);
192
193 @@ -1269,10 +1256,20 @@ int __devinit cpmac_init(void)
194 msleep(10);
195 }
196
197 - mask &= 0x7fffffff;
198 + mask &= ar7_is_titan()? ~(0x80000000 | 0x40000000) : ~(0x80000000);
199 if (mask & (mask - 1)) {
200 - external_switch = 1;
201 - mask = 0;
202 + if (ar7_is_titan()) {
203 + ar7_device_disable(AR7_RESET_BIT_EPHY);
204 + ar7_device_disable(TITAN_RESET_BIT_EPHY1);
205 + } else
206 + ar7_device_disable(AR7_RESET_BIT_EPHY);
207 +
208 + //Titan remap might be different
209 + mii_reg = ioremap(AR7_REGS_MII, 4);
210 + if (mii_reg) {
211 + writel(readl(mii_reg) | 1, mii_reg);
212 + iounmap(mii_reg);
213 + }
214 }
215
216 cpmac_mii->phy_mask = ar7_is_titan()? ~(mask | 0x80000000 | 0x40000000) :
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