target/linux/ar71xx/files/arch/mips/ar71xx/mach-ap96.c

   1 /*
   2  *  Atheros AP96 board support
   3  *
   4  *  Copyright (C) 2009 Marco Porsch
   5  *  Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org>
   6  *  Copyright (C) 2010 Atheros Communications
   7  *
   8  *  This program is free software; you can redistribute it and/or modify it
   9  *  under the terms of the GNU General Public License version 2 as published
  10  *  by the Free Software Foundation.
  11  */
  12
  13 #include <linux/platform_device.h>
  14 #include <linux/mtd/mtd.h>
  15 #include <linux/mtd/partitions.h>
  16 #include <linux/delay.h>
  17
  18 #include <asm/mach-ar71xx/ar71xx.h>
  19
  20 #include "machtype.h"
  21 #include "devices.h"
  22 #include "dev-m25p80.h"
  23 #include "dev-ap94-pci.h"
  24 #include "dev-gpio-buttons.h"
  25 #include "dev-leds-gpio.h"
  26 #include "dev-usb.h"
  27
  28 #define AP96_GPIO_LED_12_GREEN          0
  29 #define AP96_GPIO_LED_3_GREEN           1
  30 #define AP96_GPIO_LED_2_GREEN           2
  31 #define AP96_GPIO_LED_WPS_GREEN         4
  32 #define AP96_GPIO_LED_5_GREEN           5
  33 #define AP96_GPIO_LED_4_ORANGE          6
  34
  35 /* Reset button - next to the power connector */
  36 #define AP96_GPIO_BTN_RESET             3
  37 /* WPS button - next to a led on right */
  38 #define AP96_GPIO_BTN_WPS               8
  39
  40 #define AP96_KEYS_POLL_INTERVAL         20      /* msecs */
  41 #define AP96_KEYS_DEBOUNCE_INTERVAL     (3 * AP96_KEYS_POLL_INTERVAL)
  42
  43 #define AP96_WMAC0_MAC_OFFSET           0x120c
  44 #define AP96_WMAC1_MAC_OFFSET           0x520c
  45 #define AP96_CALDATA0_OFFSET            0x1000
  46 #define AP96_CALDATA1_OFFSET            0x5000
  47
  48 #ifdef CONFIG_MTD_PARTITIONS
  49 static struct mtd_partition ap96_partitions[] = {
  50         {
  51                 .name           = "uboot",
  52                 .offset         = 0,
  53                 .size           = 0x030000,
  54                 .mask_flags     = MTD_WRITEABLE,
  55         }, {
  56                 .name           = "env",
  57                 .offset         = 0x030000,
  58                 .size           = 0x010000,
  59                 .mask_flags     = MTD_WRITEABLE,
  60         }, {
  61                 .name           = "rootfs",
  62                 .offset         = 0x040000,
  63                 .size           = 0x600000,
  64         }, {
  65                 .name           = "uImage",
  66                 .offset         = 0x640000,
  67                 .size           = 0x1b0000,
  68         }, {
  69                 .name           = "caldata",
  70                 .offset         = 0x7f0000,
  71                 .size           = 0x010000,
  72                 .mask_flags     = MTD_WRITEABLE,
  73         }
  74 };
  75 #endif /* CONFIG_MTD_PARTITIONS */
  76
  77 static struct flash_platform_data ap96_flash_data = {
  78 #ifdef CONFIG_MTD_PARTITIONS
  79         .parts          = ap96_partitions,
  80         .nr_parts       = ARRAY_SIZE(ap96_partitions),
  81 #endif
  82 };
  83
  84 /*
  85  * AP96 has 12 unlabeled leds in the front; these are numbered from 1 to 12
  86  * below (from left to right on the board). Led 1 seems to be on whenever the
  87  * board is powered. Led 11 shows LAN link activity actity. Led 3 is orange;
  88  * others are green.
  89  *
  90  * In addition, there is one led next to a button on the right side for WPS.
  91  */
  92 static struct gpio_led ap96_leds_gpio[] __initdata = {
  93         {
  94                 .name           = "ap96:green:led2",
  95                 .gpio           = AP96_GPIO_LED_2_GREEN,
  96                 .active_low     = 1,
  97         }, {
  98                 .name           = "ap96:green:led3",
  99                 .gpio           = AP96_GPIO_LED_3_GREEN,
 100                 .active_low     = 1,
 101         }, {
 102                 .name           = "ap96:orange:led4",
 103                 .gpio           = AP96_GPIO_LED_4_ORANGE,
 104                 .active_low     = 1,
 105         }, {
 106                 .name           = "ap96:green:led5",
 107                 .gpio           = AP96_GPIO_LED_5_GREEN,
 108                 .active_low     = 1,
 109         }, {
 110                 .name           = "ap96:green:led12",
 111                 .gpio           = AP96_GPIO_LED_12_GREEN,
 112                 .active_low     = 1,
 113         }, { /* next to a button on right */
 114                 .name           = "ap96:green:wps",
 115                 .gpio           = AP96_GPIO_LED_WPS_GREEN,
 116                 .active_low     = 1,
 117         }
 118 };
 119
 120 static struct gpio_keys_button ap96_gpio_keys[] __initdata = {
 121         {
 122                 .desc           = "reset",
 123                 .type           = EV_KEY,
 124                 .code           = KEY_RESTART,
 125                 .debounce_interval = AP96_KEYS_DEBOUNCE_INTERVAL,
 126                 .gpio           = AP96_GPIO_BTN_RESET,
 127                 .active_low     = 1,
 128         }, {
 129                 .desc           = "wps",
 130                 .type           = EV_KEY,
 131                 .code           = KEY_WPS_BUTTON,
 132                 .debounce_interval = AP96_KEYS_DEBOUNCE_INTERVAL,
 133                 .gpio           = AP96_GPIO_BTN_WPS,
 134                 .active_low     = 1,
 135         }
 136 };
 137
 138 #define AP96_WAN_PHYMASK 0x10
 139 #define AP96_LAN_PHYMASK 0x0f
 140
 141 static void __init ap96_setup(void)
 142 {
 143         u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
 144
 145         ar71xx_add_device_mdio(0, ~(AP96_WAN_PHYMASK | AP96_LAN_PHYMASK));
 146
 147         ar71xx_init_mac(ar71xx_eth0_data.mac_addr, art, 0);
 148         ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
 149         ar71xx_eth0_data.phy_mask = AP96_LAN_PHYMASK;
 150         ar71xx_eth0_data.speed = SPEED_1000;
 151         ar71xx_eth0_data.duplex = DUPLEX_FULL;
 152
 153         ar71xx_add_device_eth(0);
 154
 155         ar71xx_init_mac(ar71xx_eth1_data.mac_addr, art, 1);
 156         ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
 157         ar71xx_eth1_data.phy_mask = AP96_WAN_PHYMASK;
 158
 159         ar71xx_eth1_pll_data.pll_1000 = 0x1f000000;
 160
 161         ar71xx_add_device_eth(1);
 162
 163         ar71xx_add_device_usb();
 164
 165         ar71xx_add_device_m25p80(&ap96_flash_data);
 166
 167         ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(ap96_leds_gpio),
 168                                         ap96_leds_gpio);
 169
 170         ar71xx_register_gpio_keys_polled(-1, AP96_KEYS_POLL_INTERVAL,
 171                                          ARRAY_SIZE(ap96_gpio_keys),
 172                                          ap96_gpio_keys);
 173
 174         ap94_pci_init(art + AP96_CALDATA0_OFFSET,
 175                       art + AP96_WMAC0_MAC_OFFSET,
 176                       art + AP96_CALDATA1_OFFSET,
 177                       art + AP96_WMAC1_MAC_OFFSET);
 178 }
 179
 180 MIPS_MACHINE(AR71XX_MACH_AP96, "AP96", "Atheros AP96", ap96_setup);