ramips: sync kernel config
[openwrt.git] / target / linux / ubicom32 / files / drivers / spi / spi_ubicom32_gpio.c
1 /*
2 * drivers/spi_spi_ubicom32_gpio.c
3 * Ubicom32 GPIO based SPI driver
4 *
5 * (C) Copyright 2009, Ubicom, Inc.
6 *
7 * This file is part of the Ubicom32 Linux Kernel Port.
8 *
9 * The Ubicom32 Linux Kernel Port is free software: you can redistribute
10 * it and/or modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation, either version 2 of the
12 * License, or (at your option) any later version.
13 *
14 * The Ubicom32 Linux Kernel Port is distributed in the hope that it
15 * will be useful, but WITHOUT ANY WARRANTY; without even the implied
16 * warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See
17 * the GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with the Ubicom32 Linux Kernel Port. If not,
21 * see <http://www.gnu.org/licenses/>.
22 *
23 * Ubicom32 implementation derived from (with many thanks):
24 * arch/m68knommu
25 * arch/blackfin
26 * arch/parisc
27 */
28 #include <linux/kernel.h>
29 #include <linux/init.h>
30 #include <linux/delay.h>
31 #include <linux/spinlock.h>
32 #include <linux/workqueue.h>
33 #include <linux/platform_device.h>
34
35 #include <linux/spi/spi.h>
36 #include <linux/spi/spi_bitbang.h>
37
38 #include <linux/gpio.h>
39
40 #include <asm/ubicom32-spi-gpio.h>
41
42 #define DRIVER_NAME "ubicom32-spi-gpio"
43
44 struct ubicom32_spi_gpio {
45 struct spi_bitbang bitbang;
46
47 struct ubicom32_spi_gpio_platform_data *pdata;
48
49 struct platform_device *dev;
50 };
51
52 /*
53 * The following 4 functions are used by EXPAND_BITBANG_TXRX to bitbang the data out.
54 */
55 static inline void setsck(struct spi_device *dev, int on)
56 {
57 struct ubicom32_spi_gpio *usg = (struct ubicom32_spi_gpio *)spi_master_get_devdata(dev->master);
58 gpio_set_value(usg->pdata->pin_clk, on ? 1 : 0);
59 }
60
61 static inline void setmosi(struct spi_device *dev, int on)
62 {
63 struct ubicom32_spi_gpio *usg = (struct ubicom32_spi_gpio *)spi_master_get_devdata(dev->master);
64 gpio_set_value(usg->pdata->pin_mosi, on ? 1 : 0);
65 }
66
67 static inline u32 getmiso(struct spi_device *dev)
68 {
69 struct ubicom32_spi_gpio *usg = (struct ubicom32_spi_gpio *)spi_master_get_devdata(dev->master);
70 return gpio_get_value(usg->pdata->pin_miso) ? 1 : 0;
71 }
72
73 #define spidelay(x) ndelay(x)
74
75 #define EXPAND_BITBANG_TXRX
76 #include <linux/spi/spi_bitbang.h>
77
78 /*
79 * ubicom32_spi_gpio_txrx_mode0
80 */
81 static u32 ubicom32_spi_gpio_txrx_mode0(struct spi_device *spi, unsigned nsecs, u32 word, u8 bits)
82 {
83 return bitbang_txrx_be_cpha0(spi, nsecs, 0, word, bits);
84 }
85
86 /*
87 * ubicom32_spi_gpio_txrx_mode1
88 */
89 static u32 ubicom32_spi_gpio_txrx_mode1(struct spi_device *spi, unsigned nsecs, u32 word, u8 bits)
90 {
91 return bitbang_txrx_be_cpha1(spi, nsecs, 0, word, bits);
92 }
93
94 /*
95 * ubicom32_spi_gpio_txrx_mode2
96 */
97 static u32 ubicom32_spi_gpio_txrx_mode2(struct spi_device *spi, unsigned nsecs, u32 word, u8 bits)
98 {
99 return bitbang_txrx_be_cpha0(spi, nsecs, 1, word, bits);
100 }
101
102 /*
103 * ubicom32_spi_gpio_txrx_mode3
104 */
105 static u32 ubicom32_spi_gpio_txrx_mode3(struct spi_device *spi, unsigned nsecs, u32 word, u8 bits)
106 {
107 return bitbang_txrx_be_cpha1(spi, nsecs, 1, word, bits);
108 }
109
110 /*
111 * ubicom32_spi_gpio_chipselect
112 */
113 static void ubicom32_spi_gpio_chipselect(struct spi_device *dev, int value)
114 {
115 struct ubicom32_spi_gpio_controller_data *cd = (struct ubicom32_spi_gpio_controller_data *)dev->controller_data;
116 unsigned int cs_polarity = dev->mode & SPI_CS_HIGH ? 1 : 0;
117
118 if (value == BITBANG_CS_ACTIVE) {
119 gpio_set_value(cd->pin_cs, cs_polarity);
120 return;
121 }
122 gpio_set_value(cd->pin_cs, !cs_polarity);
123 }
124
125 /*
126 * ubicom32_spi_gpio_probe
127 */
128 static int ubicom32_spi_gpio_probe(struct platform_device *dev)
129 {
130 struct ubicom32_spi_gpio_platform_data *pdata;
131 struct spi_master *master;
132 struct ubicom32_spi_gpio *usg;
133 int ret;
134
135 master = spi_alloc_master(&dev->dev, sizeof(struct ubicom32_spi_gpio));
136 if (master == NULL) {
137 dev_err(&dev->dev, "failed to allocate spi master\n");
138 ret = -ENOMEM;
139 goto err;
140 }
141
142 usg = (struct ubicom32_spi_gpio *)spi_master_get_devdata(master);
143
144 platform_set_drvdata(dev, usg);
145
146 /*
147 * Copy in the platform data
148 */
149 pdata = dev->dev.platform_data;
150 usg->pdata = dev->dev.platform_data;
151
152 /*
153 * Request the GPIO lines
154 */
155 ret = gpio_request(pdata->pin_mosi, "spi-mosi");
156 if (ret) {
157 dev_err(&dev->dev, "Failed to allocate spi-mosi GPIO\n");
158 goto err;
159 }
160
161 ret = gpio_request(pdata->pin_miso, "spi-miso");
162 if (ret) {
163 dev_err(&dev->dev, "Failed to allocate spi-miso GPIO\n");
164 goto err_nomiso;
165 }
166
167 ret = gpio_request(pdata->pin_clk, "spi-clk");
168 if (ret) {
169 dev_err(&dev->dev, "Failed to allocate spi-clk GPIO\n");
170 goto err_noclk;
171 }
172
173 /*
174 * Setup spi-bitbang adaptor
175 */
176 usg->bitbang.flags |= SPI_CS_HIGH;
177 usg->bitbang.master = spi_master_get(master);
178 usg->bitbang.master->bus_num = pdata->bus_num;
179 usg->bitbang.master->num_chipselect = pdata->num_chipselect;
180 usg->bitbang.chipselect = ubicom32_spi_gpio_chipselect;
181
182 usg->bitbang.txrx_word[SPI_MODE_0] = ubicom32_spi_gpio_txrx_mode0;
183 usg->bitbang.txrx_word[SPI_MODE_1] = ubicom32_spi_gpio_txrx_mode1;
184 usg->bitbang.txrx_word[SPI_MODE_2] = ubicom32_spi_gpio_txrx_mode2;
185 usg->bitbang.txrx_word[SPI_MODE_3] = ubicom32_spi_gpio_txrx_mode3;
186
187 /*
188 * Setup the GPIO pins
189 */
190 gpio_direction_output(pdata->pin_clk, pdata->clk_default);
191 gpio_direction_output(pdata->pin_mosi, 0);
192 gpio_direction_input(pdata->pin_miso);
193
194 /*
195 * Ready to go
196 */
197 ret = spi_bitbang_start(&usg->bitbang);
198 if (ret) {
199 goto err_no_bitbang;
200 }
201
202 return 0;
203
204 err_no_bitbang:
205 spi_master_put(usg->bitbang.master);
206
207 gpio_free(pdata->pin_clk);
208
209 err_noclk:
210 gpio_free(pdata->pin_miso);
211
212 err_nomiso:
213 gpio_free(pdata->pin_mosi);
214
215 err:
216 return ret;
217 }
218
219 /*
220 * ubicom32_spi_gpio_remove
221 */
222 static int ubicom32_spi_gpio_remove(struct platform_device *dev)
223 {
224 struct ubicom32_spi_gpio *sp = platform_get_drvdata(dev);
225
226 spi_bitbang_stop(&sp->bitbang);
227 spi_master_put(sp->bitbang.master);
228
229 return 0;
230 }
231
232 /*
233 * Work with hotplug and coldplug
234 */
235 MODULE_ALIAS("platform:ubicom32_spi_gpio");
236
237 static struct platform_driver ubicom32_spi_gpio_drv = {
238 .probe = ubicom32_spi_gpio_probe,
239 .remove = ubicom32_spi_gpio_remove,
240 .driver = {
241 .name = DRIVER_NAME,
242 .owner = THIS_MODULE,
243 },
244 };
245
246 /*
247 * ubicom32_spi_gpio_init
248 */
249 static int __init ubicom32_spi_gpio_init(void)
250 {
251 return platform_driver_register(&ubicom32_spi_gpio_drv);
252 }
253
254 /*
255 * ubicom32_spi_gpio_exit
256 */
257 static void __exit ubicom32_spi_gpio_exit(void)
258 {
259 platform_driver_unregister(&ubicom32_spi_gpio_drv);
260 }
261
262 module_init(ubicom32_spi_gpio_init);
263 module_exit(ubicom32_spi_gpio_exit);
264
265 MODULE_DESCRIPTION("Ubicom32 SPI-GPIO Driver");
266 MODULE_AUTHOR("Pat Tjin, <@ubicom.com>");
267 MODULE_LICENSE("GPL");
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