ramips: fix RT2880_PCI_BASE definition
[openwrt.git] / target / linux / ramips / files / arch / mips / ralink / rt288x / setup.c
1 /*
2 * Ralink RT288x SoC specific setup
3 *
4 * Copyright (C) 2008 Gabor Juhos <juhosg@openwrt.org>
5 * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
6 *
7 * Parts of this file are based on Ralink's 2.6.21 BSP
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License version 2 as published
11 * by the Free Software Foundation.
12 */
13
14 #include <linux/kernel.h>
15 #include <linux/init.h>
16 #include <linux/io.h>
17
18 #include <asm/mips_machine.h>
19 #include <asm/reboot.h>
20 #include <asm/time.h>
21
22 #include <asm/mach-ralink/common.h>
23 #include <asm/mach-ralink/rt288x.h>
24 #include <asm/mach-ralink/rt288x_regs.h>
25
26 static void rt288x_restart(char *command)
27 {
28 rt288x_sysc_wr(RT2880_RESET_SYSTEM, SYSC_REG_RESET_CTRL);
29 while (1)
30 if (cpu_wait)
31 cpu_wait();
32 }
33
34 static void rt288x_halt(void)
35 {
36 while (1)
37 cpu_wait();
38 }
39
40 unsigned int __cpuinit get_c0_compare_irq(void)
41 {
42 return CP0_LEGACY_COMPARE_IRQ;
43 }
44
45 void __init ramips_soc_setup(void)
46 {
47 rt288x_sysc_base = ioremap_nocache(RT2880_SYSC_BASE, RT2880_SYSC_SIZE);
48 rt288x_memc_base = ioremap_nocache(RT2880_MEMC_BASE, RT2880_MEMC_SIZE);
49
50 rt288x_detect_sys_type();
51 rt288x_detect_sys_freq();
52
53 printk(KERN_INFO "%s running at %lu.%02lu MHz\n", ramips_sys_type,
54 rt288x_cpu_freq / 1000000,
55 (rt288x_cpu_freq % 1000000) * 100 / 1000000);
56
57 _machine_restart = rt288x_restart;
58 _machine_halt = rt288x_halt;
59 pm_power_off = rt288x_halt;
60
61 ramips_early_serial_setup(0, RT2880_UART0_BASE, rt288x_sys_freq,
62 RT2880_INTC_IRQ_UART0);
63 ramips_early_serial_setup(1, RT2880_UART1_BASE, rt288x_sys_freq,
64 RT2880_INTC_IRQ_UART1);
65 }
66
67 void __init plat_time_init(void)
68 {
69 mips_hpt_frequency = rt288x_cpu_freq / 2;
70 }
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