target/linux/ppc44x/patches/004-canyonlands_dts_sync.patch

   1 --- a/arch/powerpc/boot/dts/canyonlands.dts
   2 +++ b/arch/powerpc/boot/dts/canyonlands.dts
   3 @@ -40,6 +40,7 @@
   4                         d-cache-size = <32768>;
   5                         dcr-controller;
   6                         dcr-access-method = "native";
   7 +                       next-level-cache = <&L2C0>;
   8                 };
   9         };
  10
  11 @@ -104,6 +105,16 @@
  12                 dcr-reg = <0x00c 0x002>;
  13         };
  14
  15 +       L2C0: l2c {
  16 +               compatible = "ibm,l2-cache-460ex", "ibm,l2-cache";
  17 +               dcr-reg = <0x020 0x008          /* Internal SRAM DCR's */
  18 +                          0x030 0x008>;        /* L2 cache DCR's */
  19 +               cache-line-size = <32>;         /* 32 bytes */
  20 +               cache-size = <262144>;          /* L2, 256K */
  21 +               interrupt-parent = <&UIC1>;
  22 +               interrupts = <11 1>;
  23 +       };
  24 +
  25         plb {
  26                 compatible = "ibm,plb-460ex", "ibm,plb4";
  27                 #address-cells = <2>;
  28 @@ -131,6 +142,43 @@
  29                                         /*RXDE*/  0x5 0x4>;
  30                 };
  31
  32 +               USB0: ehci@bffd0400 {
  33 +                       compatible = "ibm,usb-ehci-460ex", "usb-ehci";
  34 +                       interrupt-parent = <&UIC2>;
  35 +                       interrupts = <0x1d 4>;
  36 +                       reg = <4 0xbffd0400 0x90 4 0xbffd0490 0x70>;
  37 +               };
  38 +
  39 +               USB1: usb@bffd0000 {
  40 +                       compatible = "ohci-le";
  41 +                       reg = <4 0xbffd0000 0x60>;
  42 +                       interrupt-parent = <&UIC2>;
  43 +                       interrupts = <0x1e 4>;
  44 +               };
  45 +
  46 +               USBOTG0: usbotg@bff80000 {
  47 +                       compatible = "amcc,usb-otg-460ex";
  48 +                       reg = <4 0xbff80000 0x10000>;
  49 +                       interrupt-parent = <&USBOTG0>;
  50 +                       interrupts = <0 1 2>;
  51 +                       #interrupt-cells = <1>;
  52 +                       #address-cells = <0>;
  53 +                       #size-cells = <0>;
  54 +                       interrupt-map = </* USB-OTG */ 0 &UIC2 0x1c 4
  55 +                                        /* HIGH-POWER */ 1 &UIC1 0x1a 8
  56 +                                        /* DMA */ 2 &UIC0 0xc 4>;
  57 +                       interrupt-map-mask = <0xffffffff>;
  58 +               };
  59 +
  60 +               SATA0: sata@bffd1000 {
  61 +                       compatible = "amcc,sata-460ex";
  62 +                       reg = <4 0xbffd1000 0x800       /* SATA */
  63 +                              4 0xbffd0800 0x400>;     /* AHBDMA */
  64 +                       interrupt-parent = <&UIC3>;
  65 +                       interrupts = <0 4               /* SATA */
  66 +                                     5 4>;             /* AHBDMA */
  67 +               };
  68 +
  69                 POB0: opb {
  70                         compatible = "ibm,opb-460ex", "ibm,opb";
  71                         #address-cells = <1>;
  72 @@ -222,6 +270,12 @@
  73                                 reg = <0xef600700 0x00000014>;
  74                                 interrupt-parent = <&UIC0>;
  75                                 interrupts = <0x2 0x4>;
  76 +                               #address-cells = <1>;
  77 +                               #size-cells = <0>;
  78 +                               rtc@68 {
  79 +                                       compatible = "stm,m41t80";
  80 +                                       reg = <68>;
  81 +                               };
  82                         };
  83
  84                         IIC1: i2c@ef600800 {
  85 @@ -331,6 +385,7 @@
  86                          * later cannot be changed
  87                          */
  88                         ranges = <0x02000000 0x00000000 0x80000000 0x0000000d 0x80000000 0x00000000 0x80000000
  89 +                                 0x02000000 0x00000000 0x00000000 0x0000000c 0x0ee00000 0x00000000 0x00100000
  90                                   0x01000000 0x00000000 0x00000000 0x0000000c 0x08000000 0x00000000 0x00010000>;
  91
  92                         /* Inbound 2GB range starting at 0 */
  93 @@ -361,6 +416,7 @@
  94                          * later cannot be changed
  95                          */
  96                         ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x00000000 0x00000000 0x80000000
  97 +                                 0x02000000 0x00000000 0x00000000 0x0000000f 0x00000000 0x00000000 0x00100000
  98                                   0x01000000 0x00000000 0x00000000 0x0000000f 0x80000000 0x00000000 0x00010000>;
  99
 100                         /* Inbound 2GB range starting at 0 */
 101 @@ -402,6 +458,7 @@
 102                          * later cannot be changed
 103                          */
 104                         ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x80000000 0x00000000 0x80000000
 105 +                                 0x02000000 0x00000000 0x00000000 0x0000000f 0x00100000 0x00000000 0x00100000
 106                                   0x01000000 0x00000000 0x00000000 0x0000000f 0x80010000 0x00000000 0x00010000>;
 107
 108                         /* Inbound 2GB range starting at 0 */