target/linux/brcm47xx/patches-2.6.23/600-ssb-fix-pcidevices.patch

   1 --- a/drivers/ssb/driver_pcicore.c
   2 +++ b/drivers/ssb/driver_pcicore.c
   3 @@ -66,6 +66,7 @@
   4                         base = &ssb_pcicore_pcibus_iobase;
   5                 else
   6                         base = &ssb_pcicore_pcibus_membase;
   7 +               res->flags |= IORESOURCE_PCI_FIXED;
   8                 if (res->end) {
   9                         size = res->end - res->start + 1;
  10                         if (*base & (size - 1))
  11 @@ -88,10 +89,12 @@
  12
  13  static void __init ssb_fixup_pcibridge(struct pci_dev *dev)
  14  {
  15 +       u8 lat;
  16 +
  17         if (dev->bus->number != 0 || PCI_SLOT(dev->devfn) != 0)
  18                 return;
  19
  20 -       ssb_printk(KERN_INFO "PCI: fixing up bridge\n");
  21 +       ssb_printk(KERN_INFO "PCI: Fixing up bridge %s\n", pci_name(dev));
  22
  23         /* Enable PCI bridge bus mastering and memory space */
  24         pci_set_master(dev);
  25 @@ -101,7 +104,10 @@
  26         pci_write_config_dword(dev, SSB_BAR1_CONTROL, 3);
  27
  28         /* Make sure our latency is high enough to handle the devices behind us */
  29 -       pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0xa8);
  30 +       lat = 168;
  31 +       ssb_printk(KERN_INFO "PCI: Fixing latency timer of device %s to %u\n",
  32 +                  pci_name(dev), lat);
  33 +       pci_write_config_byte(dev, PCI_LATENCY_TIMER, lat);
  34  }
  35  DECLARE_PCI_FIXUP_EARLY(PCI_ANY_ID, PCI_ANY_ID, ssb_fixup_pcibridge);
  36
  37 @@ -279,14 +285,14 @@
  38         .name   = "SSB PCIcore external memory",
  39         .start  = SSB_PCI_DMA,
  40         .end    = SSB_PCI_DMA + SSB_PCI_DMA_SZ - 1,
  41 -       .flags  = IORESOURCE_MEM,
  42 +       .flags  = IORESOURCE_MEM | IORESOURCE_PCI_FIXED,
  43  };
  44
  45  static struct resource ssb_pcicore_io_resource = {
  46         .name   = "SSB PCIcore external I/O",
  47         .start  = 0x100,
  48         .end    = 0x7FF,
  49 -       .flags  = IORESOURCE_IO,
  50 +       .flags  = IORESOURCE_IO | IORESOURCE_PCI_FIXED,
  51  };
  52
  53  static struct pci_controller ssb_pcicore_controller = {
  54 @@ -344,7 +350,8 @@
  55         /* Ok, ready to run, register it to the system.
  56          * The following needs change, if we want to port hostmode
  57          * to non-MIPS platform. */
  58 -       set_io_port_base((unsigned long)ioremap_nocache(SSB_PCI_MEM, 0x04000000));
  59 +       ssb_pcicore_controller.io_map_base = (unsigned long)ioremap_nocache(SSB_PCI_MEM, 0x04000000);
  60 +       set_io_port_base(ssb_pcicore_controller.io_map_base);
  61         /* Give some time to the PCI controller to configure itself with the new
  62          * values. Not waiting at this point causes crashes of the machine. */
  63         mdelay(10);