Add basic 2.6.24 support for rb532, korina napi code has to be adapted to work
[openwrt.git] / target / linux / rb532 / files-2.6.24 / arch / mips / rb500 / irq.c
1 /*
2 * BRIEF MODULE DESCRIPTION
3 * RC32434 interrupt routines.
4 *
5 * Copyright 2002 MontaVista Software Inc.
6 * Author: MontaVista Software, Inc.
7 * stevel@mvista.com or source@mvista.com
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
15 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
16 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
17 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
18 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
19 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
20 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
21 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
22 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
23 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
24 *
25 * You should have received a copy of the GNU General Public License along
26 * with this program; if not, write to the Free Software Foundation, Inc.,
27 * 675 Mass Ave, Cambridge, MA 02139, USA.
28 */
29
30 #include <linux/errno.h>
31 #include <linux/init.h>
32 #include <linux/kernel_stat.h>
33 #include <linux/module.h>
34 #include <linux/signal.h>
35 #include <linux/sched.h>
36 #include <linux/types.h>
37 #include <linux/interrupt.h>
38 #include <linux/ioport.h>
39 #include <linux/timex.h>
40 #include <linux/slab.h>
41 #include <linux/random.h>
42 #include <linux/delay.h>
43
44 #include <asm/bitops.h>
45 #include <asm/bootinfo.h>
46 #include <asm/io.h>
47 #include <asm/irq.h>
48 #include <asm/time.h>
49 #include <asm/mipsregs.h>
50 #include <asm/system.h>
51 #include <asm/rc32434/rc32434.h>
52 #include <asm/rc32434/gpio.h>
53
54 extern void set_debug_traps(void);
55 extern irq_cpustat_t irq_stat [NR_CPUS];
56 unsigned int local_bh_count[NR_CPUS];
57 unsigned int local_irq_count[NR_CPUS];
58
59 static unsigned int startup_irq(unsigned int irq);
60 static void rb500_end_irq(unsigned int irq_nr);
61 static void mask_and_ack_irq(unsigned int irq_nr);
62 static void rb500_enable_irq(unsigned int irq_nr);
63 static void rb500_disable_irq(unsigned int irq_nr);
64
65 extern void __init init_generic_irq(void);
66 extern struct rb500_gpio_reg __iomem *rb500_gpio_reg0;
67
68 typedef struct {
69 u32 mask; /* mask of valid bits in pending/mask registers */
70 volatile u32 *base_addr;
71 } intr_group_t;
72
73 #define RC32434_NR_IRQS (GROUP4_IRQ_BASE + 32)
74
75 #if (NR_IRQS < RC32434_NR_IRQS)
76 #error Too little irqs defined. Did you override <asm/irq.h> ?
77 #endif
78
79 static const intr_group_t intr_group[NUM_INTR_GROUPS] = {
80 { 0x0000efff, (u32 *)KSEG1ADDR(IC_GROUP0_PEND + 0 * IC_GROUP_OFFSET) },
81 { 0x00001fff, (u32 *)KSEG1ADDR(IC_GROUP0_PEND + 1 * IC_GROUP_OFFSET) },
82 { 0x00000007, (u32 *)KSEG1ADDR(IC_GROUP0_PEND + 2 * IC_GROUP_OFFSET) },
83 { 0x0003ffff, (u32 *)KSEG1ADDR(IC_GROUP0_PEND + 3 * IC_GROUP_OFFSET) },
84 { 0xffffffff, (u32 *)KSEG1ADDR(IC_GROUP0_PEND + 4 * IC_GROUP_OFFSET) }
85 };
86
87 #define READ_PEND(base) (*(base))
88 #define READ_MASK(base) (*(base + 2))
89 #define WRITE_MASK(base, val) (*(base + 2) = (val))
90
91 static inline int irq_to_group(unsigned int irq_nr)
92 {
93 return ((irq_nr - GROUP0_IRQ_BASE) >> 5);
94 }
95
96 static inline int group_to_ip(unsigned int group)
97 {
98 return group + 2;
99 }
100
101 static inline void enable_local_irq(unsigned int ip)
102 {
103 int ipnum = 0x100 << ip;
104 clear_c0_cause(ipnum);
105 set_c0_status(ipnum);
106 }
107
108 static inline void disable_local_irq(unsigned int ip)
109 {
110 int ipnum = 0x100 << ip;
111 clear_c0_status(ipnum);
112 }
113
114 static inline void ack_local_irq(unsigned int ip)
115 {
116 int ipnum = 0x100 << ip;
117 clear_c0_cause(ipnum);
118 }
119
120 static void rb500_enable_irq(unsigned int irq_nr)
121 {
122 int ip = irq_nr - GROUP0_IRQ_BASE;
123 unsigned int group, intr_bit;
124 volatile unsigned int *addr;
125
126
127 if (ip < 0)
128 enable_local_irq(irq_nr);
129 else {
130 group = ip >> 5;
131
132 ip &= (1<<5)-1;
133 intr_bit = 1 << ip;
134
135 enable_local_irq(group_to_ip(group));
136
137 addr = intr_group[group].base_addr;
138 WRITE_MASK(addr, READ_MASK(addr) & ~intr_bit);
139 }
140 }
141
142 static void rb500_disable_irq(unsigned int irq_nr)
143 {
144 int ip = irq_nr - GROUP0_IRQ_BASE;
145 unsigned int group, intr_bit, mask;
146 volatile unsigned int *addr;
147
148 if (ip < 0) {
149 disable_local_irq(irq_nr);
150 }else{
151 group = ip >> 5;
152
153 ip &= (1<<5) -1;
154 intr_bit = 1 << ip;
155 addr = intr_group[group].base_addr;
156 mask = READ_MASK(addr);
157 mask |= intr_bit;
158 WRITE_MASK(addr,mask);
159
160 /*
161 * if there are no more interrupts enabled in this
162 * group, disable corresponding IP
163 */
164 if (mask == intr_group[group].mask)
165 disable_local_irq(group_to_ip(group));
166 }
167 }
168
169 static unsigned int startup_irq(unsigned int irq_nr)
170 {
171 rb500_enable_irq(irq_nr);
172 return 0;
173 }
174
175 static void shutdown_irq(unsigned int irq_nr)
176 {
177 rb500_disable_irq(irq_nr);
178 return;
179 }
180
181 static void mask_and_ack_irq(unsigned int irq_nr)
182 {
183 rb500_disable_irq(irq_nr);
184 ack_local_irq(group_to_ip(irq_to_group(irq_nr)));
185 }
186
187 static void rb500_end_irq(unsigned int irq_nr)
188 {
189
190 int ip = irq_nr - GROUP0_IRQ_BASE;
191 unsigned int intr_bit, group;
192 volatile unsigned int *addr;
193
194 if ((irq_desc[irq_nr].status & (IRQ_DISABLED | IRQ_INPROGRESS))) {
195 printk("warning: end_irq %d did not enable (%x)\n",
196 irq_nr, irq_desc[irq_nr].status);
197 return;
198 }
199
200 if (ip < 0) {
201 enable_local_irq(irq_nr);
202 } else {
203 group = ip >> 5;
204
205 ip &= (1 << 5) - 1;
206 intr_bit = 1 << ip;
207
208 if (irq_nr >= GROUP4_IRQ_BASE && irq_nr <= (GROUP4_IRQ_BASE + 13)) {
209 rb500_gpio_reg0->gpioistat = rb500_gpio_reg0->gpioistat & ~intr_bit;
210 }
211
212 enable_local_irq(group_to_ip(group));
213
214 addr = intr_group[group].base_addr;
215 WRITE_MASK(addr, READ_MASK(addr) & ~intr_bit);
216 }
217 }
218
219 static struct hw_interrupt_type rc32434_irq_type = {
220 .typename = "RB500",
221 .startup = startup_irq,
222 .shutdown = shutdown_irq,
223 .enable = rb500_enable_irq,
224 .disable = rb500_disable_irq,
225 .ack = mask_and_ack_irq,
226 .end = rb500_end_irq,
227 };
228
229
230 void __init arch_init_irq(void)
231 {
232 int i;
233
234 printk("Initializing IRQ's: %d out of %d\n", RC32434_NR_IRQS, NR_IRQS);
235 memset(irq_desc, 0, sizeof(irq_desc));
236
237 for (i = 0; i < RC32434_NR_IRQS; i++) {
238 irq_desc[i].status = IRQ_DISABLED;
239 irq_desc[i].action = NULL;
240 irq_desc[i].depth = 1;
241 irq_desc[i].chip = &rc32434_irq_type;
242 spin_lock_init(&irq_desc[i].lock);
243 }
244 }
245
246 /* Main Interrupt dispatcher */
247 asmlinkage void plat_irq_dispatch(void)
248 {
249 unsigned int ip, pend, group;
250 volatile unsigned int *addr;
251 unsigned int cp0_cause = read_c0_cause() & read_c0_status();
252
253 if (cp0_cause & CAUSEF_IP7) {
254 do_IRQ(7);
255 } else if ((ip = (cp0_cause & 0x7c00))) {
256 group = 21 - rc32434_clz(ip);
257
258 addr = intr_group[group].base_addr;
259
260 pend = READ_PEND(addr);
261 pend &= ~READ_MASK(addr); // only unmasked interrupts
262 pend = 39 - rc32434_clz(pend);
263 do_IRQ((group << 5) + pend);
264 }
265 }
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