1 --- a/drivers/net/b44.c
2 +++ b/drivers/net/b44.c
3 @@ -135,7 +135,6 @@ static void b44_init_rings(struct b44 *)
5 static void b44_init_hw(struct b44 *, int);
7 -static int dma_desc_align_mask;
8 static int dma_desc_sync_size;
11 @@ -150,9 +149,8 @@ static inline void b44_sync_dma_desc_for
13 enum dma_data_direction dir)
15 - ssb_dma_sync_single_range_for_device(sdev, dma_base,
16 - offset & dma_desc_align_mask,
17 - dma_desc_sync_size, dir);
18 + dma_sync_single_for_device(sdev->dma_dev, dma_base + offset,
19 + dma_desc_sync_size, dir);
22 static inline void b44_sync_dma_desc_for_cpu(struct ssb_device *sdev,
23 @@ -160,9 +158,8 @@ static inline void b44_sync_dma_desc_for
25 enum dma_data_direction dir)
27 - ssb_dma_sync_single_range_for_cpu(sdev, dma_base,
28 - offset & dma_desc_align_mask,
29 - dma_desc_sync_size, dir);
30 + dma_sync_single_for_cpu(sdev->dma_dev, dma_base + offset,
31 + dma_desc_sync_size, dir);
34 static inline unsigned long br32(const struct b44 *bp, unsigned long reg)
35 @@ -608,10 +605,10 @@ static void b44_tx(struct b44 *bp)
39 - ssb_dma_unmap_single(bp->sdev,
43 + dma_unmap_single(bp->sdev->dma_dev,
48 dev_kfree_skb_irq(skb);
50 @@ -648,29 +645,29 @@ static int b44_alloc_rx_skb(struct b44 *
54 - mapping = ssb_dma_map_single(bp->sdev, skb->data,
57 + mapping = dma_map_single(bp->sdev->dma_dev, skb->data,
61 /* Hardware bug work-around, the chip is unable to do PCI DMA
62 to/from anything above 1GB :-( */
63 - if (ssb_dma_mapping_error(bp->sdev, mapping) ||
64 + if (dma_mapping_error(bp->sdev->dma_dev, mapping) ||
65 mapping + RX_PKT_BUF_SZ > DMA_BIT_MASK(30)) {
67 - if (!ssb_dma_mapping_error(bp->sdev, mapping))
68 - ssb_dma_unmap_single(bp->sdev, mapping,
69 + if (!dma_mapping_error(bp->sdev->dma_dev, mapping))
70 + dma_unmap_single(bp->sdev->dma_dev, mapping,
71 RX_PKT_BUF_SZ, DMA_FROM_DEVICE);
72 dev_kfree_skb_any(skb);
73 skb = __netdev_alloc_skb(bp->dev, RX_PKT_BUF_SZ, GFP_ATOMIC|GFP_DMA);
76 - mapping = ssb_dma_map_single(bp->sdev, skb->data,
79 - if (ssb_dma_mapping_error(bp->sdev, mapping) ||
80 - mapping + RX_PKT_BUF_SZ > DMA_BIT_MASK(30)) {
81 - if (!ssb_dma_mapping_error(bp->sdev, mapping))
82 - ssb_dma_unmap_single(bp->sdev, mapping, RX_PKT_BUF_SZ,DMA_FROM_DEVICE);
83 + mapping = dma_map_single(bp->sdev->dma_dev, skb->data,
86 + if (dma_mapping_error(bp->sdev->dma_dev, mapping) ||
87 + mapping + RX_PKT_BUF_SZ > DMA_BIT_MASK(30)) {
88 + if (!dma_mapping_error(bp->sdev->dma_dev, mapping))
89 + dma_unmap_single(bp->sdev->dma_dev, mapping, RX_PKT_BUF_SZ,DMA_FROM_DEVICE);
90 dev_kfree_skb_any(skb);
93 @@ -745,9 +742,9 @@ static void b44_recycle_rx(struct b44 *b
94 dest_idx * sizeof(*dest_desc),
97 - ssb_dma_sync_single_for_device(bp->sdev, dest_map->mapping,
100 + dma_sync_single_for_device(bp->sdev->dma_dev, dest_map->mapping,
105 static int b44_rx(struct b44 *bp, int budget)
106 @@ -767,9 +764,9 @@ static int b44_rx(struct b44 *bp, int bu
107 struct rx_header *rh;
110 - ssb_dma_sync_single_for_cpu(bp->sdev, map,
113 + dma_sync_single_for_cpu(bp->sdev->dma_dev, map,
116 rh = (struct rx_header *) skb->data;
117 len = le16_to_cpu(rh->len);
118 if ((len > (RX_PKT_BUF_SZ - RX_PKT_OFFSET)) ||
119 @@ -801,8 +798,8 @@ static int b44_rx(struct b44 *bp, int bu
120 skb_size = b44_alloc_rx_skb(bp, cons, bp->rx_prod);
123 - ssb_dma_unmap_single(bp->sdev, map,
124 - skb_size, DMA_FROM_DEVICE);
125 + dma_unmap_single(bp->sdev->dma_dev, map,
126 + skb_size, DMA_FROM_DEVICE);
127 /* Leave out rx_header */
128 skb_put(skb, len + RX_PKT_OFFSET);
129 skb_pull(skb, RX_PKT_OFFSET);
130 @@ -954,24 +951,24 @@ static netdev_tx_t b44_start_xmit(struct
134 - mapping = ssb_dma_map_single(bp->sdev, skb->data, len, DMA_TO_DEVICE);
135 - if (ssb_dma_mapping_error(bp->sdev, mapping) || mapping + len > DMA_BIT_MASK(30)) {
136 + mapping = dma_map_single(bp->sdev->dma_dev, skb->data, len, DMA_TO_DEVICE);
137 + if (dma_mapping_error(bp->sdev->dma_dev, mapping) || mapping + len > DMA_BIT_MASK(30)) {
138 struct sk_buff *bounce_skb;
140 /* Chip can't handle DMA to/from >1GB, use bounce buffer */
141 - if (!ssb_dma_mapping_error(bp->sdev, mapping))
142 - ssb_dma_unmap_single(bp->sdev, mapping, len,
143 + if (!dma_mapping_error(bp->sdev->dma_dev, mapping))
144 + dma_unmap_single(bp->sdev->dma_dev, mapping, len,
147 bounce_skb = __netdev_alloc_skb(dev, len, GFP_ATOMIC | GFP_DMA);
151 - mapping = ssb_dma_map_single(bp->sdev, bounce_skb->data,
152 - len, DMA_TO_DEVICE);
153 - if (ssb_dma_mapping_error(bp->sdev, mapping) || mapping + len > DMA_BIT_MASK(30)) {
154 - if (!ssb_dma_mapping_error(bp->sdev, mapping))
155 - ssb_dma_unmap_single(bp->sdev, mapping,
156 + mapping = dma_map_single(bp->sdev->dma_dev, bounce_skb->data,
157 + len, DMA_TO_DEVICE);
158 + if (dma_mapping_error(bp->sdev->dma_dev, mapping) || mapping + len > DMA_BIT_MASK(30)) {
159 + if (!dma_mapping_error(bp->sdev->dma_dev, mapping))
160 + dma_unmap_single(bp->sdev->dma_dev, mapping,
162 dev_kfree_skb_any(bounce_skb);
164 @@ -1068,8 +1065,8 @@ static void b44_free_rings(struct b44 *b
168 - ssb_dma_unmap_single(bp->sdev, rp->mapping, RX_PKT_BUF_SZ,
170 + dma_unmap_single(bp->sdev->dma_dev, rp->mapping, RX_PKT_BUF_SZ,
172 dev_kfree_skb_any(rp->skb);
175 @@ -1080,8 +1077,8 @@ static void b44_free_rings(struct b44 *b
179 - ssb_dma_unmap_single(bp->sdev, rp->mapping, rp->skb->len,
181 + dma_unmap_single(bp->sdev->dma_dev, rp->mapping, rp->skb->len,
183 dev_kfree_skb_any(rp->skb);
186 @@ -1103,14 +1100,12 @@ static void b44_init_rings(struct b44 *b
187 memset(bp->tx_ring, 0, B44_TX_RING_BYTES);
189 if (bp->flags & B44_FLAG_RX_RING_HACK)
190 - ssb_dma_sync_single_for_device(bp->sdev, bp->rx_ring_dma,
192 - DMA_BIDIRECTIONAL);
193 + dma_sync_single_for_device(bp->sdev->dma_dev, bp->rx_ring_dma,
194 + DMA_TABLE_BYTES, DMA_BIDIRECTIONAL);
196 if (bp->flags & B44_FLAG_TX_RING_HACK)
197 - ssb_dma_sync_single_for_device(bp->sdev, bp->tx_ring_dma,
200 + dma_sync_single_for_device(bp->sdev->dma_dev, bp->tx_ring_dma,
201 + DMA_TABLE_BYTES, DMA_TO_DEVICE);
203 for (i = 0; i < bp->rx_pending; i++) {
204 if (b44_alloc_rx_skb(bp, -1, i) < 0)
205 @@ -1130,27 +1125,23 @@ static void b44_free_consistent(struct b
206 bp->tx_buffers = NULL;
208 if (bp->flags & B44_FLAG_RX_RING_HACK) {
209 - ssb_dma_unmap_single(bp->sdev, bp->rx_ring_dma,
211 - DMA_BIDIRECTIONAL);
212 + dma_unmap_single(bp->sdev->dma_dev, bp->rx_ring_dma,
213 + DMA_TABLE_BYTES, DMA_BIDIRECTIONAL);
216 - ssb_dma_free_consistent(bp->sdev, DMA_TABLE_BYTES,
217 - bp->rx_ring, bp->rx_ring_dma,
219 + dma_free_coherent(bp->sdev->dma_dev, DMA_TABLE_BYTES,
220 + bp->rx_ring, bp->rx_ring_dma);
222 bp->flags &= ~B44_FLAG_RX_RING_HACK;
225 if (bp->flags & B44_FLAG_TX_RING_HACK) {
226 - ssb_dma_unmap_single(bp->sdev, bp->tx_ring_dma,
229 + dma_unmap_single(bp->sdev->dma_dev, bp->tx_ring_dma,
230 + DMA_TABLE_BYTES, DMA_TO_DEVICE);
233 - ssb_dma_free_consistent(bp->sdev, DMA_TABLE_BYTES,
234 - bp->tx_ring, bp->tx_ring_dma,
236 + dma_free_coherent(bp->sdev->dma_dev, DMA_TABLE_BYTES,
237 + bp->tx_ring, bp->tx_ring_dma);
239 bp->flags &= ~B44_FLAG_TX_RING_HACK;
241 @@ -1175,7 +1166,8 @@ static int b44_alloc_consistent(struct b
244 size = DMA_TABLE_BYTES;
245 - bp->rx_ring = ssb_dma_alloc_consistent(bp->sdev, size, &bp->rx_ring_dma, gfp);
246 + bp->rx_ring = dma_alloc_coherent(bp->sdev->dma_dev, size,
247 + &bp->rx_ring_dma, gfp);
249 /* Allocation may have failed due to pci_alloc_consistent
250 insisting on use of GFP_DMA, which is more restrictive
251 @@ -1187,11 +1179,11 @@ static int b44_alloc_consistent(struct b
255 - rx_ring_dma = ssb_dma_map_single(bp->sdev, rx_ring,
257 - DMA_BIDIRECTIONAL);
258 + rx_ring_dma = dma_map_single(bp->sdev->dma_dev, rx_ring,
260 + DMA_BIDIRECTIONAL);
262 - if (ssb_dma_mapping_error(bp->sdev, rx_ring_dma) ||
263 + if (dma_mapping_error(bp->sdev->dma_dev, rx_ring_dma) ||
264 rx_ring_dma + size > DMA_BIT_MASK(30)) {
267 @@ -1202,7 +1194,8 @@ static int b44_alloc_consistent(struct b
268 bp->flags |= B44_FLAG_RX_RING_HACK;
271 - bp->tx_ring = ssb_dma_alloc_consistent(bp->sdev, size, &bp->tx_ring_dma, gfp);
272 + bp->tx_ring = dma_alloc_coherent(bp->sdev->dma_dev, size,
273 + &bp->tx_ring_dma, gfp);
275 /* Allocation may have failed due to ssb_dma_alloc_consistent
276 insisting on use of GFP_DMA, which is more restrictive
277 @@ -1214,11 +1207,11 @@ static int b44_alloc_consistent(struct b
281 - tx_ring_dma = ssb_dma_map_single(bp->sdev, tx_ring,
284 + tx_ring_dma = dma_map_single(bp->sdev->dma_dev, tx_ring,
288 - if (ssb_dma_mapping_error(bp->sdev, tx_ring_dma) ||
289 + if (dma_mapping_error(bp->sdev->dma_dev, tx_ring_dma) ||
290 tx_ring_dma + size > DMA_BIT_MASK(30)) {
293 @@ -2174,12 +2167,14 @@ static int __devinit b44_init_one(struct
294 "Failed to powerup the bus\n");
295 goto err_out_free_dev;
297 - err = ssb_dma_set_mask(sdev, DMA_BIT_MASK(30));
300 + if (dma_set_mask(sdev->dma_dev, DMA_BIT_MASK(30)) ||
301 + dma_set_coherent_mask(sdev->dma_dev, DMA_BIT_MASK(30))) {
303 "Required 30BIT DMA mask unsupported by the system\n");
304 goto err_out_powerdown;
307 err = b44_get_invariants(bp);
310 @@ -2344,7 +2339,6 @@ static int __init b44_init(void)
313 /* Setup paramaters for syncing RX/TX DMA descriptors */
314 - dma_desc_align_mask = ~(dma_desc_align_size - 1);
315 dma_desc_sync_size = max_t(unsigned int, dma_desc_align_size, sizeof(struct dma_desc));
317 err = b44_pci_init();
318 --- a/drivers/ssb/driver_chipcommon.c
319 +++ b/drivers/ssb/driver_chipcommon.c
320 @@ -209,6 +209,24 @@ static void chipco_powercontrol_init(str
324 +/* http://bcm-v4.sipsolutions.net/802.11/PmuFastPwrupDelay */
325 +static u16 pmu_fast_powerup_delay(struct ssb_chipcommon *cc)
327 + struct ssb_bus *bus = cc->dev->bus;
329 + switch (bus->chip_id) {
341 +/* http://bcm-v4.sipsolutions.net/802.11/ClkctlFastPwrupDelay */
342 static void calc_fast_powerup_delay(struct ssb_chipcommon *cc)
344 struct ssb_bus *bus = cc->dev->bus;
345 @@ -218,6 +236,12 @@ static void calc_fast_powerup_delay(stru
347 if (bus->bustype != SSB_BUSTYPE_PCI)
350 + if (cc->capabilities & SSB_CHIPCO_CAP_PMU) {
351 + cc->fast_pwrup_delay = pmu_fast_powerup_delay(cc);
355 if (!(cc->capabilities & SSB_CHIPCO_CAP_PCTL))
358 --- a/drivers/ssb/driver_chipcommon_pmu.c
359 +++ b/drivers/ssb/driver_chipcommon_pmu.c
360 @@ -502,9 +502,9 @@ static void ssb_pmu_resources_init(struc
361 chipco_write32(cc, SSB_CHIPCO_PMU_MAXRES_MSK, max_msk);
364 +/* http://bcm-v4.sipsolutions.net/802.11/SSB/PmuInit */
365 void ssb_pmu_init(struct ssb_chipcommon *cc)
367 - struct ssb_bus *bus = cc->dev->bus;
370 if (!(cc->capabilities & SSB_CHIPCO_CAP_PMU))
371 @@ -516,15 +516,12 @@ void ssb_pmu_init(struct ssb_chipcommon
372 ssb_dprintk(KERN_DEBUG PFX "Found rev %u PMU (capabilities 0x%08X)\n",
373 cc->pmu.rev, pmucap);
375 - if (cc->pmu.rev >= 1) {
376 - if ((bus->chip_id == 0x4325) && (bus->chip_rev < 2)) {
377 - chipco_mask32(cc, SSB_CHIPCO_PMU_CTL,
378 - ~SSB_CHIPCO_PMU_CTL_NOILPONW);
380 - chipco_set32(cc, SSB_CHIPCO_PMU_CTL,
381 - SSB_CHIPCO_PMU_CTL_NOILPONW);
384 + if (cc->pmu.rev == 1)
385 + chipco_mask32(cc, SSB_CHIPCO_PMU_CTL,
386 + ~SSB_CHIPCO_PMU_CTL_NOILPONW);
388 + chipco_set32(cc, SSB_CHIPCO_PMU_CTL,
389 + SSB_CHIPCO_PMU_CTL_NOILPONW);
390 ssb_pmu_pll_init(cc);
391 ssb_pmu_resources_init(cc);
393 --- a/drivers/ssb/main.c
394 +++ b/drivers/ssb/main.c
395 @@ -385,6 +385,35 @@ static int ssb_device_uevent(struct devi
396 ssb_dev->id.revision);
399 +#define ssb_config_attr(attrib, field, format_string) \
401 +attrib##_show(struct device *dev, struct device_attribute *attr, char *buf) \
403 + return sprintf(buf, format_string, dev_to_ssb_dev(dev)->field); \
406 +ssb_config_attr(core_num, core_index, "%u\n")
407 +ssb_config_attr(coreid, id.coreid, "0x%04x\n")
408 +ssb_config_attr(vendor, id.vendor, "0x%04x\n")
409 +ssb_config_attr(revision, id.revision, "%u\n")
410 +ssb_config_attr(irq, irq, "%u\n")
412 +name_show(struct device *dev, struct device_attribute *attr, char *buf)
414 + return sprintf(buf, "%s\n",
415 + ssb_core_name(dev_to_ssb_dev(dev)->id.coreid));
418 +static struct device_attribute ssb_device_attrs[] = {
420 + __ATTR_RO(core_num),
423 + __ATTR_RO(revision),
428 static struct bus_type ssb_bustype = {
430 .match = ssb_bus_match,
431 @@ -394,6 +423,7 @@ static struct bus_type ssb_bustype = {
432 .suspend = ssb_device_suspend,
433 .resume = ssb_device_resume,
434 .uevent = ssb_device_uevent,
435 + .dev_attrs = ssb_device_attrs,
438 static void ssb_buses_lock(void)
439 @@ -486,6 +516,7 @@ static int ssb_devices_register(struct s
440 #ifdef CONFIG_SSB_PCIHOST
441 sdev->irq = bus->host_pci->irq;
442 dev->parent = &bus->host_pci->dev;
443 + sdev->dma_dev = dev->parent;
446 case SSB_BUSTYPE_PCMCIA:
447 @@ -501,6 +532,7 @@ static int ssb_devices_register(struct s
449 case SSB_BUSTYPE_SSB:
450 dev->dma_mask = &dev->coherent_dma_mask;
451 + sdev->dma_dev = dev;
455 @@ -1162,10 +1194,10 @@ void ssb_device_enable(struct ssb_device
457 EXPORT_SYMBOL(ssb_device_enable);
459 -/* Wait for a bit in a register to get set or unset.
460 +/* Wait for bitmask in a register to get set or cleared.
461 * timeout is in units of ten-microseconds */
462 -static int ssb_wait_bit(struct ssb_device *dev, u16 reg, u32 bitmask,
463 - int timeout, int set)
464 +static int ssb_wait_bits(struct ssb_device *dev, u16 reg, u32 bitmask,
465 + int timeout, int set)
469 @@ -1173,7 +1205,7 @@ static int ssb_wait_bit(struct ssb_devic
470 for (i = 0; i < timeout; i++) {
471 val = ssb_read32(dev, reg);
474 + if ((val & bitmask) == bitmask)
477 if (!(val & bitmask))
478 @@ -1190,20 +1222,38 @@ static int ssb_wait_bit(struct ssb_devic
480 void ssb_device_disable(struct ssb_device *dev, u32 core_specific_flags)
485 if (ssb_read32(dev, SSB_TMSLOW) & SSB_TMSLOW_RESET)
488 reject = ssb_tmslow_reject_bitmask(dev);
489 - ssb_write32(dev, SSB_TMSLOW, reject | SSB_TMSLOW_CLOCK);
490 - ssb_wait_bit(dev, SSB_TMSLOW, reject, 1000, 1);
491 - ssb_wait_bit(dev, SSB_TMSHIGH, SSB_TMSHIGH_BUSY, 1000, 0);
492 - ssb_write32(dev, SSB_TMSLOW,
493 - SSB_TMSLOW_FGC | SSB_TMSLOW_CLOCK |
494 - reject | SSB_TMSLOW_RESET |
495 - core_specific_flags);
496 - ssb_flush_tmslow(dev);
498 + if (ssb_read32(dev, SSB_TMSLOW) & SSB_TMSLOW_CLOCK) {
499 + ssb_write32(dev, SSB_TMSLOW, reject | SSB_TMSLOW_CLOCK);
500 + ssb_wait_bits(dev, SSB_TMSLOW, reject, 1000, 1);
501 + ssb_wait_bits(dev, SSB_TMSHIGH, SSB_TMSHIGH_BUSY, 1000, 0);
503 + if (ssb_read32(dev, SSB_IDLOW) & SSB_IDLOW_INITIATOR) {
504 + val = ssb_read32(dev, SSB_IMSTATE);
505 + val |= SSB_IMSTATE_REJECT;
506 + ssb_write32(dev, SSB_IMSTATE, val);
507 + ssb_wait_bits(dev, SSB_IMSTATE, SSB_IMSTATE_BUSY, 1000,
511 + ssb_write32(dev, SSB_TMSLOW,
512 + SSB_TMSLOW_FGC | SSB_TMSLOW_CLOCK |
513 + reject | SSB_TMSLOW_RESET |
514 + core_specific_flags);
515 + ssb_flush_tmslow(dev);
517 + if (ssb_read32(dev, SSB_IDLOW) & SSB_IDLOW_INITIATOR) {
518 + val = ssb_read32(dev, SSB_IMSTATE);
519 + val &= ~SSB_IMSTATE_REJECT;
520 + ssb_write32(dev, SSB_IMSTATE, val);
524 ssb_write32(dev, SSB_TMSLOW,
525 reject | SSB_TMSLOW_RESET |
526 @@ -1226,80 +1276,6 @@ u32 ssb_dma_translation(struct ssb_devic
528 EXPORT_SYMBOL(ssb_dma_translation);
530 -int ssb_dma_set_mask(struct ssb_device *dev, u64 mask)
532 -#ifdef CONFIG_SSB_PCIHOST
536 - switch (dev->bus->bustype) {
537 - case SSB_BUSTYPE_PCI:
538 -#ifdef CONFIG_SSB_PCIHOST
539 - err = pci_set_dma_mask(dev->bus->host_pci, mask);
542 - err = pci_set_consistent_dma_mask(dev->bus->host_pci, mask);
545 - case SSB_BUSTYPE_SSB:
546 - return dma_set_mask(dev->dev, mask);
548 - __ssb_dma_not_implemented(dev);
552 -EXPORT_SYMBOL(ssb_dma_set_mask);
554 -void * ssb_dma_alloc_consistent(struct ssb_device *dev, size_t size,
555 - dma_addr_t *dma_handle, gfp_t gfp_flags)
557 - switch (dev->bus->bustype) {
558 - case SSB_BUSTYPE_PCI:
559 -#ifdef CONFIG_SSB_PCIHOST
560 - if (gfp_flags & GFP_DMA) {
561 - /* Workaround: The PCI API does not support passing
563 - return dma_alloc_coherent(&dev->bus->host_pci->dev,
564 - size, dma_handle, gfp_flags);
566 - return pci_alloc_consistent(dev->bus->host_pci, size, dma_handle);
568 - case SSB_BUSTYPE_SSB:
569 - return dma_alloc_coherent(dev->dev, size, dma_handle, gfp_flags);
571 - __ssb_dma_not_implemented(dev);
575 -EXPORT_SYMBOL(ssb_dma_alloc_consistent);
577 -void ssb_dma_free_consistent(struct ssb_device *dev, size_t size,
578 - void *vaddr, dma_addr_t dma_handle,
581 - switch (dev->bus->bustype) {
582 - case SSB_BUSTYPE_PCI:
583 -#ifdef CONFIG_SSB_PCIHOST
584 - if (gfp_flags & GFP_DMA) {
585 - /* Workaround: The PCI API does not support passing
587 - dma_free_coherent(&dev->bus->host_pci->dev,
588 - size, vaddr, dma_handle);
591 - pci_free_consistent(dev->bus->host_pci, size,
592 - vaddr, dma_handle);
595 - case SSB_BUSTYPE_SSB:
596 - dma_free_coherent(dev->dev, size, vaddr, dma_handle);
599 - __ssb_dma_not_implemented(dev);
602 -EXPORT_SYMBOL(ssb_dma_free_consistent);
604 int ssb_bus_may_powerdown(struct ssb_bus *bus)
606 struct ssb_chipcommon *cc;
607 --- a/drivers/ssb/pci.c
608 +++ b/drivers/ssb/pci.c
609 @@ -406,6 +406,46 @@ static void sprom_extract_r123(struct ss
610 out->antenna_gain.ghz5.a3 = gain;
613 +/* Revs 4 5 and 8 have partially shared layout */
614 +static void sprom_extract_r458(struct ssb_sprom *out, const u16 *in)
616 + SPEX(txpid2g[0], SSB_SPROM4_TXPID2G01,
617 + SSB_SPROM4_TXPID2G0, SSB_SPROM4_TXPID2G0_SHIFT);
618 + SPEX(txpid2g[1], SSB_SPROM4_TXPID2G01,
619 + SSB_SPROM4_TXPID2G1, SSB_SPROM4_TXPID2G1_SHIFT);
620 + SPEX(txpid2g[2], SSB_SPROM4_TXPID2G23,
621 + SSB_SPROM4_TXPID2G2, SSB_SPROM4_TXPID2G2_SHIFT);
622 + SPEX(txpid2g[3], SSB_SPROM4_TXPID2G23,
623 + SSB_SPROM4_TXPID2G3, SSB_SPROM4_TXPID2G3_SHIFT);
625 + SPEX(txpid5gl[0], SSB_SPROM4_TXPID5GL01,
626 + SSB_SPROM4_TXPID5GL0, SSB_SPROM4_TXPID5GL0_SHIFT);
627 + SPEX(txpid5gl[1], SSB_SPROM4_TXPID5GL01,
628 + SSB_SPROM4_TXPID5GL1, SSB_SPROM4_TXPID5GL1_SHIFT);
629 + SPEX(txpid5gl[2], SSB_SPROM4_TXPID5GL23,
630 + SSB_SPROM4_TXPID5GL2, SSB_SPROM4_TXPID5GL2_SHIFT);
631 + SPEX(txpid5gl[3], SSB_SPROM4_TXPID5GL23,
632 + SSB_SPROM4_TXPID5GL3, SSB_SPROM4_TXPID5GL3_SHIFT);
634 + SPEX(txpid5g[0], SSB_SPROM4_TXPID5G01,
635 + SSB_SPROM4_TXPID5G0, SSB_SPROM4_TXPID5G0_SHIFT);
636 + SPEX(txpid5g[1], SSB_SPROM4_TXPID5G01,
637 + SSB_SPROM4_TXPID5G1, SSB_SPROM4_TXPID5G1_SHIFT);
638 + SPEX(txpid5g[2], SSB_SPROM4_TXPID5G23,
639 + SSB_SPROM4_TXPID5G2, SSB_SPROM4_TXPID5G2_SHIFT);
640 + SPEX(txpid5g[3], SSB_SPROM4_TXPID5G23,
641 + SSB_SPROM4_TXPID5G3, SSB_SPROM4_TXPID5G3_SHIFT);
643 + SPEX(txpid5gh[0], SSB_SPROM4_TXPID5GH01,
644 + SSB_SPROM4_TXPID5GH0, SSB_SPROM4_TXPID5GH0_SHIFT);
645 + SPEX(txpid5gh[1], SSB_SPROM4_TXPID5GH01,
646 + SSB_SPROM4_TXPID5GH1, SSB_SPROM4_TXPID5GH1_SHIFT);
647 + SPEX(txpid5gh[2], SSB_SPROM4_TXPID5GH23,
648 + SSB_SPROM4_TXPID5GH2, SSB_SPROM4_TXPID5GH2_SHIFT);
649 + SPEX(txpid5gh[3], SSB_SPROM4_TXPID5GH23,
650 + SSB_SPROM4_TXPID5GH3, SSB_SPROM4_TXPID5GH3_SHIFT);
653 static void sprom_extract_r45(struct ssb_sprom *out, const u16 *in)
656 @@ -428,10 +468,14 @@ static void sprom_extract_r45(struct ssb
657 SPEX(country_code, SSB_SPROM4_CCODE, 0xFFFF, 0);
658 SPEX(boardflags_lo, SSB_SPROM4_BFLLO, 0xFFFF, 0);
659 SPEX(boardflags_hi, SSB_SPROM4_BFLHI, 0xFFFF, 0);
660 + SPEX(boardflags2_lo, SSB_SPROM4_BFL2LO, 0xFFFF, 0);
661 + SPEX(boardflags2_hi, SSB_SPROM4_BFL2HI, 0xFFFF, 0);
663 SPEX(country_code, SSB_SPROM5_CCODE, 0xFFFF, 0);
664 SPEX(boardflags_lo, SSB_SPROM5_BFLLO, 0xFFFF, 0);
665 SPEX(boardflags_hi, SSB_SPROM5_BFLHI, 0xFFFF, 0);
666 + SPEX(boardflags2_lo, SSB_SPROM5_BFL2LO, 0xFFFF, 0);
667 + SPEX(boardflags2_hi, SSB_SPROM5_BFL2HI, 0xFFFF, 0);
669 SPEX(ant_available_a, SSB_SPROM4_ANTAVAIL, SSB_SPROM4_ANTAVAIL_A,
670 SSB_SPROM4_ANTAVAIL_A_SHIFT);
671 @@ -471,6 +515,8 @@ static void sprom_extract_r45(struct ssb
672 memcpy(&out->antenna_gain.ghz5, &out->antenna_gain.ghz24,
673 sizeof(out->antenna_gain.ghz5));
675 + sprom_extract_r458(out, in);
677 /* TODO - get remaining rev 4 stuff needed */
680 @@ -561,6 +607,8 @@ static void sprom_extract_r8(struct ssb_
681 memcpy(&out->antenna_gain.ghz5, &out->antenna_gain.ghz24,
682 sizeof(out->antenna_gain.ghz5));
684 + sprom_extract_r458(out, in);
686 /* TODO - get remaining rev 8 stuff needed */
689 @@ -573,37 +621,34 @@ static int sprom_extract(struct ssb_bus
690 ssb_dprintk(KERN_DEBUG PFX "SPROM revision %d detected.\n", out->revision);
691 memset(out->et0mac, 0xFF, 6); /* preset et0 and et1 mac */
692 memset(out->et1mac, 0xFF, 6);
694 if ((bus->chip_id & 0xFF00) == 0x4400) {
695 /* Workaround: The BCM44XX chip has a stupid revision
696 * number stored in the SPROM.
697 * Always extract r1. */
699 + ssb_dprintk(KERN_DEBUG PFX "SPROM treated as revision %d\n", out->revision);
702 + switch (out->revision) {
706 sprom_extract_r123(out, in);
707 - } else if (bus->chip_id == 0x4321) {
708 - /* the BCM4328 has a chipid == 0x4321 and a rev 4 SPROM */
713 sprom_extract_r45(out, in);
715 - switch (out->revision) {
719 - sprom_extract_r123(out, in);
723 - sprom_extract_r45(out, in);
726 - sprom_extract_r8(out, in);
729 - ssb_printk(KERN_WARNING PFX "Unsupported SPROM"
730 - " revision %d detected. Will extract"
731 - " v1\n", out->revision);
733 - sprom_extract_r123(out, in);
737 + sprom_extract_r8(out, in);
740 + ssb_printk(KERN_WARNING PFX "Unsupported SPROM"
741 + " revision %d detected. Will extract"
742 + " v1\n", out->revision);
744 + sprom_extract_r123(out, in);
747 if (out->boardflags_lo == 0xFFFF)
748 @@ -618,7 +663,7 @@ static int ssb_pci_sprom_get(struct ssb_
749 struct ssb_sprom *sprom)
751 const struct ssb_sprom *fallback;
756 if (!ssb_is_sprom_available(bus)) {
757 @@ -645,7 +690,7 @@ static int ssb_pci_sprom_get(struct ssb_
759 buf = kcalloc(SSB_SPROMSIZE_WORDS_R123, sizeof(u16), GFP_KERNEL);
763 bus->sprom_size = SSB_SPROMSIZE_WORDS_R123;
764 sprom_do_read(bus, buf);
765 err = sprom_check_crc(buf, bus->sprom_size);
766 @@ -655,7 +700,7 @@ static int ssb_pci_sprom_get(struct ssb_
767 buf = kcalloc(SSB_SPROMSIZE_WORDS_R4, sizeof(u16),
772 bus->sprom_size = SSB_SPROMSIZE_WORDS_R4;
773 sprom_do_read(bus, buf);
774 err = sprom_check_crc(buf, bus->sprom_size);
775 @@ -677,7 +722,6 @@ static int ssb_pci_sprom_get(struct ssb_
783 --- a/drivers/ssb/pcihost_wrapper.c
784 +++ b/drivers/ssb/pcihost_wrapper.c
785 @@ -59,6 +59,7 @@ static int ssb_pcihost_probe(struct pci_
791 ssb = kzalloc(sizeof(*ssb), GFP_KERNEL);
793 @@ -74,6 +75,12 @@ static int ssb_pcihost_probe(struct pci_
794 goto err_pci_disable;
797 + /* Disable the RETRY_TIMEOUT register (0x41) to keep
798 + * PCI Tx retries from interfering with C3 CPU state */
799 + pci_read_config_dword(dev, 0x40, &val);
800 + if ((val & 0x0000ff00) != 0)
801 + pci_write_config_dword(dev, 0x40, val & 0xffff00ff);
803 err = ssb_bus_pcibus_register(ssb, dev);
805 goto err_pci_release_regions;
806 --- a/drivers/ssb/pcmcia.c
807 +++ b/drivers/ssb/pcmcia.c
808 @@ -745,7 +745,7 @@ int ssb_pcmcia_get_invariants(struct ssb
810 /* Fetch the vendor specific tuples. */
811 res = pcmcia_loop_tuple(bus->host_pcmcia, SSB_PCMCIA_CIS,
812 - ssb_pcmcia_do_get_invariants, sprom);
813 + ssb_pcmcia_do_get_invariants, iv);
814 if ((res == 0) || (res == -ENOSPC))
817 --- a/drivers/ssb/scan.c
818 +++ b/drivers/ssb/scan.c
819 @@ -407,10 +407,10 @@ int ssb_bus_scan(struct ssb_bus *bus,
820 /* Ignore PCI cores on PCI-E cards.
821 * Ignore PCI-E cores on PCI cards. */
822 if (dev->id.coreid == SSB_DEV_PCI) {
823 - if (bus->host_pci->is_pcie)
824 + if (pci_is_pcie(bus->host_pci))
827 - if (!bus->host_pci->is_pcie)
828 + if (!pci_is_pcie(bus->host_pci))
832 @@ -422,6 +422,16 @@ int ssb_bus_scan(struct ssb_bus *bus,
833 bus->pcicore.dev = dev;
834 #endif /* CONFIG_SSB_DRIVER_PCICORE */
836 + case SSB_DEV_ETHERNET:
837 + if (bus->bustype == SSB_BUSTYPE_PCI) {
838 + if (bus->host_pci->vendor == PCI_VENDOR_ID_BROADCOM &&
839 + (bus->host_pci->device & 0xFF00) == 0x4300) {
840 + /* This is a dangling ethernet core on a
841 + * wireless device. Ignore it. */
849 --- a/include/linux/ssb/ssb.h
850 +++ b/include/linux/ssb/ssb.h
851 @@ -55,6 +55,10 @@ struct ssb_sprom {
852 u8 tri5gl; /* 5.2GHz TX isolation */
853 u8 tri5g; /* 5.3GHz TX isolation */
854 u8 tri5gh; /* 5.8GHz TX isolation */
855 + u8 txpid2g[4]; /* 2GHz TX power index */
856 + u8 txpid5gl[4]; /* 4.9 - 5.1GHz TX power index */
857 + u8 txpid5g[4]; /* 5.1 - 5.5GHz TX power index */
858 + u8 txpid5gh[4]; /* 5.5 - ...GHz TX power index */
859 u8 rxpo2g; /* 2GHz RX power offset */
860 u8 rxpo5g; /* 5GHz RX power offset */
861 u8 rssisav2g; /* 2GHz RSSI params */
862 @@ -167,7 +171,7 @@ struct ssb_device {
863 * is an optimization. */
864 const struct ssb_bus_ops *ops;
866 - struct device *dev;
867 + struct device *dev, *dma_dev;
870 struct ssb_device_id id;
871 @@ -470,14 +474,6 @@ extern u32 ssb_dma_translation(struct ss
872 #define SSB_DMA_TRANSLATION_MASK 0xC0000000
873 #define SSB_DMA_TRANSLATION_SHIFT 30
875 -extern int ssb_dma_set_mask(struct ssb_device *dev, u64 mask);
877 -extern void * ssb_dma_alloc_consistent(struct ssb_device *dev, size_t size,
878 - dma_addr_t *dma_handle, gfp_t gfp_flags);
879 -extern void ssb_dma_free_consistent(struct ssb_device *dev, size_t size,
880 - void *vaddr, dma_addr_t dma_handle,
883 static inline void __cold __ssb_dma_not_implemented(struct ssb_device *dev)
885 #ifdef CONFIG_SSB_DEBUG
886 @@ -486,155 +482,6 @@ static inline void __cold __ssb_dma_not_
890 -static inline int ssb_dma_mapping_error(struct ssb_device *dev, dma_addr_t addr)
892 - switch (dev->bus->bustype) {
893 - case SSB_BUSTYPE_PCI:
894 -#ifdef CONFIG_SSB_PCIHOST
895 - return pci_dma_mapping_error(dev->bus->host_pci, addr);
898 - case SSB_BUSTYPE_SSB:
899 - return dma_mapping_error(dev->dev, addr);
903 - __ssb_dma_not_implemented(dev);
907 -static inline dma_addr_t ssb_dma_map_single(struct ssb_device *dev, void *p,
908 - size_t size, enum dma_data_direction dir)
910 - switch (dev->bus->bustype) {
911 - case SSB_BUSTYPE_PCI:
912 -#ifdef CONFIG_SSB_PCIHOST
913 - return pci_map_single(dev->bus->host_pci, p, size, dir);
916 - case SSB_BUSTYPE_SSB:
917 - return dma_map_single(dev->dev, p, size, dir);
921 - __ssb_dma_not_implemented(dev);
925 -static inline void ssb_dma_unmap_single(struct ssb_device *dev, dma_addr_t dma_addr,
926 - size_t size, enum dma_data_direction dir)
928 - switch (dev->bus->bustype) {
929 - case SSB_BUSTYPE_PCI:
930 -#ifdef CONFIG_SSB_PCIHOST
931 - pci_unmap_single(dev->bus->host_pci, dma_addr, size, dir);
935 - case SSB_BUSTYPE_SSB:
936 - dma_unmap_single(dev->dev, dma_addr, size, dir);
941 - __ssb_dma_not_implemented(dev);
944 -static inline void ssb_dma_sync_single_for_cpu(struct ssb_device *dev,
945 - dma_addr_t dma_addr,
947 - enum dma_data_direction dir)
949 - switch (dev->bus->bustype) {
950 - case SSB_BUSTYPE_PCI:
951 -#ifdef CONFIG_SSB_PCIHOST
952 - pci_dma_sync_single_for_cpu(dev->bus->host_pci, dma_addr,
957 - case SSB_BUSTYPE_SSB:
958 - dma_sync_single_for_cpu(dev->dev, dma_addr, size, dir);
963 - __ssb_dma_not_implemented(dev);
966 -static inline void ssb_dma_sync_single_for_device(struct ssb_device *dev,
967 - dma_addr_t dma_addr,
969 - enum dma_data_direction dir)
971 - switch (dev->bus->bustype) {
972 - case SSB_BUSTYPE_PCI:
973 -#ifdef CONFIG_SSB_PCIHOST
974 - pci_dma_sync_single_for_device(dev->bus->host_pci, dma_addr,
979 - case SSB_BUSTYPE_SSB:
980 - dma_sync_single_for_device(dev->dev, dma_addr, size, dir);
985 - __ssb_dma_not_implemented(dev);
988 -static inline void ssb_dma_sync_single_range_for_cpu(struct ssb_device *dev,
989 - dma_addr_t dma_addr,
990 - unsigned long offset,
992 - enum dma_data_direction dir)
994 - switch (dev->bus->bustype) {
995 - case SSB_BUSTYPE_PCI:
996 -#ifdef CONFIG_SSB_PCIHOST
997 - /* Just sync everything. That's all the PCI API can do. */
998 - pci_dma_sync_single_for_cpu(dev->bus->host_pci, dma_addr,
999 - offset + size, dir);
1003 - case SSB_BUSTYPE_SSB:
1004 - dma_sync_single_range_for_cpu(dev->dev, dma_addr, offset,
1010 - __ssb_dma_not_implemented(dev);
1013 -static inline void ssb_dma_sync_single_range_for_device(struct ssb_device *dev,
1014 - dma_addr_t dma_addr,
1015 - unsigned long offset,
1017 - enum dma_data_direction dir)
1019 - switch (dev->bus->bustype) {
1020 - case SSB_BUSTYPE_PCI:
1021 -#ifdef CONFIG_SSB_PCIHOST
1022 - /* Just sync everything. That's all the PCI API can do. */
1023 - pci_dma_sync_single_for_device(dev->bus->host_pci, dma_addr,
1024 - offset + size, dir);
1028 - case SSB_BUSTYPE_SSB:
1029 - dma_sync_single_range_for_device(dev->dev, dma_addr, offset,
1035 - __ssb_dma_not_implemented(dev);
1039 #ifdef CONFIG_SSB_PCIHOST
1040 /* PCI-host wrapper driver */
1041 extern int ssb_pcihost_register(struct pci_driver *driver);
1042 --- a/include/linux/ssb/ssb_driver_gige.h
1043 +++ b/include/linux/ssb/ssb_driver_gige.h
1044 @@ -96,16 +96,21 @@ static inline bool ssb_gige_must_flush_p
1048 -extern char * nvram_get(const char *name);
1049 +#ifdef CONFIG_BCM47XX
1050 +#include <asm/mach-bcm47xx/nvram.h>
1051 /* Get the device MAC address */
1052 static inline void ssb_gige_get_macaddr(struct pci_dev *pdev, u8 *macaddr)
1054 -#ifdef CONFIG_BCM47XX
1055 - char *res = nvram_get("et0macaddr");
1057 - memcpy(macaddr, res, 6);
1060 + if (nvram_getenv("et0macaddr", buf, sizeof(buf)) < 0)
1062 + nvram_parse_macaddr(buf, macaddr);
1065 +static inline void ssb_gige_get_macaddr(struct pci_dev *pdev, u8 *macaddr)
1070 extern int ssb_gige_pcibios_plat_dev_init(struct ssb_device *sdev,
1071 struct pci_dev *pdev);
1072 --- a/include/linux/ssb/ssb_regs.h
1073 +++ b/include/linux/ssb/ssb_regs.h
1075 #define SSB_IMSTATE_AP_RSV 0x00000030 /* Reserved */
1076 #define SSB_IMSTATE_IBE 0x00020000 /* In Band Error */
1077 #define SSB_IMSTATE_TO 0x00040000 /* Timeout */
1078 +#define SSB_IMSTATE_BUSY 0x01800000 /* Busy (Backplane rev >= 2.3 only) */
1079 +#define SSB_IMSTATE_REJECT 0x02000000 /* Reject (Backplane rev >= 2.3 only) */
1080 #define SSB_INTVEC 0x0F94 /* SB Interrupt Mask */
1081 #define SSB_INTVEC_PCI 0x00000001 /* Enable interrupts for PCI */
1082 #define SSB_INTVEC_ENET0 0x00000002 /* Enable interrupts for enet 0 */
1084 /* SPROM Revision 4 */
1085 #define SSB_SPROM4_BFLLO 0x0044 /* Boardflags (low 16 bits) */
1086 #define SSB_SPROM4_BFLHI 0x0046 /* Board Flags Hi */
1087 +#define SSB_SPROM4_BFL2LO 0x0048 /* Board flags 2 (low 16 bits) */
1088 +#define SSB_SPROM4_BFL2HI 0x004A /* Board flags 2 Hi */
1089 #define SSB_SPROM4_IL0MAC 0x004C /* 6 byte MAC address for a/b/g/n */
1090 #define SSB_SPROM4_CCODE 0x0052 /* Country Code (2 bytes) */
1091 #define SSB_SPROM4_GPIOA 0x0056 /* Gen. Purpose IO # 0 and 1 */
1092 @@ -298,6 +302,46 @@
1093 #define SSB_SPROM4_AGAIN2_SHIFT 0
1094 #define SSB_SPROM4_AGAIN3 0xFF00 /* Antenna 3 */
1095 #define SSB_SPROM4_AGAIN3_SHIFT 8
1096 +#define SSB_SPROM4_TXPID2G01 0x0062 /* TX Power Index 2GHz */
1097 +#define SSB_SPROM4_TXPID2G0 0x00FF
1098 +#define SSB_SPROM4_TXPID2G0_SHIFT 0
1099 +#define SSB_SPROM4_TXPID2G1 0xFF00
1100 +#define SSB_SPROM4_TXPID2G1_SHIFT 8
1101 +#define SSB_SPROM4_TXPID2G23 0x0064 /* TX Power Index 2GHz */
1102 +#define SSB_SPROM4_TXPID2G2 0x00FF
1103 +#define SSB_SPROM4_TXPID2G2_SHIFT 0
1104 +#define SSB_SPROM4_TXPID2G3 0xFF00
1105 +#define SSB_SPROM4_TXPID2G3_SHIFT 8
1106 +#define SSB_SPROM4_TXPID5G01 0x0066 /* TX Power Index 5GHz middle subband */
1107 +#define SSB_SPROM4_TXPID5G0 0x00FF
1108 +#define SSB_SPROM4_TXPID5G0_SHIFT 0
1109 +#define SSB_SPROM4_TXPID5G1 0xFF00
1110 +#define SSB_SPROM4_TXPID5G1_SHIFT 8
1111 +#define SSB_SPROM4_TXPID5G23 0x0068 /* TX Power Index 5GHz middle subband */
1112 +#define SSB_SPROM4_TXPID5G2 0x00FF
1113 +#define SSB_SPROM4_TXPID5G2_SHIFT 0
1114 +#define SSB_SPROM4_TXPID5G3 0xFF00
1115 +#define SSB_SPROM4_TXPID5G3_SHIFT 8
1116 +#define SSB_SPROM4_TXPID5GL01 0x006A /* TX Power Index 5GHz low subband */
1117 +#define SSB_SPROM4_TXPID5GL0 0x00FF
1118 +#define SSB_SPROM4_TXPID5GL0_SHIFT 0
1119 +#define SSB_SPROM4_TXPID5GL1 0xFF00
1120 +#define SSB_SPROM4_TXPID5GL1_SHIFT 8
1121 +#define SSB_SPROM4_TXPID5GL23 0x006C /* TX Power Index 5GHz low subband */
1122 +#define SSB_SPROM4_TXPID5GL2 0x00FF
1123 +#define SSB_SPROM4_TXPID5GL2_SHIFT 0
1124 +#define SSB_SPROM4_TXPID5GL3 0xFF00
1125 +#define SSB_SPROM4_TXPID5GL3_SHIFT 8
1126 +#define SSB_SPROM4_TXPID5GH01 0x006E /* TX Power Index 5GHz high subband */
1127 +#define SSB_SPROM4_TXPID5GH0 0x00FF
1128 +#define SSB_SPROM4_TXPID5GH0_SHIFT 0
1129 +#define SSB_SPROM4_TXPID5GH1 0xFF00
1130 +#define SSB_SPROM4_TXPID5GH1_SHIFT 8
1131 +#define SSB_SPROM4_TXPID5GH23 0x0070 /* TX Power Index 5GHz high subband */
1132 +#define SSB_SPROM4_TXPID5GH2 0x00FF
1133 +#define SSB_SPROM4_TXPID5GH2_SHIFT 0
1134 +#define SSB_SPROM4_TXPID5GH3 0xFF00
1135 +#define SSB_SPROM4_TXPID5GH3_SHIFT 8
1136 #define SSB_SPROM4_MAXP_BG 0x0080 /* Max Power BG in path 1 */
1137 #define SSB_SPROM4_MAXP_BG_MASK 0x00FF /* Mask for Max Power BG */
1138 #define SSB_SPROM4_ITSSI_BG 0xFF00 /* Mask for path 1 itssi_bg */
1140 #define SSB_SPROM5_CCODE 0x0044 /* Country Code (2 bytes) */
1141 #define SSB_SPROM5_BFLLO 0x004A /* Boardflags (low 16 bits) */
1142 #define SSB_SPROM5_BFLHI 0x004C /* Board Flags Hi */
1143 +#define SSB_SPROM5_BFL2LO 0x004E /* Board flags 2 (low 16 bits) */
1144 +#define SSB_SPROM5_BFL2HI 0x0050 /* Board flags 2 Hi */
1145 #define SSB_SPROM5_IL0MAC 0x0052 /* 6 byte MAC address for a/b/g/n */
1146 #define SSB_SPROM5_GPIOA 0x0076 /* Gen. Purpose IO # 0 and 1 */
1147 #define SSB_SPROM5_GPIOA_P0 0x00FF /* Pin 0 */