[ar71xx] TL-WR941ND: update flash partition map
[openwrt.git] / target / linux / at91 / patches-2.6.25 / 009-fdl-uartinit.patch
1 --- a/arch/arm/mach-at91/at91rm9200_devices.c
2 +++ b/arch/arm/mach-at91/at91rm9200_devices.c
3 @@ -1001,7 +1001,15 @@ static inline void configure_usart0_pins
4 * We need to drive the pin manually. Default is off (RTS is active low).
5 */
6 at91_set_gpio_output(AT91_PIN_PA21, 1);
7 - }
8 + }
9 + if (pins & ATMEL_UART_DTR)
10 + at91_set_gpio_output(AT91_PIN_PB6, 1); /* DTR0 */
11 + if (pins & ATMEL_UART_RI)
12 + at91_set_gpio_output(AT91_PIN_PB7, 1); /* RI0 */
13 + if (pins & ATMEL_UART_DCD) {
14 + at91_set_gpio_input(AT91_PIN_PA19, 1); /* DCD0 */
15 + at91_set_deglitch(AT91_PIN_PA19, 1);
16 + }
17 }
18
19 static struct resource uart1_resources[] = {
20 @@ -1139,6 +1147,14 @@ static inline void configure_usart3_pins
21 at91_set_B_periph(AT91_PIN_PB1, 0); /* CTS3 */
22 if (pins & ATMEL_UART_RTS)
23 at91_set_B_periph(AT91_PIN_PB0, 0); /* RTS3 */
24 + if (pins & ATMEL_UART_DTR)
25 + at91_set_gpio_output(AT91_PIN_PB29, 1); /* DTR0 */
26 + if (pins & ATMEL_UART_RI)
27 + at91_set_gpio_output(AT91_PIN_PB2, 1); /* RI0 */
28 + if (pins & ATMEL_UART_DCD) {
29 + at91_set_gpio_input(AT91_PIN_PA24, 1); /* DCD0 */
30 + at91_set_deglitch(AT91_PIN_PA24, 1);
31 + }
32 }
33
34 static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */
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