target/linux/adm5120/patches-2.6.37/200-amba_pl010_hacks.patch

   1 --- a/drivers/serial/amba-pl010.c
   2 +++ b/drivers/serial/amba-pl010.c
   3 @@ -51,11 +51,10 @@
   4
   5  #include <asm/io.h>
   6
   7 -#define UART_NR                8
   8 -
   9  #define SERIAL_AMBA_MAJOR      204
  10  #define SERIAL_AMBA_MINOR      16
  11 -#define SERIAL_AMBA_NR         UART_NR
  12 +#define SERIAL_AMBA_NR         CONFIG_SERIAL_AMBA_PL010_NUMPORTS
  13 +#define SERIAL_AMBA_NAME       CONFIG_SERIAL_AMBA_PL010_PORTNAME
  14
  15  #define AMBA_ISR_PASS_LIMIT    256
  16
  17 @@ -81,9 +80,9 @@ static void pl010_stop_tx(struct uart_po
  18         struct uart_amba_port *uap = (struct uart_amba_port *)port;
  19         unsigned int cr;
  20
  21 -       cr = readb(uap->port.membase + UART010_CR);
  22 +       cr = __raw_readl(uap->port.membase + UART010_CR);
  23         cr &= ~UART010_CR_TIE;
  24 -       writel(cr, uap->port.membase + UART010_CR);
  25 +       __raw_writel(cr, uap->port.membase + UART010_CR);
  26  }
  27
  28  static void pl010_start_tx(struct uart_port *port)
  29 @@ -91,9 +90,9 @@ static void pl010_start_tx(struct uart_p
  30         struct uart_amba_port *uap = (struct uart_amba_port *)port;
  31         unsigned int cr;
  32
  33 -       cr = readb(uap->port.membase + UART010_CR);
  34 +       cr = __raw_readl(uap->port.membase + UART010_CR);
  35         cr |= UART010_CR_TIE;
  36 -       writel(cr, uap->port.membase + UART010_CR);
  37 +       __raw_writel(cr, uap->port.membase + UART010_CR);
  38  }
  39
  40  static void pl010_stop_rx(struct uart_port *port)
  41 @@ -101,9 +100,9 @@ static void pl010_stop_rx(struct uart_po
  42         struct uart_amba_port *uap = (struct uart_amba_port *)port;
  43         unsigned int cr;
  44
  45 -       cr = readb(uap->port.membase + UART010_CR);
  46 +       cr = __raw_readl(uap->port.membase + UART010_CR);
  47         cr &= ~(UART010_CR_RIE | UART010_CR_RTIE);
  48 -       writel(cr, uap->port.membase + UART010_CR);
  49 +       __raw_writel(cr, uap->port.membase + UART010_CR);
  50  }
  51
  52  static void pl010_enable_ms(struct uart_port *port)
  53 @@ -111,9 +110,9 @@ static void pl010_enable_ms(struct uart_
  54         struct uart_amba_port *uap = (struct uart_amba_port *)port;
  55         unsigned int cr;
  56
  57 -       cr = readb(uap->port.membase + UART010_CR);
  58 +       cr = __raw_readl(uap->port.membase + UART010_CR);
  59         cr |= UART010_CR_MSIE;
  60 -       writel(cr, uap->port.membase + UART010_CR);
  61 +       __raw_writel(cr, uap->port.membase + UART010_CR);
  62  }
  63
  64  static void pl010_rx_chars(struct uart_amba_port *uap)
  65 @@ -121,9 +120,9 @@ static void pl010_rx_chars(struct uart_a
  66         struct tty_struct *tty = uap->port.state->port.tty;
  67         unsigned int status, ch, flag, rsr, max_count = 256;
  68
  69 -       status = readb(uap->port.membase + UART01x_FR);
  70 +       status = __raw_readl(uap->port.membase + UART01x_FR);
  71         while (UART_RX_DATA(status) && max_count--) {
  72 -               ch = readb(uap->port.membase + UART01x_DR);
  73 +               ch = __raw_readl(uap->port.membase + UART01x_DR);
  74                 flag = TTY_NORMAL;
  75
  76                 uap->port.icount.rx++;
  77 @@ -132,9 +131,9 @@ static void pl010_rx_chars(struct uart_a
  78                  * Note that the error handling code is
  79                  * out of the main execution path
  80                  */
  81 -               rsr = readb(uap->port.membase + UART01x_RSR) | UART_DUMMY_RSR_RX;
  82 +               rsr = __raw_readl(uap->port.membase + UART01x_RSR) | UART_DUMMY_RSR_RX;
  83                 if (unlikely(rsr & UART01x_RSR_ANY)) {
  84 -                       writel(0, uap->port.membase + UART01x_ECR);
  85 +                       __raw_writel(0, uap->port.membase + UART01x_ECR);
  86
  87                         if (rsr & UART01x_RSR_BE) {
  88                                 rsr &= ~(UART01x_RSR_FE | UART01x_RSR_PE);
  89 @@ -164,7 +163,7 @@ static void pl010_rx_chars(struct uart_a
  90                 uart_insert_char(&uap->port, rsr, UART01x_RSR_OE, ch, flag);
  91
  92         ignore_char:
  93 -               status = readb(uap->port.membase + UART01x_FR);
  94 +               status = __raw_readl(uap->port.membase + UART01x_FR);
  95         }
  96         spin_unlock(&uap->port.lock);
  97         tty_flip_buffer_push(tty);
  98 @@ -177,7 +176,7 @@ static void pl010_tx_chars(struct uart_a
  99         int count;
 100
 101         if (uap->port.x_char) {
 102 -               writel(uap->port.x_char, uap->port.membase + UART01x_DR);
 103 +               __raw_writel(uap->port.x_char, uap->port.membase + UART01x_DR);
 104                 uap->port.icount.tx++;
 105                 uap->port.x_char = 0;
 106                 return;
 107 @@ -189,7 +188,7 @@ static void pl010_tx_chars(struct uart_a
 108
 109         count = uap->port.fifosize >> 1;
 110         do {
 111 -               writel(xmit->buf[xmit->tail], uap->port.membase + UART01x_DR);
 112 +               __raw_writel(xmit->buf[xmit->tail], uap->port.membase + UART01x_DR);
 113                 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
 114                 uap->port.icount.tx++;
 115                 if (uart_circ_empty(xmit))
 116 @@ -207,9 +206,9 @@ static void pl010_modem_status(struct ua
 117  {
 118         unsigned int status, delta;
 119
 120 -       writel(0, uap->port.membase + UART010_ICR);
 121 +       __raw_writel(0, uap->port.membase + UART010_ICR);
 122
 123 -       status = readb(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY;
 124 +       status = __raw_readl(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY;
 125
 126         delta = status ^ uap->old_status;
 127         uap->old_status = status;
 128 @@ -237,7 +236,7 @@ static irqreturn_t pl010_int(int irq, vo
 129
 130         spin_lock(&uap->port.lock);
 131
 132 -       status = readb(uap->port.membase + UART010_IIR);
 133 +       status = __raw_readl(uap->port.membase + UART010_IIR);
 134         if (status) {
 135                 do {
 136                         if (status & (UART010_IIR_RTIS | UART010_IIR_RIS))
 137 @@ -250,7 +249,7 @@ static irqreturn_t pl010_int(int irq, vo
 138                         if (pass_counter-- == 0)
 139                                 break;
 140
 141 -                       status = readb(uap->port.membase + UART010_IIR);
 142 +                       status = __raw_readl(uap->port.membase + UART010_IIR);
 143                 } while (status & (UART010_IIR_RTIS | UART010_IIR_RIS |
 144                                    UART010_IIR_TIS));
 145                 handled = 1;
 146 @@ -264,7 +263,7 @@ static irqreturn_t pl010_int(int irq, vo
 147  static unsigned int pl010_tx_empty(struct uart_port *port)
 148  {
 149         struct uart_amba_port *uap = (struct uart_amba_port *)port;
 150 -       unsigned int status = readb(uap->port.membase + UART01x_FR);
 151 +       unsigned int status = __raw_readl(uap->port.membase + UART01x_FR);
 152         return status & UART01x_FR_BUSY ? 0 : TIOCSER_TEMT;
 153  }
 154
 155 @@ -274,7 +273,7 @@ static unsigned int pl010_get_mctrl(stru
 156         unsigned int result = 0;
 157         unsigned int status;
 158
 159 -       status = readb(uap->port.membase + UART01x_FR);
 160 +       status = __raw_readl(uap->port.membase + UART01x_FR);
 161         if (status & UART01x_FR_DCD)
 162                 result |= TIOCM_CAR;
 163         if (status & UART01x_FR_DSR)
 164 @@ -300,12 +299,12 @@ static void pl010_break_ctl(struct uart_
 165         unsigned int lcr_h;
 166
 167         spin_lock_irqsave(&uap->port.lock, flags);
 168 -       lcr_h = readb(uap->port.membase + UART010_LCRH);
 169 +       lcr_h = __raw_readl(uap->port.membase + UART010_LCRH);
 170         if (break_state == -1)
 171                 lcr_h |= UART01x_LCRH_BRK;
 172         else
 173                 lcr_h &= ~UART01x_LCRH_BRK;
 174 -       writel(lcr_h, uap->port.membase + UART010_LCRH);
 175 +       __raw_writel(lcr_h, uap->port.membase + UART010_LCRH);
 176         spin_unlock_irqrestore(&uap->port.lock, flags);
 177  }
 178
 179 @@ -333,12 +332,12 @@ static int pl010_startup(struct uart_por
 180         /*
 181          * initialise the old status of the modem signals
 182          */
 183 -       uap->old_status = readb(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY;
 184 +       uap->old_status = __raw_readl(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY;
 185
 186         /*
 187          * Finally, enable interrupts
 188          */
 189 -       writel(UART01x_CR_UARTEN | UART010_CR_RIE | UART010_CR_RTIE,
 190 +       __raw_writel(UART01x_CR_UARTEN | UART010_CR_RIE | UART010_CR_RTIE,
 191                uap->port.membase + UART010_CR);
 192
 193         return 0;
 194 @@ -361,10 +360,10 @@ static void pl010_shutdown(struct uart_p
 195         /*
 196          * disable all interrupts, disable the port
 197          */
 198 -       writel(0, uap->port.membase + UART010_CR);
 199 +       __raw_writel(0, uap->port.membase + UART010_CR);
 200
 201         /* disable break condition and fifos */
 202 -       writel(readb(uap->port.membase + UART010_LCRH) &
 203 +       __raw_writel(__raw_readl(uap->port.membase + UART010_LCRH) &
 204                 ~(UART01x_LCRH_BRK | UART01x_LCRH_FEN),
 205                uap->port.membase + UART010_LCRH);
 206
 207 @@ -386,7 +385,7 @@ pl010_set_termios(struct uart_port *port
 208         /*
 209          * Ask the core to calculate the divisor for us.
 210          */
 211 -       baud = uart_get_baud_rate(port, termios, old, 0, uap->port.uartclk/16);
 212 +       baud = uart_get_baud_rate(port, termios, old, 0, uap->port.uartclk/16);
 213         quot = uart_get_divisor(port, baud);
 214
 215         switch (termios->c_cflag & CSIZE) {
 216 @@ -449,25 +448,25 @@ pl010_set_termios(struct uart_port *port
 217                 uap->port.ignore_status_mask |= UART_DUMMY_RSR_RX;
 218
 219         /* first, disable everything */
 220 -       old_cr = readb(uap->port.membase + UART010_CR) & ~UART010_CR_MSIE;
 221 +       old_cr = __raw_readl(uap->port.membase + UART010_CR) & ~UART010_CR_MSIE;
 222
 223         if (UART_ENABLE_MS(port, termios->c_cflag))
 224                 old_cr |= UART010_CR_MSIE;
 225
 226 -       writel(0, uap->port.membase + UART010_CR);
 227 +       __raw_writel(0, uap->port.membase + UART010_CR);
 228
 229         /* Set baud rate */
 230         quot -= 1;
 231 -       writel((quot & 0xf00) >> 8, uap->port.membase + UART010_LCRM);
 232 -       writel(quot & 0xff, uap->port.membase + UART010_LCRL);
 233 +       __raw_writel((quot & 0xf00) >> 8, uap->port.membase + UART010_LCRM);
 234 +       __raw_writel(quot & 0xff, uap->port.membase + UART010_LCRL);
 235
 236         /*
 237          * ----------v----------v----------v----------v-----
 238          * NOTE: MUST BE WRITTEN AFTER UARTLCR_M & UARTLCR_L
 239          * ----------^----------^----------^----------^-----
 240          */
 241 -       writel(lcr_h, uap->port.membase + UART010_LCRH);
 242 -       writel(old_cr, uap->port.membase + UART010_CR);
 243 +       __raw_writel(lcr_h, uap->port.membase + UART010_LCRH);
 244 +       __raw_writel(old_cr, uap->port.membase + UART010_CR);
 245
 246         spin_unlock_irqrestore(&uap->port.lock, flags);
 247  }
 248 @@ -549,7 +548,7 @@ static struct uart_ops amba_pl010_pops =
 249         .verify_port    = pl010_verify_port,
 250  };
 251
 252 -static struct uart_amba_port *amba_ports[UART_NR];
 253 +static struct uart_amba_port *amba_ports[SERIAL_AMBA_NR];
 254
 255  #ifdef CONFIG_SERIAL_AMBA_PL010_CONSOLE
 256
 257 @@ -559,10 +558,10 @@ static void pl010_console_putchar(struct
 258         unsigned int status;
 259
 260         do {
 261 -               status = readb(uap->port.membase + UART01x_FR);
 262 +               status = __raw_readl(uap->port.membase + UART01x_FR);
 263                 barrier();
 264         } while (!UART_TX_READY(status));
 265 -       writel(ch, uap->port.membase + UART01x_DR);
 266 +       __raw_writel(ch, uap->port.membase + UART01x_DR);
 267  }
 268
 269  static void
 270 @@ -576,8 +575,8 @@ pl010_console_write(struct console *co,
 271         /*
 272          *      First save the CR then disable the interrupts
 273          */
 274 -       old_cr = readb(uap->port.membase + UART010_CR);
 275 -       writel(UART01x_CR_UARTEN, uap->port.membase + UART010_CR);
 276 +       old_cr = __raw_readl(uap->port.membase + UART010_CR);
 277 +       __raw_writel(UART01x_CR_UARTEN, uap->port.membase + UART010_CR);
 278
 279         uart_console_write(&uap->port, s, count, pl010_console_putchar);
 280
 281 @@ -586,10 +585,10 @@ pl010_console_write(struct console *co,
 282          *      and restore the TCR
 283          */
 284         do {
 285 -               status = readb(uap->port.membase + UART01x_FR);
 286 +               status = __raw_readl(uap->port.membase + UART01x_FR);
 287                 barrier();
 288         } while (status & UART01x_FR_BUSY);
 289 -       writel(old_cr, uap->port.membase + UART010_CR);
 290 +       __raw_writel(old_cr, uap->port.membase + UART010_CR);
 291
 292         clk_disable(uap->clk);
 293  }
 294 @@ -598,9 +597,9 @@ static void __init
 295  pl010_console_get_options(struct uart_amba_port *uap, int *baud,
 296                              int *parity, int *bits)
 297  {
 298 -       if (readb(uap->port.membase + UART010_CR) & UART01x_CR_UARTEN) {
 299 +       if (__raw_readl(uap->port.membase + UART010_CR) & UART01x_CR_UARTEN) {
 300                 unsigned int lcr_h, quot;
 301 -               lcr_h = readb(uap->port.membase + UART010_LCRH);
 302 +               lcr_h = __raw_readl(uap->port.membase + UART010_LCRH);
 303
 304                 *parity = 'n';
 305                 if (lcr_h & UART01x_LCRH_PEN) {
 306 @@ -615,8 +614,8 @@ pl010_console_get_options(struct uart_am
 307                 else
 308                         *bits = 8;
 309
 310 -               quot = readb(uap->port.membase + UART010_LCRL) |
 311 -                      readb(uap->port.membase + UART010_LCRM) << 8;
 312 +               quot = __raw_readl(uap->port.membase + UART010_LCRL) |
 313 +                      __raw_readl(uap->port.membase + UART010_LCRM) << 8;
 314                 *baud = uap->port.uartclk / (16 * (quot + 1));
 315         }
 316  }
 317 @@ -634,7 +633,7 @@ static int __init pl010_console_setup(st
 318          * if so, search for the first available port that does have
 319          * console support.
 320          */
 321 -       if (co->index >= UART_NR)
 322 +       if (co->index >= SERIAL_AMBA_NR)
 323                 co->index = 0;
 324         uap = amba_ports[co->index];
 325         if (!uap)
 326 @@ -652,7 +651,7 @@ static int __init pl010_console_setup(st
 327
 328  static struct uart_driver amba_reg;
 329  static struct console amba_console = {
 330 -       .name           = "ttyAM",
 331 +       .name           = SERIAL_AMBA_NAME,
 332         .write          = pl010_console_write,
 333         .device         = uart_console_device,
 334         .setup          = pl010_console_setup,
 335 @@ -668,11 +667,11 @@ static struct console amba_console = {
 336
 337  static struct uart_driver amba_reg = {
 338         .owner                  = THIS_MODULE,
 339 -       .driver_name            = "ttyAM",
 340 -       .dev_name               = "ttyAM",
 341 +       .driver_name            = SERIAL_AMBA_NAME,
 342 +       .dev_name               = SERIAL_AMBA_NAME,
 343         .major                  = SERIAL_AMBA_MAJOR,
 344         .minor                  = SERIAL_AMBA_MINOR,
 345 -       .nr                     = UART_NR,
 346 +       .nr                     = SERIAL_AMBA_NR,
 347         .cons                   = AMBA_CONSOLE,
 348  };
 349
 350 --- a/drivers/serial/Kconfig
 351 +++ b/drivers/serial/Kconfig
 352 @@ -276,10 +276,25 @@ config SERIAL_AMBA_PL010
 353         help
 354           This selects the ARM(R) AMBA(R) PrimeCell PL010 UART.  If you have
 355           an Integrator/AP or Integrator/PP2 platform, or if you have a
 356 -         Cirrus Logic EP93xx CPU, say Y or M here.
 357 +         Cirrus Logic EP93xx CPU or an Infineon ADM5120 SOC, say Y or M here.
 358
 359           If unsure, say N.
 360
 361 +config SERIAL_AMBA_PL010_NUMPORTS
 362 +       int "Maximum number of AMBA PL010 serial ports"
 363 +       depends on SERIAL_AMBA_PL010
 364 +       default "8"
 365 +       ---help---
 366 +         Set this to the number of serial ports you want the AMBA PL010 driver
 367 +         to support.
 368 +
 369 +config SERIAL_AMBA_PL010_PORTNAME
 370 +       string "Name of the AMBA PL010 serial ports"
 371 +       depends on SERIAL_AMBA_PL010
 372 +       default "ttyAM"
 373 +       ---help---
 374 +         ::: To be written :::
 375 +
 376  config SERIAL_AMBA_PL010_CONSOLE
 377         bool "Support for console on AMBA serial port"
 378         depends on SERIAL_AMBA_PL010=y