target/linux/ar71xx/patches-3.2/102-MIPS-ath79-separate-common-PCI-code.patch

   1 From c98b48027516a2e71688a5957e4e0120f4aa8c61 Mon Sep 17 00:00:00 2001
   2 From: Gabor Juhos <juhosg@openwrt.org>
   3 Date: Fri, 18 Nov 2011 09:47:44 +0100
   4 Subject: [PATCH 02/35] MIPS: ath79: separate common PCI code
   5 MIME-Version: 1.0
   6 Content-Type: text/plain; charset=UTF-8
   7 Content-Transfer-Encoding: 8bit
   8
   9 The 'pcibios_map_irq' and 'pcibios_plat_dev_init'
  10 are common functions and only instance one of them
  11 can be present in a single kernel.
  12
  13 Currently these functions can be built only if the
  14 CONFIG_SOC_AR724X option is selected. However the
  15 ath79 platform contain support for the AR71XX SoCs,.
  16 The AR71XX SoCs have a differnet PCI controller,
  17 and those will require a different code.
  18
  19 Move the common PCI code into a separeate file in
  20 order to be able to use that with other SoCs as
  21 well.
  22
  23 Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
  24 Acked-by: René Bolldorf <xsecute@googlemail.com>
  25
  26 v4: - add an Acked-by tag from René
  27 v3: - no changes
  28 v2: - no changes
  29 ---
  30  arch/mips/ath79/Makefile    |    1 +
  31  arch/mips/ath79/pci.c       |   46 +++++++++++++++++++++++++++++++++++++++++++
  32  arch/mips/pci/pci-ath724x.c |   34 -------------------------------
  33  3 files changed, 47 insertions(+), 34 deletions(-)
  34  create mode 100644 arch/mips/ath79/pci.c
  35
  36 --- a/arch/mips/ath79/Makefile
  37 +++ b/arch/mips/ath79/Makefile
  38 @@ -11,6 +11,7 @@
  39  obj-y  := prom.o setup.o irq.o common.o clock.o gpio.o
  40
  41  obj-$(CONFIG_EARLY_PRINTK)             += early_printk.o
  42 +obj-$(CONFIG_PCI)                      += pci.o
  43
  44  #
  45  # Devices
  46 --- /dev/null
  47 +++ b/arch/mips/ath79/pci.c
  48 @@ -0,0 +1,46 @@
  49 +/*
  50 + *  Atheros AR71XX/AR724X specific PCI setup code
  51 + *
  52 + *  Copyright (C) 2011 René Bolldorf <xsecute@googlemail.com>
  53 + *
  54 + *  This program is free software; you can redistribute it and/or modify it
  55 + *  under the terms of the GNU General Public License version 2 as published
  56 + *  by the Free Software Foundation.
  57 + */
  58 +
  59 +#include <linux/pci.h>
  60 +#include <asm/mach-ath79/pci-ath724x.h>
  61 +
  62 +static struct ath724x_pci_data *pci_data;
  63 +static int pci_data_size;
  64 +
  65 +void ath724x_pci_add_data(struct ath724x_pci_data *data, int size)
  66 +{
  67 +       pci_data        = data;
  68 +       pci_data_size   = size;
  69 +}
  70 +
  71 +int __init pcibios_map_irq(const struct pci_dev *dev, uint8_t slot, uint8_t pin)
  72 +{
  73 +       unsigned int devfn = dev->devfn;
  74 +       int irq = -1;
  75 +
  76 +       if (devfn > pci_data_size - 1)
  77 +               return irq;
  78 +
  79 +       irq = pci_data[devfn].irq;
  80 +
  81 +       return irq;
  82 +}
  83 +
  84 +int pcibios_plat_dev_init(struct pci_dev *dev)
  85 +{
  86 +       unsigned int devfn = dev->devfn;
  87 +
  88 +       if (devfn > pci_data_size - 1)
  89 +               return PCIBIOS_DEVICE_NOT_FOUND;
  90 +
  91 +       dev->dev.platform_data = pci_data[devfn].pdata;
  92 +
  93 +       return PCIBIOS_SUCCESSFUL;
  94 +}
  95 --- a/arch/mips/pci/pci-ath724x.c
  96 +++ b/arch/mips/pci/pci-ath724x.c
  97 @@ -9,7 +9,6 @@
  98   */
  99
 100  #include <linux/pci.h>
 101 -#include <asm/mach-ath79/pci-ath724x.h>
 102
 103  #define reg_read(_phys)                (*(unsigned int *) KSEG1ADDR(_phys))
 104  #define reg_write(_phys, _val) ((*(unsigned int *) KSEG1ADDR(_phys)) = (_val))
 105 @@ -19,8 +18,6 @@
 106  #define ATH724X_PCI_MEM_SIZE   0x08000000
 107
 108  static DEFINE_SPINLOCK(ath724x_pci_lock);
 109 -static struct ath724x_pci_data *pci_data;
 110 -static int pci_data_size;
 111
 112  static int ath724x_pci_read(struct pci_bus *bus, unsigned int devfn, int where,
 113                             int size, uint32_t *value)
 114 @@ -133,37 +130,6 @@ static struct pci_controller ath724x_pci
 115         .mem_resource   = &ath724x_mem_resource,
 116  };
 117
 118 -void ath724x_pci_add_data(struct ath724x_pci_data *data, int size)
 119 -{
 120 -       pci_data        = data;
 121 -       pci_data_size   = size;
 122 -}
 123 -
 124 -int __init pcibios_map_irq(const struct pci_dev *dev, uint8_t slot, uint8_t pin)
 125 -{
 126 -       unsigned int devfn = dev->devfn;
 127 -       int irq = -1;
 128 -
 129 -       if (devfn > pci_data_size - 1)
 130 -               return irq;
 131 -
 132 -       irq = pci_data[devfn].irq;
 133 -
 134 -       return irq;
 135 -}
 136 -
 137 -int pcibios_plat_dev_init(struct pci_dev *dev)
 138 -{
 139 -       unsigned int devfn = dev->devfn;
 140 -
 141 -       if (devfn > pci_data_size - 1)
 142 -               return PCIBIOS_DEVICE_NOT_FOUND;
 143 -
 144 -       dev->dev.platform_data = pci_data[devfn].pdata;
 145 -
 146 -       return PCIBIOS_SUCCESSFUL;
 147 -}
 148 -
 149  static int __init ath724x_pcibios_init(void)
 150  {
 151         register_pci_controller(&ath724x_pci_controller);