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[openwrt.git] / target / linux / ar71xx / patches-3.2 / 121-MIPS-ath79-add-early_printk-support-for-AR934X.patch
1 From f60aed87f838ecfa4033ff1f63f97d05359b3b51 Mon Sep 17 00:00:00 2001
2 From: Gabor Juhos <juhosg@openwrt.org>
3 Date: Sun, 11 Dec 2011 17:36:08 +0100
4 Subject: [PATCH 21/35] MIPS: ath79: add early_printk support for AR934X
5
6 The patch allows to see kernel messages on AR934X SoCs in
7 early boot stage.
8
9 Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
10 Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
11 ---
12 arch/mips/ath79/early_printk.c | 3 +++
13 arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 6 +++++-
14 2 files changed, 8 insertions(+), 1 deletions(-)
15
16 --- a/arch/mips/ath79/early_printk.c
17 +++ b/arch/mips/ath79/early_printk.c
18 @@ -71,6 +71,9 @@ static void prom_putchar_init(void)
19 case REV_ID_MAJOR_AR7241:
20 case REV_ID_MAJOR_AR7242:
21 case REV_ID_MAJOR_AR913X:
22 + case REV_ID_MAJOR_AR9341:
23 + case REV_ID_MAJOR_AR9342:
24 + case REV_ID_MAJOR_AR9344:
25 _prom_putchar = prom_putchar_ar71xx;
26 break;
27
28 --- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
29 +++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
30 @@ -1,10 +1,11 @@
31 /*
32 * Atheros AR71XX/AR724X/AR913X SoC register definitions
33 *
34 + * Copyright (C) 2010-2011 Jaiganesh Narayanan <jnarayanan@atheros.com>
35 * Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
36 * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
37 *
38 - * Parts of this file are based on Atheros' 2.6.15 BSP
39 + * Parts of this file are based on Atheros' 2.6.15/2.6.31 BSP
40 *
41 * This program is free software; you can redistribute it and/or modify it
42 * under the terms of the GNU General Public License version 2 as published
43 @@ -249,6 +250,9 @@
44 #define REV_ID_MAJOR_AR7242 0x1100
45 #define REV_ID_MAJOR_AR9330 0x0110
46 #define REV_ID_MAJOR_AR9331 0x1110
47 +#define REV_ID_MAJOR_AR9341 0x0120
48 +#define REV_ID_MAJOR_AR9342 0x1120
49 +#define REV_ID_MAJOR_AR9344 0x2120
50
51 #define AR71XX_REV_ID_MINOR_MASK 0x3
52 #define AR71XX_REV_ID_MINOR_AR7130 0x0
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