1 --- a/arch/mips/Kconfig
2 +++ b/arch/mips/Kconfig
3 @@ -111,7 +111,7 @@ config ATHEROS_AR231X
4 select SYS_HAS_CPU_MIPS32_R1
5 select SYS_SUPPORTS_BIG_ENDIAN
6 select SYS_SUPPORTS_32BIT_KERNEL
8 + select ARCH_REQUIRE_GPIOLIB
9 select SYS_HAS_EARLY_PRINTK
11 Support for AR231x and AR531x based boards
12 --- a/arch/mips/ar231x/Kconfig
13 +++ b/arch/mips/ar231x/Kconfig
14 @@ -13,7 +13,6 @@ config ATHEROS_AR2315
15 select SYS_HAS_CPU_MIPS32_R1
16 select SYS_SUPPORTS_32BIT_KERNEL
17 select SYS_SUPPORTS_BIG_ENDIAN
21 config ATHEROS_AR2315_PCI
22 --- a/arch/mips/ar231x/ar2315.c
23 +++ b/arch/mips/ar231x/ar2315.c
25 #include <linux/reboot.h>
26 #include <linux/delay.h>
27 #include <linux/leds.h>
28 +#include <linux/gpio.h>
29 #include <asm/bootinfo.h>
30 #include <asm/reboot.h>
34 -#include <asm/gpio.h>
36 #include <ar231x_platform.h>
37 #include <ar2315_regs.h>
38 @@ -312,17 +312,6 @@ ar2315_irq_init(void)
39 setup_irq(AR2315_IRQ_MISC_INTRS, &cascade);
42 -const struct ar231x_gpiodev ar2315_gpiodev;
45 -ar2315_gpio_get_output(void)
48 - reg = ar231x_read_reg(AR2315_GPIO_CR);
49 - reg &= ar2315_gpiodev.valid_mask;
54 ar2315_gpio_set_output(u32 mask, u32 val)
56 @@ -336,11 +325,11 @@ ar2315_gpio_set_output(u32 mask, u32 val
60 -ar2315_gpio_get(void)
61 +ar2315_gpio_get(u32 valid_mask)
64 reg = ar231x_read_reg(AR2315_GPIO_DI);
65 - reg &= ar2315_gpiodev.valid_mask;
70 @@ -355,14 +344,75 @@ ar2315_gpio_set(u32 mask, u32 value)
74 -const struct ar231x_gpiodev ar2315_gpiodev = {
76 + * gpiolib implementation. Original legacy mask based methods
77 + * preserved for now.
80 +ar2315_gpio_get_value(struct gpio_chip *chip, unsigned gpio)
82 + struct ar231x_gpio_chip *gpch =
83 + container_of(chip, struct ar231x_gpio_chip, chip);
84 + u32 mask = 1 << gpio;
86 + if (!(gpch->valid_mask & mask))
88 + rett = ar2315_gpio_get(gpch->valid_mask); // legacy code
89 + return !!(rett & mask);
93 +ar2315_gpio_set_value(struct gpio_chip *chip, unsigned gpio, int value)
95 + struct ar231x_gpio_chip *gpch =
96 + container_of(chip, struct ar231x_gpio_chip, chip);
97 + u32 mask = 1 << gpio;
98 + if (!(gpch->valid_mask & mask))
100 + ar2315_gpio_set(mask, (!!value) * mask); // legacy
104 +ar2315_gpio_direction_input(struct gpio_chip *chip, unsigned gpio)
106 + struct ar231x_gpio_chip *gpch =
107 + container_of(chip, struct ar231x_gpio_chip, chip);
108 + u32 mask = 1 << gpio;
109 + if (!(gpch->valid_mask & mask))
111 + ar2315_gpio_set_output(mask, 0); // legacy
116 +ar2315_gpio_direction_output(struct gpio_chip *chip, unsigned gpio, int value)
118 + struct ar231x_gpio_chip *gpch =
119 + container_of(chip, struct ar231x_gpio_chip, chip);
120 + u32 mask = 1 << gpio;
121 + if (!(gpch->valid_mask & mask))
123 + ar2315_gpio_set_output(mask, mask); // both legacy
124 + ar2315_gpio_set(mask, (!!value) * mask);
128 +static struct ar231x_gpio_chip ar2315_gpio_chip = {
129 .valid_mask = (1 << 22) - 1,
130 - .get_output = ar2315_gpio_get_output,
131 - .set_output = ar2315_gpio_set_output,
132 - .get = ar2315_gpio_get,
133 - .set = ar2315_gpio_set,
135 + .label = "ar2315-gpio",
136 + .direction_input = ar2315_gpio_direction_input,
137 + .direction_output = ar2315_gpio_direction_output,
138 + .set = ar2315_gpio_set_value,
139 + .get = ar2315_gpio_get_value,
141 + .ngpio = AR531X_GPIO_IRQ_COUNT, // 22
148 static struct ar231x_eth ar2315_eth_data = {
149 .reset_base = AR2315_RESET,
150 .reset_mac = AR2315_RESET_ENET0,
151 @@ -496,7 +546,7 @@ static struct platform_device ar2315_gpi
155 -ar2315_init_gpio(void)
156 +ar2315_init_gpio_leds(void)
158 static char led_names[6][6];
160 @@ -522,7 +572,7 @@ ar2315_init_gpio(void)
161 platform_device_register(&ar2315_gpio_leds);
164 -static inline void ar2315_init_gpio(void)
165 +static inline void ar2315_init_gpio_leds(void)
169 @@ -537,7 +587,7 @@ ar2315_init_devices(void)
170 ar231x_find_config(ar2315_flash_limit());
171 ar2315_eth_data.macaddr = ar231x_board.config->enet0_mac;
173 - ar2315_init_gpio();
174 + ar2315_init_gpio_leds();
175 platform_device_register(&ar2315_wdt);
176 platform_device_register(&ar2315_spiflash);
177 ar231x_add_ethernet(0, KSEG1ADDR(AR2315_ENET0), AR2315_IRQ_ENET0_INTRS,
178 @@ -633,6 +683,25 @@ ar2315_time_init(void)
179 mips_hpt_frequency = ar2315_cpu_frequency() / 2;
183 +ar2315_gpio_init(void)
186 + struct ar231x_gpio_chip *gpch;
187 + gpch = &ar2315_gpio_chip;
188 + ret = gpiochip_add(&gpch->chip);
190 + printk(KERN_ERR "%s: failed to add gpiochip\n",
194 + printk(KERN_INFO "%s: registered %d GPIOs\n",
195 + gpch->chip.label, gpch->chip.ngpio);
202 ar2315_prom_init(void)
204 @@ -659,7 +728,7 @@ ar2315_prom_init(void)
205 ar231x_devtype = DEV_TYPE_AR2315;
208 - ar231x_gpiodev = &ar2315_gpiodev;
209 + ar2315_gpio_init();
210 ar231x_board.devid = devid;
213 --- a/arch/mips/ar231x/ar5312.c
214 +++ b/arch/mips/ar231x/ar5312.c
216 #include <linux/kernel.h>
217 #include <linux/reboot.h>
218 #include <linux/leds.h>
219 +#include <linux/gpio.h>
220 #include <asm/bootinfo.h>
221 #include <asm/reboot.h>
222 #include <asm/time.h>
227 #include <ar231x_platform.h>
228 #include <ar5312_regs.h>
229 @@ -160,17 +160,6 @@ void __init ar5312_irq_init(void)
230 setup_irq(AR5312_IRQ_MISC_INTRS, &cascade);
233 -const struct ar231x_gpiodev ar5312_gpiodev;
236 -ar5312_gpio_get_output(void)
239 - reg = ~(ar231x_read_reg(AR531X_GPIO_CR));
240 - reg &= ar5312_gpiodev.valid_mask;
245 ar5312_gpio_set_output(u32 mask, u32 val)
247 @@ -184,11 +173,11 @@ ar5312_gpio_set_output(u32 mask, u32 val
251 -ar5312_gpio_get(void)
252 +ar5312_gpio_get(u32 valid_mask)
255 reg = ar231x_read_reg(AR531X_GPIO_DI);
256 - reg &= ar5312_gpiodev.valid_mask;
261 @@ -203,14 +192,72 @@ ar5312_gpio_set(u32 mask, u32 value)
265 -const struct ar231x_gpiodev ar5312_gpiodev = {
266 - .valid_mask = (1 << 8) - 1,
267 - .get_output = ar5312_gpio_get_output,
268 - .set_output = ar5312_gpio_set_output,
269 - .get = ar5312_gpio_get,
270 - .set = ar5312_gpio_set,
272 + * gpiolib implementations. Original mask based methods preserved
275 +ar5312_gpio_get_value(struct gpio_chip *chip, unsigned gpio)
277 + struct ar231x_gpio_chip *gpch =
278 + container_of(chip, struct ar231x_gpio_chip, chip);
279 + u32 mask = 1 << gpio;
281 + if (!(gpch->valid_mask & mask))
283 + rett = ar5312_gpio_get(gpch->valid_mask);
284 + return !!(rett & mask);
288 +ar5312_gpio_set_value(struct gpio_chip *chip, unsigned gpio, int value)
290 + struct ar231x_gpio_chip *gpch =
291 + container_of(chip, struct ar231x_gpio_chip, chip);
292 + u32 mask = 1 << gpio;
293 + if (!(gpch->valid_mask & mask))
295 + ar5312_gpio_set(mask, (!!value) * mask);
299 +ar5312_gpio_direction_input(struct gpio_chip *chip, unsigned gpio)
301 + struct ar231x_gpio_chip *gpch =
302 + container_of(chip, struct ar231x_gpio_chip, chip);
303 + u32 mask = 1 << gpio;
304 + if (!(gpch->valid_mask & mask))
306 + ar5312_gpio_set_output(mask, 0);
310 +ar5312_gpio_direction_output(struct gpio_chip *chip, unsigned gpio, int value)
312 + struct ar231x_gpio_chip *gpch =
313 + container_of(chip, struct ar231x_gpio_chip, chip);
314 + u32 mask = 1 << gpio;
315 + if (!(gpch->valid_mask & mask))
317 + ar5312_gpio_set_output(mask, mask);
318 + ar5312_gpio_set(mask, (!!value) * mask);
322 +static struct ar231x_gpio_chip ar5312_gpio_chip = {
323 + .valid_mask = (1 << 22) - 1,
325 + .label = "ar5312-gpio",
326 + .direction_input = ar5312_gpio_direction_input,
327 + .direction_output = ar5312_gpio_direction_output,
328 + .set = ar5312_gpio_set_value,
329 + .get = ar5312_gpio_get_value,
331 + .ngpio = AR531X_GPIO_IRQ_COUNT, // 22
337 static struct physmap_flash_data ar5312_flash_data = {
340 @@ -486,6 +533,22 @@ ar5312_time_init(void)
341 mips_hpt_frequency = ar5312_cpu_frequency() / 2;
345 +ar5312_gpio_init(void)
348 + struct ar231x_gpio_chip *gpch;
349 + gpch = &ar5312_gpio_chip;
350 + ret = gpiochip_add(&gpch->chip);
352 + printk(KERN_ERR "%s: failed to add gpiochip\n",
356 + printk(KERN_INFO "%s: registered %d GPIOs\n",
357 + gpch->chip.label, gpch->chip.ngpio);
362 ar5312_prom_init(void)
363 @@ -509,7 +572,7 @@ ar5312_prom_init(void)
364 devid >>= AR531X_REV_WMAC_MIN_S;
365 devid &= AR531X_REV_CHIP;
366 ar231x_board.devid = (u16) devid;
367 - ar231x_gpiodev = &ar5312_gpiodev;
368 + ar5312_gpio_init();
372 --- a/arch/mips/ar231x/devices.c
373 +++ b/arch/mips/ar231x/devices.c
376 struct ar231x_board_config ar231x_board;
377 int ar231x_devtype = DEV_TYPE_UNKNOWN;
378 -const struct ar231x_gpiodev *ar231x_gpiodev;
379 -EXPORT_SYMBOL(ar231x_gpiodev);
381 static struct resource ar231x_eth0_res[] = {
383 --- a/arch/mips/ar231x/devices.h
384 +++ b/arch/mips/ar231x/devices.h
386 #ifndef __AR231X_DEVICES_H
387 #define __AR231X_DEVICES_H
388 +#include <linux/gpio.h>
391 /* handled by ar5312.c */
392 @@ -34,4 +35,8 @@ static inline bool is_5312(void)
396 +struct ar231x_gpio_chip {
398 + struct gpio_chip chip;
401 --- a/arch/mips/ar231x/reset.c
402 +++ b/arch/mips/ar231x/reset.c
404 #include <linux/workqueue.h>
405 #include <linux/skbuff.h>
406 #include <linux/netlink.h>
407 +#include <linux/gpio.h>
408 #include <net/sock.h>
409 #include <asm/uaccess.h>
410 #include <ar231x_platform.h>
415 #define AR531X_RESET_GPIO_IRQ (AR531X_GPIO_IRQ(ar231x_board.config->resetConfigGpio))
416 @@ -85,13 +85,12 @@ static void
417 reset_button_poll(unsigned long unused)
419 struct event_t *event;
423 if(!no_release_workaround)
426 - gpio = ar231x_gpiodev->get();
427 - gpio &= (1 << (AR531X_RESET_GPIO_IRQ - AR531X_GPIO_IRQ_BASE));
428 + gpio = gpio_get_value(AR531X_RESET_GPIO_IRQ - AR531X_GPIO_IRQ_BASE);
430 rst_button_timer.expires = jiffies + (HZ / 4);
431 add_timer(&rst_button_timer);
432 @@ -113,7 +112,7 @@ button_handler(int irq, void *dev_id)
434 static int pressed = 0;
435 struct event_t *event;
439 event = (struct event_t *) kzalloc(sizeof(struct event_t), GFP_ATOMIC);
441 @@ -121,7 +120,7 @@ button_handler(int irq, void *dev_id)
445 - gpio = ar231x_gpiodev->get() & (1 << (irq - AR531X_GPIO_IRQ_BASE));
446 + gpio = gpio_get_value(irq - AR531X_GPIO_IRQ_BASE);
450 --- a/arch/mips/include/asm/mach-ar231x/gpio.h
451 +++ b/arch/mips/include/asm/mach-ar231x/gpio.h
456 -struct ar231x_gpiodev {
458 - u32 (*get_output)(void);
459 - u32 (*set_output)(u32 mask, u32 val);
461 - u32 (*set)(u32 mask, u32 val);
464 -extern const struct ar231x_gpiodev *ar231x_gpiodev;
465 +#define gpio_get_value __gpio_get_value
466 +#define gpio_set_value __gpio_set_value
467 +#define gpio_cansleep __gpio_cansleep
470 * Wrappers for the generic GPIO layer
473 -static inline int gpio_direction_input(unsigned gpio) {
474 - u32 mask = 1 << gpio;
476 - if (!(ar231x_gpiodev->valid_mask & mask))
479 - ar231x_gpiodev->set_output(mask, 0);
483 -static inline void gpio_set_value(unsigned gpio, int value) {
484 - u32 mask = 1 << gpio;
486 - if (!(ar231x_gpiodev->valid_mask & mask))
489 - ar231x_gpiodev->set(mask, (!!value) * mask);
492 -static inline int gpio_direction_output(unsigned gpio, int value) {
493 - u32 mask = 1 << gpio;
495 - if (!(ar231x_gpiodev->valid_mask & mask))
498 - ar231x_gpiodev->set_output(mask, mask);
499 - ar231x_gpiodev->set(mask, (!!value) * mask);
503 -/* Reads the gpio pin. Unchecked function */
504 -static inline int gpio_get_value(unsigned gpio) {
505 - u32 mask = 1 << gpio;
507 - if (!(ar231x_gpiodev->valid_mask & mask))
510 - return !!(ar231x_gpiodev->get() & mask);
513 -static inline int gpio_request(unsigned gpio, const char *label) {
517 -static inline void gpio_free(unsigned gpio) {
519 +/* not sure if these are used? */
521 /* Returns IRQ to attach for gpio. Unchecked function */
522 static inline int gpio_to_irq(unsigned gpio) {
523 @@ -74,11 +23,6 @@ static inline int irq_to_gpio(unsigned i
524 return (irq - (AR531X_GPIO_IRQ(0)));
527 -static inline int gpio_set_debounce(unsigned gpio, unsigned debounce)
532 #include <asm-generic/gpio.h> /* cansleep wrappers */