package/ifx-vmmc/patches-2.6.33/100-ifxmips.patch

   1 --- a/src/drv_vmmc_access.h
   2 +++ b/src/drv_vmmc_access.h
   3 @@ -24,6 +24,10 @@
   4  #include "drv_mps_vmmc.h"
   5  #endif
   6
   7 +#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,28))
   8 +#  define IFX_MPS IFXMIPS_MPS_BASE_ADDR
   9 +#endif
  10 +
  11  /* ============================= */
  12  /* Global Defines                */
  13  /* ============================= */
  14 --- a/src/drv_vmmc_bbd.c
  15 +++ b/src/drv_vmmc_bbd.c
  16 @@ -939,7 +939,11 @@ static IFX_int32_t vmmc_BBD_DownloadChCr
  17     IFX_uint8_t  padBytes = 0;
  18  #endif
  19     IFX_uint16_t cram_offset, cram_crc,
  20 -                pCmd [MAX_CMD_WORD]  = {0};
  21 +                pCmd [MAX_CMD_WORD]
  22 +#if defined (__GNUC__) || defined (__GNUG__)
  23 +                   __attribute__ ((aligned(4)))
  24 +#endif
  25 +                   = {0};
  26
  27     /* read offset */
  28     cpb2w (&cram_offset, &bbd_cram->pData[0], sizeof (IFX_uint16_t));
  29 --- a/src/drv_vmmc_danube.h
  30 +++ b/src/drv_vmmc_danube.h
  31 @@ -15,12 +15,59 @@
  32  */
  33
  34  #if defined SYSTEM_DANUBE
  35 -#include <asm/ifx/ifx_gpio.h>
  36 +#  if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,28))
  37 +#     include <asm/mach-ifxmips/ifxmips_gpio.h>
  38 +
  39 +#     define IFX_GPIO_PIN_NUMBER_PER_PORT    16
  40 +#     define IFX_GPIO_PIN_ID(port, pin)      ((port) \
  41 +                                             * IFX_GPIO_PIN_NUMBER_PER_PORT \
  42 +                                             + (pin))
  43 +#     define IFX_GPIO_PIN_ID_TO_PORT(pin_id) (pin_id >> 4)
  44 +#     define IFX_GPIO_PIN_ID_TO_PIN(pin_id)  (pin_id & 0x0F)
  45 +
  46 +#     define IFX_GPIO_MODULE_TAPI_VMMC       0 /* not used */
  47 +
  48 +#     define ifx_gpio_pin_reserve(a,b)       0 /* obsolete */
  49 +
  50 +#     define ifx_gpio_open_drain_set(a,b)    ifxmips_port_set_open_drain( \
  51 +                                                IFX_GPIO_PIN_ID_TO_PORT(a), \
  52 +                                                IFX_GPIO_PIN_ID_TO_PIN(a))
  53 +
  54 +#     define ifx_gpio_altsel0_set(a,b)       ifxmips_port_set_altsel0( \
  55 +                                                IFX_GPIO_PIN_ID_TO_PORT(a), \
  56 +                                                IFX_GPIO_PIN_ID_TO_PIN(a))
  57 +
  58 +#     define ifx_gpio_altsel1_set(a,b)       ifxmips_port_set_altsel1( \
  59 +                                                IFX_GPIO_PIN_ID_TO_PORT(a), \
  60 +                                                IFX_GPIO_PIN_ID_TO_PIN(a))
  61 +
  62 +#     define ifx_gpio_altsel0_clear(a,b)     ifxmips_port_clear_altsel0( \
  63 +                                                IFX_GPIO_PIN_ID_TO_PORT(a), \
  64 +                                                IFX_GPIO_PIN_ID_TO_PIN(a))
  65 +
  66 +#     define ifx_gpio_altsel1_clear(a,b)     ifxmips_port_clear_altsel1( \
  67 +                                                IFX_GPIO_PIN_ID_TO_PORT(a), \
  68 +                                                IFX_GPIO_PIN_ID_TO_PIN(a))
  69 +
  70 +#     define ifx_gpio_dir_in_set(a,b)        ifxmips_port_set_dir_in( \
  71 +                                                IFX_GPIO_PIN_ID_TO_PORT(a), \
  72 +                                                IFX_GPIO_PIN_ID_TO_PIN(a))
  73 +
  74 +#     define ifx_gpio_dir_out_set(a,b)       ifxmips_port_set_dir_out( \
  75 +                                                IFX_GPIO_PIN_ID_TO_PORT(a), \
  76 +                                                IFX_GPIO_PIN_ID_TO_PIN(a))
  77 +
  78 +#     define ifx_gpio_pin_free(a,b)          ifxmips_port_free_pin( \
  79 +                                                IFX_GPIO_PIN_ID_TO_PORT(a), \
  80 +                                                IFX_GPIO_PIN_ID_TO_PIN(a))
  81 +#  else
  82 +#     include <asm/ifx/ifx_gpio.h>
  83 +#  endif
  84  #else
  85  #error no system selected
  86  #endif
  87
  88 -#define VMMC_TAPI_GPIO_MODULE_ID                        IFX_GPIO_MODULE_TAPI_VMMC
  89 +#define VMMC_TAPI_GPIO_MODULE_ID             IFX_GPIO_MODULE_TAPI_VMMC
  90  /**
  91
  92  */
  93 --- a/src/drv_vmmc_init.c
  94 +++ b/src/drv_vmmc_init.c
  95 @@ -48,6 +48,14 @@
  96  #include "drv_vmmc_pmc.h"
  97  #endif /* PMC_SUPPORTED */
  98
  99 +#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,28))
 100 +#  define IFX_MPS_CAD0SR IFXMIPS_MPS_CAD0SR
 101 +#  define IFX_MPS_CAD1SR IFXMIPS_MPS_CAD1SR
 102 +#  define IFX_MPS_CVC0SR IFXMIPS_MPS_CVC0SR
 103 +#  define IFX_MPS_CVC1SR IFXMIPS_MPS_CVC1SR
 104 +#  define IFX_MPS_CVC2SR IFXMIPS_MPS_CVC2SR
 105 +#  define IFX_MPS_CVC3SR IFXMIPS_MPS_CVC3SR
 106 +#endif
 107
 108  /* ============================= */
 109  /* Local Macros & Definitions    */
 110 --- a/src/drv_vmmc_init_cap.c
 111 +++ b/src/drv_vmmc_init_cap.c
 112 @@ -22,6 +22,11 @@
 113  #include "drv_mps_vmmc.h"
 114  #include "drv_mps_vmmc_device.h"
 115
 116 +#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,28))
 117 +#  define IFX_MPS_CHIPID_VERSION_GET   IFXMIPS_MPS_CHIPID_VERSION_GET
 118 +#  define IFX_MPS_CHIPID               IFXMIPS_MPS_CHIPID
 119 +#endif
 120 +
 121  /* ============================= */
 122  /* Configuration defintions      */
 123  /* ============================= */
 124 --- a/src/mps/drv_mps_vmmc_common.c
 125 +++ b/src/mps/drv_mps_vmmc_common.c
 126 @@ -35,8 +35,35 @@
 127  #include "ifxos_interrupt.h"
 128  #include "ifxos_time.h"
 129
 130 -#include <asm/ifx/ifx_regs.h>
 131 -#include <asm/ifx/ifx_gptu.h>
 132 +#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,28))
 133 +#  include <asm/mach-ifxmips/ifxmips.h>
 134 +#  include <asm/mach-ifxmips/ifxmips_irq.h>
 135 +#  include <asm/mach-ifxmips/ifxmips_gptu.h>
 136 +
 137 +#  define ifx_gptu_timer_request    ifxmips_request_timer
 138 +#  define ifx_gptu_timer_start      ifxmips_start_timer
 139 +#  define ifx_gptu_countvalue_get   ifxmips_get_count_value
 140 +#  define ifx_gptu_timer_free       ifxmips_free_timer
 141 +
 142 +#  define IFX_MPS_SRAM              IFXMIPS_MPS_SRAM
 143 +#  define IFX_MPS_AD0ENR            IFXMIPS_MPS_AD0ENR
 144 +#  define IFX_MPS_AD1ENR            IFXMIPS_MPS_AD1ENR
 145 +#  define IFX_MPS_VC0ENR            IFXMIPS_MPS_VC0ENR
 146 +#  define IFX_MPS_SAD0SR            IFXMIPS_MPS_SAD0SR
 147 +#  define IFX_MPS_RAD0SR            IFXMIPS_MPS_RAD0SR
 148 +#  define IFX_MPS_RAD1SR            IFXMIPS_MPS_RAD1SR
 149 +#  define IFX_MPS_CAD0SR            IFXMIPS_MPS_CAD0SR
 150 +#  define IFX_MPS_CAD1SR            IFXMIPS_MPS_CAD1SR
 151 +#  define IFX_MPS_RVC0SR            IFXMIPS_MPS_RVC0SR
 152 +#  define IFX_MPS_CVC0SR            IFXMIPS_MPS_CVC0SR
 153 +
 154 +#  define INT_NUM_IM4_IRL14         (INT_NUM_IM4_IRL0 + 14)
 155 +
 156 +#  define bsp_mask_and_ack_irq      ifxmips_mask_and_ack_irq
 157 +#else
 158 +#  include <asm/ifx/ifx_regs.h>
 159 +#  include <asm/ifx/ifx_gptu.h>
 160 +#endif
 161
 162  #include "drv_mps_vmmc.h"
 163  #include "drv_mps_vmmc_dbg.h"
 164 @@ -193,7 +220,8 @@ IFX_boolean_t ifx_mps_ext_bufman ()
 165   */
 166  IFX_void_t *ifx_mps_fastbuf_malloc (IFX_size_t size, IFX_int32_t priority)
 167  {
 168 -   IFX_uint32_t ptr, flags;
 169 +   unsigned long flags;
 170 +   IFX_uint32_t ptr;
 171     IFX_int32_t index = fastbuf_index;
 172
 173     if (fastbuf_initialized == 0)
 174 @@ -219,11 +247,11 @@ IFX_void_t *ifx_mps_fastbuf_malloc (IFX_
 175        if ((volatile IFX_uint32_t) fastbuf_pool[index] & FASTBUF_USED)
 176           continue;
 177        ptr = fastbuf_pool[index];
 178 -      (volatile IFX_uint32_t) fastbuf_pool[index] |= FASTBUF_USED;
 179 +      fastbuf_pool[index] = (volatile IFX_uint32_t) fastbuf_pool[index] | FASTBUF_USED;
 180        if ((priority == FASTBUF_FW_OWNED) || (priority == FASTBUF_CMD_OWNED) ||
 181            (priority == FASTBUF_EVENT_OWNED) ||
 182            (priority == FASTBUF_WRITE_OWNED))
 183 -         (volatile IFX_uint32_t) fastbuf_pool[index] |= priority;
 184 +         fastbuf_pool[index] = (volatile IFX_uint32_t) fastbuf_pool[index] | priority;
 185        fastbuf_index = index;
 186        IFXOS_UNLOCKINT (flags);
 187        return (IFX_void_t *) ptr;
 188 @@ -247,7 +275,7 @@ IFX_void_t *ifx_mps_fastbuf_malloc (IFX_
 189   */
 190  IFX_void_t ifx_mps_fastbuf_free (const IFX_void_t * ptr)
 191  {
 192 -   IFX_uint32_t flags;
 193 +   unsigned long flags;
 194     IFX_int32_t index = fastbuf_index;
 195
 196     IFXOS_LOCKINT (flags);
 197 @@ -261,8 +289,9 @@ IFX_void_t ifx_mps_fastbuf_free (const I
 198                                       FASTBUF_EVENT_OWNED | FASTBUF_WRITE_OWNED))
 199            == ((IFX_uint32_t) ptr | FASTBUF_USED))
 200        {
 201 -         (volatile IFX_uint32_t) fastbuf_pool[index] &= ~FASTBUF_USED;
 202 -         (volatile IFX_uint32_t) fastbuf_pool[index] &=
 203 +         fastbuf_pool[index] = (volatile IFX_uint32_t) fastbuf_pool[index] & ~FASTBUF_USED;
 204 +
 205 +         fastbuf_pool[index] = (volatile IFX_uint32_t) fastbuf_pool[index] &
 206              ~(FASTBUF_FW_OWNED | FASTBUF_CMD_OWNED | FASTBUF_EVENT_OWNED |
 207                FASTBUF_WRITE_OWNED);
 208           IFXOS_UNLOCKINT (flags);
 209 @@ -444,7 +473,7 @@ static mps_buffer_state_e ifx_mps_bufman
 210   */
 211  static IFX_int32_t ifx_mps_bufman_inc_level (IFX_uint32_t value)
 212  {
 213 -   IFX_uint32_t flags;
 214 +   unsigned long flags;
 215
 216     if (mps_buffer.buf_level + value > MPS_BUFFER_MAX_LEVEL)
 217     {
 218 @@ -471,7 +500,7 @@ static IFX_int32_t ifx_mps_bufman_inc_le
 219   */
 220  static IFX_int32_t ifx_mps_bufman_dec_level (IFX_uint32_t value)
 221  {
 222 -   IFX_uint32_t flags;
 223 +   unsigned long flags;
 224
 225     if (mps_buffer.buf_level < value)
 226     {
 227 @@ -932,7 +961,7 @@ IFX_int32_t ifx_mps_common_open (mps_com
 228                                   mps_mbx_dev * pMBDev, IFX_int32_t bcommand,
 229                                   IFX_boolean_t from_kernel)
 230  {
 231 -   IFX_uint32_t flags;
 232 +   unsigned long flags;
 233
 234     IFXOS_LOCKINT (flags);
 235
 236 @@ -1048,7 +1077,7 @@ IFX_int32_t ifx_mps_common_close (mps_mb
 237  IFX_void_t ifx_mps_release_structures (mps_comm_dev * pDev)
 238  {
 239     IFX_int32_t count;
 240 -   IFX_uint32_t flags;
 241 +   unsigned long flags;
 242
 243     IFXOS_LOCKINT (flags);
 244     IFXOS_BlockFree (pFW_img_data);
 245 @@ -1544,7 +1573,7 @@ IFX_int32_t ifx_mps_mbx_read_message (mp
 246                                        IFX_uint32_t * bytes)
 247  {
 248     IFX_int32_t i, ret;
 249 -   IFX_uint32_t flags;
 250 +   unsigned long flags;
 251
 252     IFXOS_LOCKINT (flags);
 253
 254 @@ -1751,7 +1780,7 @@ IFX_int32_t ifx_mps_mbx_write_message (m
 255  {
 256     mps_fifo *mbx;
 257     IFX_uint32_t i;
 258 -   IFX_uint32_t flags;
 259 +   unsigned long flags;
 260     IFX_int32_t retval = -EAGAIN;
 261     IFX_int32_t retries = 0;
 262     IFX_uint32_t word = 0;
 263 @@ -2138,6 +2167,7 @@ IFX_int32_t ifx_mps_mbx_write_cmd (mps_m
 264        TRACE (MPS, DBG_LEVEL_HIGH,
 265               ("%s(): Invalid device ID %d !\n", __FUNCTION__, pMBDev->devID));
 266     }
 267 +
 268     return retval;
 269  }
 270
 271 @@ -2161,7 +2191,7 @@ IFX_void_t ifx_mps_mbx_data_upstream (IF
 272     mps_mbx_dev *mbx_dev;
 273     MbxMsg_s msg;
 274     IFX_uint32_t bytes_read = 0;
 275 -   IFX_uint32_t flags;
 276 +   unsigned long flags;
 277     IFX_int32_t ret;
 278
 279     /* set pointer to data upstream mailbox, no matter if 0,1,2 or 3 because
 280 @@ -2252,7 +2282,7 @@ IFX_void_t ifx_mps_mbx_data_upstream (IF
 281           {
 282              ifx_mps_bufman_dec_level (1);
 283              if ((ifx_mps_bufman_get_level () <= mps_buffer.buf_threshold) &&
 284 -                (atomic_read (&pMPSDev->provide_buffer->object.count) == 0))
 285 +                ((volatile unsigned int)pMPSDev->provide_buffer->object.count == 0))
 286              {
 287                 IFXOS_LockRelease (pMPSDev->provide_buffer);
 288              }
 289 @@ -2295,7 +2325,7 @@ IFX_void_t ifx_mps_mbx_data_upstream (IF
 290  #endif /* CONFIG_PROC_FS */
 291              ifx_mps_bufman_dec_level (1);
 292              if ((ifx_mps_bufman_get_level () <= mps_buffer.buf_threshold) &&
 293 -                (atomic_read (&pMPSDev->provide_buffer->object.count) == 0))
 294 +                ((volatile unsigned int)pMPSDev->provide_buffer->object.count == 0))
 295              {
 296                 IFXOS_LockRelease (pMPSDev->provide_buffer);
 297              }
 298 @@ -2325,7 +2355,7 @@ IFX_void_t ifx_mps_mbx_data_upstream (IF
 299  IFX_void_t ifx_mps_mbx_cmd_upstream (IFX_ulong_t dummy)
 300  {
 301     mps_fifo *mbx;
 302 -   IFX_uint32_t flags;
 303 +   unsigned long flags;
 304
 305     /* set pointer to upstream command mailbox */
 306     mbx = &(pMPSDev->cmd_upstrm_fifo);
 307 @@ -2373,7 +2403,7 @@ IFX_void_t ifx_mps_mbx_event_upstream (I
 308     mps_event_msg msg;
 309     IFX_int32_t length = 0;
 310     IFX_int32_t read_length = 0;
 311 -   IFX_uint32_t flags;
 312 +   unsigned long flags;
 313
 314     /* set pointer to upstream event mailbox */
 315     mbx = &(pMPSDev->event_upstrm_fifo);
 316 @@ -2616,7 +2646,7 @@ IFX_void_t ifx_mps_disable_mailbox_int (
 317  */
 318  IFX_void_t ifx_mps_dd_mbx_int_enable (IFX_void_t)
 319  {
 320 -   IFX_uint32_t flags;
 321 +   unsigned long flags;
 322     MPS_Ad0Reg_u Ad0Reg;
 323
 324     IFXOS_LOCKINT (flags);
 325 @@ -2642,7 +2672,7 @@ IFX_void_t ifx_mps_dd_mbx_int_enable (IF
 326  */
 327  IFX_void_t ifx_mps_dd_mbx_int_disable (IFX_void_t)
 328  {
 329 -   IFX_uint32_t flags;
 330 +   unsigned long flags;
 331     MPS_Ad0Reg_u Ad0Reg;
 332
 333     IFXOS_LOCKINT (flags);
 334 @@ -2769,6 +2799,7 @@ irqreturn_t ifx_mps_ad0_irq (IFX_int32_t
 335        }
 336     }
 337
 338 +
 339     if (MPS_Ad0StatusReg.fld.du_mbx)
 340     {
 341  #ifdef CONFIG_PROC_FS
 342 @@ -3062,7 +3093,8 @@ IFX_int32_t ifx_mps_get_fw_version (IFX_
 343   */
 344  IFX_return_t ifx_mps_init_gpt ()
 345  {
 346 -   IFX_uint32_t flags, timer_flags, timer, loops = 0;
 347 +   unsigned long flags;
 348 +   IFX_uint32_t timer_flags, timer, loops = 0;
 349     IFX_ulong_t count;
 350  #if defined(SYSTEM_AR9) || defined(SYSTEM_VR9)
 351     timer = TIMER1A;
 352 --- a/src/mps/drv_mps_vmmc_danube.c
 353 +++ b/src/mps/drv_mps_vmmc_danube.c
 354 @@ -32,9 +32,20 @@
 355  #include "ifxos_select.h"
 356  #include "ifxos_interrupt.h"
 357
 358 -#include <asm/ifx/ifx_regs.h>
 359 -#include <asm/ifx/ifx_gpio.h>
 360 -#include <asm/ifx/common_routines.h>
 361 +#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,28))
 362 +#  include <asm/mach-ifxmips/ifxmips.h>
 363 +#  include <asm/mach-ifxmips/ifxmips_irq.h>
 364 +#  include <asm/mach-ifxmips/ifxmips_gptu.h>
 365 +#  include <asm/mach-ifxmips/ifxmips_prom.h>
 366 +#  include <linux/dma-mapping.h>
 367 +
 368 +#  define IFX_RCU_RST_REQ        IFXMIPS_RCU_RST
 369 +#  define IFX_RCU_RST_REQ_CPU1   IFXMIPS_RCU_RST_CPU1
 370 +#else
 371 +#  include <asm/ifx/ifx_regs.h>
 372 +#  include <asm/ifx_vpe.h>
 373 +#  include <asm/ifx/ifx_gpio.h>
 374 +#endif
 375
 376  #include "drv_mps_vmmc.h"
 377  #include "drv_mps_vmmc_dbg.h"
 378 @@ -72,6 +71,23 @@ volatile IFX_uint32_t *danube_cp1_base;
 379  /* Local function definition     */
 380  /* ============================= */
 381
 382 +#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,28))
 383 +IFX_uint32_t ifx_get_cp1_size(IFX_void_t)
 384 +{
 385 +       return 2;
 386 +}
 387 +
 388 +IFX_uint32_t *ifx_get_cp1_base(IFX_void_t)
 389 +{
 390 +       if (!danube_cp1_base) {
 391 +               dma_addr_t dma;
 392 +               danube_cp1_base = dma_alloc_coherent(NULL, ifx_get_cp1_size()<<20, &dma, GFP_ATOMIC);
 393 +       }
 394 +
 395 +       return (IFX_uint32_t*)danube_cp1_base;
 396 +}
 397 +#endif
 398 +
 399  /******************************************************************************
 400   * DANUBE Specific Routines
 401   ******************************************************************************/
 402 @@ -119,6 +132,15 @@ IFX_int32_t ifx_mps_download_firmware (m
 403     }
 404
 405     /* check if FW image fits in available memory space */
 406 +#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,28))
 407 +   if (mem > ifx_get_cp1_size()<<20)
 408 +   {
 409 +      TRACE (MPS, DBG_LEVEL_HIGH,
 410 +      ("[%s %s %d]: error, firmware memory exceeds reserved space (%i > %i)!\n",
 411 +                 __FILE__, __func__, __LINE__, mem, ifx_get_cp1_size()<<20));
 412 +      return IFX_ERROR;
 413 +   }
 414 +#else
 415     if (mem > ifx_get_cp1_size())
 416     {
 417        TRACE (MPS, DBG_LEVEL_HIGH,
 418 @@ -126,6 +148,7 @@ IFX_int32_t ifx_mps_download_firmware (m
 419                   __FILE__, __func__, __LINE__, mem, ifx_get_cp1_size()));
 420        return IFX_ERROR;
 421     }
 422 +#endif
 423
 424     /* reset the driver */
 425     ifx_mps_reset ();
 426 @@ -337,7 +360,7 @@ IFX_void_t ifx_mps_release (IFX_void_t)
 427   */
 428  IFX_void_t ifx_mps_wdog_expiry()
 429  {
 430 -   IFX_uint32_t flags;
 431 +   unsigned long flags;
 432
 433     IFXOS_LOCKINT (flags);
 434     /* recalculate and compare the firmware checksum */
 435 --- a/src/mps/drv_mps_vmmc_device.h
 436 +++ b/src/mps/drv_mps_vmmc_device.h
 437 @@ -16,8 +16,15 @@
 438                   declarations.
 439  *******************************************************************************/
 440
 441 -#include <asm/ifx/ifx_regs.h>
 442 -#include <asm/ifx_vpe.h>
 443 +#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,28))
 444 +#  include <asm/mach-ifxmips/ifxmips.h>
 445 +#  include <asm/mach-ifxmips/ifxmips_irq.h>
 446 +#  include <asm/mach-ifxmips/ifxmips_gpio.h>
 447 +#  include <gpio.h>
 448 +#else
 449 +#  include <asm/ifx/ifx_regs.h>
 450 +#  include <asm/ifx_vpe.h>
 451 +#endif
 452
 453  /* ============================= */
 454  /* MPS Common defines            */
 455 --- a/src/mps/drv_mps_vmmc_linux.c
 456 +++ b/src/mps/drv_mps_vmmc_linux.c
 457 @@ -40,10 +40,26 @@
 458  #include <linux/moduleparam.h>
 459  #endif /* */
 460
 461 -
 462 -#include <asm/ifx/irq.h>
 463 -#include <asm/ifx/ifx_regs.h>
 464 -#include <asm/ifx_vpe.h>
 465 +#if (LINUX_VERSION_CODE > KERNEL_VERSION(2,6,28))
 466 +#  include <asm/mach-ifxmips/ifxmips.h>
 467 +#  include <asm/mach-ifxmips/ifxmips_irq.h>
 468 +
 469 +#  define IFX_MPS_AD0ENR      IFXMIPS_MPS_AD0ENR
 470 +#  define IFX_MPS_AD1ENR      IFXMIPS_MPS_AD1ENR
 471 +#  define IFX_MPS_RAD0SR      IFXMIPS_MPS_RAD0SR
 472 +#  define IFX_MPS_RAD1SR      IFXMIPS_MPS_RAD1SR
 473 +#  define IFX_MPS_VC0ENR      IFXMIPS_MPS_VC0ENR
 474 +#  define IFX_MPS_RVC0SR      IFXMIPS_MPS_RVC0SR
 475 +
 476 +#  define INT_NUM_IM4_IRL14   (INT_NUM_IM4_IRL0 + 14)
 477 +#  define INT_NUM_IM4_IRL18   (INT_NUM_IM4_IRL0 + 18)
 478 +#  define INT_NUM_IM4_IRL19   (INT_NUM_IM4_IRL0 + 19)
 479 +#  define IFX_ICU_IM4_IER     IFXMIPS_ICU_IM4_IER
 480 +#else
 481 +#  include <asm/ifx/irq.h>
 482 +#  include <asm/ifx/ifx_regs.h>
 483 +#  include <asm/ifx_vpe.h>
 484 +#endif
 485
 486  /* lib_ifxos headers */
 487  #include "ifx_types.h"
 488 @@ -914,7 +930,7 @@ IFX_int32_t ifx_mps_ioctl (struct inode
 489  #endif /* MPS_FIFO_BLOCKING_WRITE */
 490        case FIO_MPS_GET_STATUS:
 491           {
 492 -            IFX_uint32_t flags;
 493 +            unsigned long flags;
 494
 495              IFXOS_LOCKINT (flags);
 496
 497 @@ -949,7 +965,7 @@ IFX_int32_t ifx_mps_ioctl (struct inode
 498  #if CONFIG_MPS_HISTORY_SIZE > 0
 499        case FIO_MPS_GET_CMD_HISTORY:
 500           {
 501 -            IFX_uint32_t flags;
 502 +            unsigned long flags;
 503
 504              if (from_kernel)
 505              {
 506 @@ -1637,6 +1653,7 @@ IFX_int32_t ifx_mps_get_status_proc (IFX
 507           sprintf (buf + len, "   minLv: \t  %8d\n",
 508                    ifx_mps_dev.voice_mb[i].upstrm_fifo->min_space);
 509     }
 510 +
 511     return len;
 512  }
 513