target/linux/orion/patches/012-rework_mpp_handling.patch

   1 Instead of having board code poke directly into the MPP configuration
   2 registers, and separately calling orion5x_gpio_set_valid_pins() to
   3 indicate which MPP pins can be used as GPIO pins, introduce a helper
   4 function for configuring the roles of each of the MPP pins, and have
   5 that helper function handle gpio validity internally.
   6
   7 Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
   8 Acked-by: Sylver Bruneau <sylver.bruneau@googlemail.com>
   9 ---
  10  arch/arm/mach-orion5x/Makefile            |    2 +-
  11  arch/arm/mach-orion5x/common.h            |    2 +-
  12  arch/arm/mach-orion5x/db88f5281-setup.c   |   42 +++++----
  13  arch/arm/mach-orion5x/dns323-setup.c      |   50 +++++------
  14  arch/arm/mach-orion5x/gpio.c              |    7 +-
  15  arch/arm/mach-orion5x/kurobox_pro-setup.c |   41 ++++----
  16  arch/arm/mach-orion5x/mpp.c               |  142 +++++++++++++++++++++++++++++
  17  arch/arm/mach-orion5x/mpp.h               |   63 +++++++++++++
  18  arch/arm/mach-orion5x/rd88f5182-setup.c   |   43 +++++----
  19  arch/arm/mach-orion5x/ts209-setup.c       |   43 +++++----
  20  10 files changed, 321 insertions(+), 114 deletions(-)
  21  create mode 100644 arch/arm/mach-orion5x/mpp.c
  22  create mode 100644 arch/arm/mach-orion5x/mpp.h
  23
  24 --- a/arch/arm/mach-orion5x/Makefile
  25 +++ b/arch/arm/mach-orion5x/Makefile
  26 @@ -1,4 +1,4 @@
  27 -obj-y                          += common.o addr-map.o pci.o gpio.o irq.o
  28 +obj-y                          += common.o addr-map.o pci.o gpio.o irq.o mpp.o
  29  obj-$(CONFIG_MACH_DB88F5281)   += db88f5281-setup.o
  30  obj-$(CONFIG_MACH_RD88F5182)   += rd88f5182-setup.o
  31  obj-$(CONFIG_MACH_KUROBOX_PRO) += kurobox_pro-setup.o
  32 --- a/arch/arm/mach-orion5x/common.h
  33 +++ b/arch/arm/mach-orion5x/common.h
  34 @@ -48,7 +48,7 @@
  35   * Valid GPIO pins according to MPP setup, used by machine-setup.
  36   * (/mach-orion/gpio.c).
  37   */
  38 -void orion5x_gpio_set_valid_pins(u32 pins);
  39 +void orion5x_gpio_set_valid(unsigned pin, int valid);
  40  void gpio_display(void);       /* debug */
  41
  42  struct machine_desc;
  43 --- a/arch/arm/mach-orion5x/db88f5281-setup.c
  44 +++ b/arch/arm/mach-orion5x/db88f5281-setup.c
  45 @@ -27,6 +27,7 @@
  46  #include <asm/arch/orion5x.h>
  47  #include <asm/plat-orion/orion_nand.h>
  48  #include "common.h"
  49 +#include "mpp.h"
  50
  51  /*****************************************************************************
  52   * DB-88F5281 on board devices
  53 @@ -305,26 +306,27 @@
  54          */
  55         orion5x_init();
  56
  57 -       /*
  58 -        * Setup Multiplexing Pins:
  59 -        * MPP0: GPIO (USB Over Current)        MPP1: GPIO (USB Vbat input)
  60 -        * MPP2: PCI_REQn[2]                    MPP3: PCI_GNTn[2]
  61 -        * MPP4: PCI_REQn[3]                    MPP5: PCI_GNTn[3]
  62 -        * MPP6: GPIO (JP0, CON17.2)            MPP7: GPIO (JP1, CON17.1)
  63 -        * MPP8: GPIO (JP2, CON11.2)            MPP9: GPIO (JP3, CON11.3)
  64 -        * MPP10: GPIO (RTC int)                MPP11: GPIO (Baud Rate Generator)
  65 -        * MPP12: GPIO (PCI int 1)              MPP13: GPIO (PCI int 2)
  66 -        * MPP14: NAND_REn[2]                   MPP15: NAND_WEn[2]
  67 -        * MPP16: UART1_RX                      MPP17: UART1_TX
  68 -        * MPP18: UART1_CTS                     MPP19: UART1_RTS
  69 -        * MPP-DEV: DEV_D[16:31]
  70 -        */
  71 -       orion5x_write(MPP_0_7_CTRL, 0x00222203);
  72 -       orion5x_write(MPP_8_15_CTRL, 0x44000000);
  73 -       orion5x_write(MPP_16_19_CTRL, 0);
  74 -       orion5x_write(MPP_DEV_CTRL, 0);
  75 -
  76 -       orion5x_gpio_set_valid_pins(0x00003fc3);
  77 +       orion5x_mpp_conf(0, MPP_GPIO);          /* USB Over Current */
  78 +       orion5x_mpp_conf(1, MPP_GPIO);          /* USB Vbat input */
  79 +       orion5x_mpp_conf(2, MPP_PCI_ARB);       /* PCI_REQn[2] */
  80 +       orion5x_mpp_conf(3, MPP_PCI_ARB);       /* PCI_GNTn[2] */
  81 +       orion5x_mpp_conf(4, MPP_PCI_ARB);       /* PCI_REQn[3] */
  82 +       orion5x_mpp_conf(5, MPP_PCI_ARB);       /* PCI_GNTn[3] */
  83 +       orion5x_mpp_conf(6, MPP_GPIO);          /* JP0, CON17.2 */
  84 +       orion5x_mpp_conf(7, MPP_GPIO);          /* JP1, CON17.1 */
  85 +       orion5x_mpp_conf(8, MPP_GPIO);          /* JP2, CON11.2 */
  86 +       orion5x_mpp_conf(9, MPP_GPIO);          /* JP3, CON11.3 */
  87 +       orion5x_mpp_conf(10, MPP_GPIO);         /* RTC int */
  88 +       orion5x_mpp_conf(11, MPP_GPIO);         /* Baud Rate Generator */
  89 +       orion5x_mpp_conf(12, MPP_GPIO);         /* PCI int 1 */
  90 +       orion5x_mpp_conf(13, MPP_GPIO);         /* PCI int 2 */
  91 +       orion5x_mpp_conf(14, MPP_NAND);         /* NAND_REn[2] */
  92 +       orion5x_mpp_conf(15, MPP_NAND);         /* NAND_WEn[2] */
  93 +       orion5x_mpp_conf(16, MPP_UART);         /* UART1_RX */
  94 +       orion5x_mpp_conf(17, MPP_UART);         /* UART1_TX */
  95 +       orion5x_mpp_conf(18, MPP_UART);         /* UART1_CTSn */
  96 +       orion5x_mpp_conf(19, MPP_UART);         /* UART1_RTSn */
  97 +       orion5x_write(MPP_DEV_CTRL, 0);         /* DEV_D[31:16] */
  98
  99         /*
 100          * Configure peripherals.
 101 --- a/arch/arm/mach-orion5x/dns323-setup.c
 102 +++ b/arch/arm/mach-orion5x/dns323-setup.c
 103 @@ -27,6 +27,7 @@
 104  #include <asm/mach/pci.h>
 105  #include <asm/arch/orion5x.h>
 106  #include "common.h"
 107 +#include "mpp.h"
 108
 109  #define DNS323_GPIO_LED_RIGHT_AMBER    1
 110  #define DNS323_GPIO_LED_LEFT_AMBER     2
 111 @@ -247,34 +248,27 @@
 112         /* Setup basic Orion functions. Need to be called early. */
 113         orion5x_init();
 114
 115 -       /* set MPP to 0 as D-Link's 2.6.12.6 kernel did */
 116 -       orion5x_write(MPP_0_7_CTRL, 0);
 117 -       orion5x_write(MPP_8_15_CTRL, 0);
 118 -       orion5x_write(MPP_16_19_CTRL, 0);
 119 -       orion5x_write(MPP_DEV_CTRL, 0);
 120 -
 121 -       /* Define used GPIO pins
 122 -
 123 -         GPIO Map:
 124 -
 125 -         |  0 |     | PEX_RST_OUT (not controlled by GPIO)
 126 -         |  1 | Out | right amber LED (= sata ch0 LED)  (low-active)
 127 -         |  2 | Out | left  amber LED (= sata ch1 LED)  (low-active)
 128 -         |  3 | Out | //unknown//
 129 -         |  4 | Out | power button LED (low-active, together with pin #5)
 130 -         |  5 | Out | power button LED (low-active, together with pin #4)
 131 -         |  6 | In  | GMT G751-2f overtemp. shutdown signal (low-active)
 132 -         |  7 | In  | M41T80 nIRQ/OUT/SQW signal
 133 -         |  8 | Out | triggers power off (high-active)
 134 -         |  9 | In  | power button switch (low-active)
 135 -         | 10 | In  | reset button switch (low-active)
 136 -         | 11 | Out | //unknown//
 137 -         | 12 | Out | //unknown//
 138 -         | 13 | Out | //unknown//
 139 -         | 14 | Out | //unknown//
 140 -         | 15 | Out | //unknown//
 141 -       */
 142 -       orion5x_gpio_set_valid_pins(0x07f6);
 143 +       orion5x_mpp_conf(0, MPP_PCIE_RST_OUTn);
 144 +       orion5x_mpp_conf(1, MPP_GPIO);          /* right amber LED (sata ch0) */
 145 +       orion5x_mpp_conf(2, MPP_GPIO);          /* left amber LED (sata ch1) */
 146 +       orion5x_mpp_conf(3, MPP_UNUSED);
 147 +       orion5x_mpp_conf(4, MPP_GPIO);          /* power button LED */
 148 +       orion5x_mpp_conf(5, MPP_GPIO);          /* power button LED */
 149 +       orion5x_mpp_conf(6, MPP_GPIO);          /* GMT G751-2f overtemp */
 150 +       orion5x_mpp_conf(7, MPP_GPIO);          /* M41T80 nIRQ/OUT/SQW */
 151 +       orion5x_mpp_conf(8, MPP_GPIO);          /* triggers power off */
 152 +       orion5x_mpp_conf(9, MPP_GPIO);          /* power button switch */
 153 +       orion5x_mpp_conf(10, MPP_GPIO);         /* reset button switch */
 154 +       orion5x_mpp_conf(11, MPP_UNUSED);
 155 +       orion5x_mpp_conf(12, MPP_UNUSED);
 156 +       orion5x_mpp_conf(13, MPP_UNUSED);
 157 +       orion5x_mpp_conf(14, MPP_UNUSED);
 158 +       orion5x_mpp_conf(15, MPP_UNUSED);
 159 +       orion5x_mpp_conf(16, MPP_UNUSED);
 160 +       orion5x_mpp_conf(17, MPP_UNUSED);
 161 +       orion5x_mpp_conf(18, MPP_UNUSED);
 162 +       orion5x_mpp_conf(19, MPP_UNUSED);
 163 +       orion5x_write(MPP_DEV_CTRL, 0);         /* DEV_D[31:16] */
 164
 165         /*
 166          * Configure peripherals.
 167 --- a/arch/arm/mach-orion5x/gpio.c
 168 +++ b/arch/arm/mach-orion5x/gpio.c
 169 @@ -24,9 +24,12 @@
 170  static unsigned long gpio_valid[BITS_TO_LONGS(GPIO_MAX)];
 171  static const char *gpio_label[GPIO_MAX];  /* non null for allocated GPIOs */
 172
 173 -void __init orion5x_gpio_set_valid_pins(u32 pins)
 174 +void __init orion5x_gpio_set_valid(unsigned pin, int valid)
 175  {
 176 -       gpio_valid[0] = pins;
 177 +       if (valid)
 178 +               __set_bit(pin, gpio_valid);
 179 +       else
 180 +               __clear_bit(pin, gpio_valid);
 181  }
 182
 183  /*
 184 --- a/arch/arm/mach-orion5x/kurobox_pro-setup.c
 185 +++ b/arch/arm/mach-orion5x/kurobox_pro-setup.c
 186 @@ -25,6 +25,7 @@
 187  #include <asm/arch/orion5x.h>
 188  #include <asm/plat-orion/orion_nand.h>
 189  #include "common.h"
 190 +#include "mpp.h"
 191
 192  /*****************************************************************************
 193   * KUROBOX-PRO Info
 194 @@ -187,26 +188,26 @@
 195          */
 196         orion5x_init();
 197
 198 -       /*
 199 -        * Setup Multiplexing Pins --
 200 -        * MPP[0-1] Not used
 201 -        * MPP[2] GPIO Micon
 202 -        * MPP[3] GPIO RTC
 203 -        * MPP[4-5] Not used
 204 -        * MPP[6] Nand Flash REn
 205 -        * MPP[7] Nand Flash WEn
 206 -        * MPP[8-11] Not used
 207 -        * MPP[12] SATA 0 presence Indication
 208 -        * MPP[13] SATA 1 presence Indication
 209 -        * MPP[14] SATA 0 active Indication
 210 -        * MPP[15] SATA 1 active indication
 211 -        * MPP[16-19] Not used
 212 -        */
 213 -       orion5x_write(MPP_0_7_CTRL, 0x44220003);
 214 -       orion5x_write(MPP_8_15_CTRL, 0x55550000);
 215 -       orion5x_write(MPP_16_19_CTRL, 0x0);
 216 -
 217 -       orion5x_gpio_set_valid_pins(0x0000000c);
 218 +       orion5x_mpp_conf(0, MPP_UNUSED);
 219 +       orion5x_mpp_conf(1, MPP_UNUSED);
 220 +       orion5x_mpp_conf(2, MPP_GPIO);          /* GPIO Micon */
 221 +       orion5x_mpp_conf(3, MPP_GPIO);          /* GPIO Rtc */
 222 +       orion5x_mpp_conf(4, MPP_UNUSED);
 223 +       orion5x_mpp_conf(5, MPP_UNUSED);
 224 +       orion5x_mpp_conf(6, MPP_NAND);          /* NAND Flash REn */
 225 +       orion5x_mpp_conf(7, MPP_NAND);          /* NAND Flash WEn */
 226 +       orion5x_mpp_conf(8, MPP_UNUSED);
 227 +       orion5x_mpp_conf(9, MPP_UNUSED);
 228 +       orion5x_mpp_conf(10, MPP_UNUSED);
 229 +       orion5x_mpp_conf(11, MPP_UNUSED);
 230 +       orion5x_mpp_conf(12, MPP_SATA_LED);     /* SATA 0 presence */
 231 +       orion5x_mpp_conf(13, MPP_SATA_LED);     /* SATA 1 presence */
 232 +       orion5x_mpp_conf(14, MPP_SATA_LED);     /* SATA 0 active */
 233 +       orion5x_mpp_conf(15, MPP_SATA_LED);     /* SATA 1 active */
 234 +       orion5x_mpp_conf(16, MPP_UNUSED);
 235 +       orion5x_mpp_conf(17, MPP_UNUSED);
 236 +       orion5x_mpp_conf(18, MPP_UNUSED);
 237 +       orion5x_mpp_conf(19, MPP_UNUSED);
 238
 239         /*
 240          * Configure peripherals.
 241 --- /dev/null
 242 +++ b/arch/arm/mach-orion5x/mpp.c
 243 @@ -0,0 +1,142 @@
 244 +/*
 245 + * arch/arm/mach-orion5x/mpp.c
 246 + *
 247 + * MPP functions for Marvell Orion 5x SoCs
 248 + *
 249 + * This file is licensed under the terms of the GNU General Public
 250 + * License version 2.  This program is licensed "as is" without any
 251 + * warranty of any kind, whether express or implied.
 252 + */
 253 +
 254 +#include <linux/kernel.h>
 255 +#include <linux/init.h>
 256 +#include <linux/mbus.h>
 257 +#include <asm/hardware.h>
 258 +#include <asm/io.h>
 259 +#include "common.h"
 260 +#include "mpp.h"
 261 +
 262 +static int is_5182(void)
 263 +{
 264 +       u32 dev;
 265 +       u32 rev;
 266 +
 267 +       orion5x_pcie_id(&dev, &rev);
 268 +
 269 +       return !!(dev == MV88F5182_DEV_ID);
 270 +}
 271 +
 272 +static int is_5281(void)
 273 +{
 274 +       u32 dev;
 275 +       u32 rev;
 276 +
 277 +       orion5x_pcie_id(&dev, &rev);
 278 +
 279 +       return !!(dev == MV88F5281_DEV_ID);
 280 +}
 281 +
 282 +static int __init determine_type_encoding(int mpp, enum orion5x_mpp_type type)
 283 +{
 284 +       switch (type) {
 285 +       case MPP_UNUSED:
 286 +       case MPP_GPIO:
 287 +               if (mpp == 0)
 288 +                       return 3;
 289 +               if (mpp >= 1 && mpp <= 15)
 290 +                       return 0;
 291 +               if (mpp >= 16 && mpp <= 19) {
 292 +                       if (is_5182())
 293 +                               return 5;
 294 +                       if (type == MPP_UNUSED)
 295 +                               return 0;
 296 +               }
 297 +               return -1;
 298 +
 299 +       case MPP_PCIE_RST_OUTn:
 300 +               if (mpp == 0)
 301 +                       return 0;
 302 +               return -1;
 303 +
 304 +       case MPP_PCI_ARB:
 305 +               if (mpp >= 0 && mpp <= 7)
 306 +                       return 2;
 307 +               return -1;
 308 +
 309 +       case MPP_PCI_PMEn:
 310 +               if (mpp == 2)
 311 +                       return 3;
 312 +               return -1;
 313 +
 314 +       case MPP_GIGE:
 315 +               if (mpp >= 8 && mpp <= 15)
 316 +                       return 1;
 317 +               return -1;
 318 +
 319 +       case MPP_NAND:
 320 +               if (is_5182() || is_5281()) {
 321 +                       if (mpp >= 4 && mpp <= 7)
 322 +                               return 4;
 323 +                       if (mpp >= 12 && mpp <= 17)
 324 +                               return 4;
 325 +               }
 326 +               return -1;
 327 +
 328 +
 329 +       case MPP_SATA_LED:
 330 +               if (is_5182()) {
 331 +                       if (mpp >= 4 && mpp <= 7)
 332 +                               return 5;
 333 +                       if (mpp >= 12 && mpp <= 15)
 334 +                               return 5;
 335 +               }
 336 +               return -1;
 337 +
 338 +       case MPP_UART:
 339 +               if (mpp >= 16 && mpp <= 19)
 340 +                       return 0;
 341 +               return -1;
 342 +       }
 343 +
 344 +       printk(KERN_INFO "unknown MPP type %d\n", type);
 345 +
 346 +       return -1;
 347 +}
 348 +
 349 +static void __init set_mpp_type(int mpp, int num_type)
 350 +{
 351 +       unsigned long reg;
 352 +       u32 value;
 353 +
 354 +       if (mpp >= 0 && mpp <= 7)
 355 +               reg = MPP_0_7_CTRL;
 356 +       else if (mpp >= 8 && mpp <= 15)
 357 +               reg = MPP_8_15_CTRL;
 358 +       else if (mpp >= 16 && mpp <= 19)
 359 +               reg = MPP_16_19_CTRL;
 360 +       else
 361 +               return;
 362 +
 363 +       mpp &= 7;
 364 +
 365 +       value = readl(reg);
 366 +       value &= ~(0xf << (mpp << 2));
 367 +       value |= (num_type & 0xf) << (mpp << 2);
 368 +       writel(value, reg);
 369 +}
 370 +
 371 +void __init orion5x_mpp_conf(int mpp, enum orion5x_mpp_type type)
 372 +{
 373 +       int num_type;
 374 +
 375 +       num_type = determine_type_encoding(mpp, type);
 376 +       if (num_type < 0) {
 377 +               printk(KERN_ERR "orion5x_mpp_conf: invalid MPP "
 378 +                               "combination (%d, %d)\n", mpp, type);
 379 +               return;
 380 +       }
 381 +
 382 +       set_mpp_type(mpp, num_type);
 383 +
 384 +       orion5x_gpio_set_valid(mpp, (type == MPP_GPIO) ? 1 : 0);
 385 +}
 386 --- /dev/null
 387 +++ b/arch/arm/mach-orion5x/mpp.h
 388 @@ -0,0 +1,63 @@
 389 +#ifndef __ARCH_ORION5X_MPP_H
 390 +#define __ARCH_ORION5X_MPP_H
 391 +
 392 +enum orion5x_mpp_type {
 393 +       /*
 394 +        * This MPP is unused.
 395 +        */
 396 +       MPP_UNUSED,
 397 +
 398 +       /*
 399 +        * This MPP pin is used as a generic GPIO pin.  Valid for
 400 +        * MPPs 0-15 and device bus data pins 16-31.  On 5182, also
 401 +        * valid for MPPs 16-19.
 402 +        */
 403 +       MPP_GPIO,
 404 +
 405 +       /*
 406 +        * This MPP is used as PCIe_RST_OUTn pin.  Valid for
 407 +        * MPP 0 only.
 408 +        */
 409 +       MPP_PCIE_RST_OUTn,
 410 +
 411 +       /*
 412 +        * This MPP is used as PCI arbiter pin (REQn/GNTn.)
 413 +        * Valid for MPPs 0-7 only.
 414 +        */
 415 +       MPP_PCI_ARB,
 416 +
 417 +       /*
 418 +        * This MPP is used as PCI_PMEn pin.  Valid for MPP 2 only.
 419 +        */
 420 +       MPP_PCI_PMEn,
 421 +
 422 +       /*
 423 +        * This MPP is used as GigE half-duplex (COL, CRS) or GMII
 424 +        * (RXERR, CRS, TXERR, TXD[7:4], RXD[7:4]) pin.  Valid for
 425 +        * MPPs 8-19 only.
 426 +        */
 427 +       MPP_GIGE,
 428 +
 429 +       /*
 430 +        * This MPP is used as NAND REn/WEn pin.  Valid for MPPs
 431 +        * 4-7 and 12-17 only, and only on the 5181l/5182/5281.
 432 +        */
 433 +       MPP_NAND,
 434 +
 435 +       /*
 436 +        * This MPP is used as a SATA presence/activity LED.
 437 +        * Valid for MPPs 4-7 and 12-15 only, and only on the 5182.
 438 +        */
 439 +       MPP_SATA_LED,
 440 +
 441 +       /*
 442 +        * This MPP is used as UART1 RXD/TXD/CTSn/RTSn pin.
 443 +        * Valid for MPPs 16-19 only.
 444 +        */
 445 +       MPP_UART,
 446 +};
 447 +
 448 +void orion5x_mpp_conf(int mpp, enum orion5x_mpp_type type);
 449 +
 450 +
 451 +#endif
 452 --- a/arch/arm/mach-orion5x/rd88f5182-setup.c
 453 +++ b/arch/arm/mach-orion5x/rd88f5182-setup.c
 454 @@ -26,6 +26,7 @@
 455  #include <asm/mach/pci.h>
 456  #include <asm/arch/orion5x.h>
 457  #include "common.h"
 458 +#include "mpp.h"
 459
 460  /*****************************************************************************
 461   * RD-88F5182 Info
 462 @@ -248,22 +249,28 @@
 463          */
 464         orion5x_init();
 465
 466 +       orion5x_mpp_conf(0, MPP_GPIO);          /* Debug Led */
 467 +       orion5x_mpp_conf(1, MPP_GPIO);          /* Reset Switch */
 468 +       orion5x_mpp_conf(2, MPP_UNUSED);
 469 +       orion5x_mpp_conf(3, MPP_GPIO);          /* RTC Int */
 470 +       orion5x_mpp_conf(4, MPP_GPIO);
 471 +       orion5x_mpp_conf(5, MPP_GPIO);
 472 +       orion5x_mpp_conf(6, MPP_GPIO);          /* PCI_intA */
 473 +       orion5x_mpp_conf(7, MPP_GPIO);          /* PCI_intB */
 474 +       orion5x_mpp_conf(8, MPP_UNUSED);
 475 +       orion5x_mpp_conf(9, MPP_UNUSED);
 476 +       orion5x_mpp_conf(10, MPP_UNUSED);
 477 +       orion5x_mpp_conf(11, MPP_UNUSED);
 478 +       orion5x_mpp_conf(12, MPP_SATA_LED);     /* SATA 0 presence */
 479 +       orion5x_mpp_conf(13, MPP_SATA_LED);     /* SATA 1 presence */
 480 +       orion5x_mpp_conf(14, MPP_SATA_LED);     /* SATA 0 active */
 481 +       orion5x_mpp_conf(15, MPP_SATA_LED);     /* SATA 1 active */
 482 +       orion5x_mpp_conf(16, MPP_UNUSED);
 483 +       orion5x_mpp_conf(17, MPP_UNUSED);
 484 +       orion5x_mpp_conf(18, MPP_UNUSED);
 485 +       orion5x_mpp_conf(19, MPP_UNUSED);
 486 +
 487         /*
 488 -        * Setup Multiplexing Pins --
 489 -        * MPP[0] Debug Led (GPIO - Out)
 490 -        * MPP[1] Debug Led (GPIO - Out)
 491 -        * MPP[2] N/A
 492 -        * MPP[3] RTC_Int (GPIO - In)
 493 -        * MPP[4] GPIO
 494 -        * MPP[5] GPIO
 495 -        * MPP[6] PCI_intA (GPIO - In)
 496 -        * MPP[7] PCI_intB (GPIO - In)
 497 -        * MPP[8-11] N/A
 498 -        * MPP[12] SATA 0 presence Indication
 499 -        * MPP[13] SATA 1 presence Indication
 500 -        * MPP[14] SATA 0 active Indication
 501 -        * MPP[15] SATA 1 active indication
 502 -        * MPP[16-19] Not used
 503          * MPP[20] PCI Clock to MV88F5182
 504          * MPP[21] PCI Clock to mini PCI CON11
 505          * MPP[22] USB 0 over current indication
 506 @@ -272,12 +279,6 @@
 507          * MPP[25] USB 0 over current enable
 508          */
 509
 510 -       orion5x_write(MPP_0_7_CTRL, 0x00000003);
 511 -       orion5x_write(MPP_8_15_CTRL, 0x55550000);
 512 -       orion5x_write(MPP_16_19_CTRL, 0x5555);
 513 -
 514 -       orion5x_gpio_set_valid_pins(0x000000fb);
 515 -
 516         /*
 517          * Configure peripherals.
 518          */
 519 --- a/arch/arm/mach-orion5x/ts209-setup.c
 520 +++ b/arch/arm/mach-orion5x/ts209-setup.c
 521 @@ -28,6 +28,7 @@
 522  #include <asm/mach/pci.h>
 523  #include <asm/arch/orion5x.h>
 524  #include "common.h"
 525 +#include "mpp.h"
 526
 527  #define QNAP_TS209_NOR_BOOT_BASE 0xf4000000
 528  #define QNAP_TS209_NOR_BOOT_SIZE SZ_8M
 529 @@ -364,33 +365,33 @@
 530          */
 531         orion5x_init();
 532
 533 +       orion5x_mpp_conf(0, MPP_UNUSED);
 534 +       orion5x_mpp_conf(1, MPP_GPIO);          /* USB copy button */
 535 +       orion5x_mpp_conf(2, MPP_GPIO);          /* Load defaults button */
 536 +       orion5x_mpp_conf(3, MPP_GPIO);          /* GPIO RTC */
 537 +       orion5x_mpp_conf(4, MPP_UNUSED);
 538 +       orion5x_mpp_conf(5, MPP_UNUSED);
 539 +       orion5x_mpp_conf(6, MPP_GPIO);          /* PCI Int A */
 540 +       orion5x_mpp_conf(7, MPP_GPIO);          /* PCI Int B */
 541 +       orion5x_mpp_conf(8, MPP_UNUSED);
 542 +       orion5x_mpp_conf(9, MPP_UNUSED);
 543 +       orion5x_mpp_conf(10, MPP_UNUSED);
 544 +       orion5x_mpp_conf(11, MPP_UNUSED);
 545 +       orion5x_mpp_conf(12, MPP_SATA_LED);     /* SATA 0 presence */
 546 +       orion5x_mpp_conf(13, MPP_SATA_LED);     /* SATA 1 presence */
 547 +       orion5x_mpp_conf(14, MPP_SATA_LED);     /* SATA 0 active */
 548 +       orion5x_mpp_conf(15, MPP_SATA_LED);     /* SATA 1 active */
 549 +       orion5x_mpp_conf(16, MPP_UART);         /* UART1 RXD */
 550 +       orion5x_mpp_conf(17, MPP_UART);         /* UART1 TXD */
 551 +       orion5x_mpp_conf(18, MPP_GPIO);         /* SW_RST */
 552 +       orion5x_mpp_conf(19, MPP_UNUSED);
 553 +
 554         /*
 555 -        * Setup Multiplexing Pins --
 556 -        * MPP[0] Reserved
 557 -        * MPP[1] USB copy button (0 active)
 558 -        * MPP[2] Load defaults button (0 active)
 559 -        * MPP[3] GPIO RTC
 560 -        * MPP[4-5] Reserved
 561 -        * MPP[6] PCI Int A
 562 -        * MPP[7] PCI Int B
 563 -        * MPP[8-11] Reserved
 564 -        * MPP[12] SATA 0 presence
 565 -        * MPP[13] SATA 1 presence
 566 -        * MPP[14] SATA 0 active
 567 -        * MPP[15] SATA 1 active
 568 -        * MPP[16] UART1 RXD
 569 -        * MPP[17] UART1 TXD
 570 -        * MPP[18] SW_RST (0 active)
 571 -        * MPP[19] Reserved
 572          * MPP[20] PCI clock 0
 573          * MPP[21] PCI clock 1
 574          * MPP[22] USB 0 over current
 575          * MPP[23-25] Reserved
 576          */
 577 -       orion5x_write(MPP_0_7_CTRL, 0x3);
 578 -       orion5x_write(MPP_8_15_CTRL, 0x55550000);
 579 -       orion5x_write(MPP_16_19_CTRL, 0x5500);
 580 -       orion5x_gpio_set_valid_pins(0x3cc0fff);
 581
 582         /*
 583          * Configure peripherals.