4 * Copyright (C) 2006, 2007 OpenWrt.org
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
21 #include <linux/module.h>
22 #include <linux/init.h>
23 #include <linux/moduleparam.h>
25 #include <linux/sched.h>
26 #include <linux/kernel.h> /* printk() */
27 #include <linux/slab.h>
28 #include <linux/errno.h>
29 #include <linux/types.h>
30 #include <linux/delay.h>
31 #include <linux/version.h>
33 #include <linux/netdevice.h>
34 #include <linux/etherdevice.h>
35 #include <linux/ethtool.h>
36 #include <linux/skbuff.h>
37 #include <linux/mii.h>
38 #include <linux/phy.h>
39 #include <linux/platform_device.h>
40 #include <asm/ar7/ar7.h>
43 MODULE_AUTHOR("Eugene Konev");
44 MODULE_DESCRIPTION("TI AR7 ethernet driver (CPMAC)");
45 MODULE_LICENSE("GPL");
47 /* Register definitions */
48 struct cpmac_control_regs
{
49 volatile u32 revision
;
51 volatile u32 teardown
;
55 struct cpmac_int_regs
{
56 volatile u32 stat_raw
;
57 volatile u32 stat_masked
;
67 volatile u32 crc_error
;
68 volatile u32 align_error
;
69 volatile u32 oversized
;
71 volatile u32 undersized
;
72 volatile u32 fragment
;
73 volatile u32 filtered
;
74 volatile u32 qos_filtered
;
79 struct cpmac_control_regs tx_ctrl
;
80 struct cpmac_control_regs rx_ctrl
;
81 volatile u32 unused1
[56];
84 #define MBP_RXPASSCRC 0x40000000
85 #define MBP_RXQOS 0x20000000
86 #define MBP_RXNOCHAIN 0x10000000
87 #define MBP_RXCMF 0x01000000
88 #define MBP_RXSHORT 0x00800000
89 #define MBP_RXCEF 0x00400000
90 #define MBP_RXPROMISC 0x00200000
91 #define MBP_PROMISCCHAN(chan) (((chan) & 0x7) << 16)
92 #define MBP_RXBCAST 0x00002000
93 #define MBP_BCASTCHAN(chan) (((chan) & 0x7) << 8)
94 #define MBP_RXMCAST 0x00000020
95 #define MBP_MCASTCHAN(chan) ((chan) & 0x7)
96 volatile u32 unicast_enable
;
97 volatile u32 unicast_clear
;
99 volatile u32 buffer_offset
;
100 volatile u32 filter_flow_threshold
;
101 volatile u32 unused2
[2];
102 volatile u32 flow_thre
[8];
103 volatile u32 free_buffer
[8];
104 volatile u32 mac_control
;
105 #define MAC_TXPTYPE 0x00000200
106 #define MAC_TXPACE 0x00000040
107 #define MAC_MII 0x00000020
108 #define MAC_TXFLOW 0x00000010
109 #define MAC_RXFLOW 0x00000008
110 #define MAC_MTEST 0x00000004
111 #define MAC_LOOPBACK 0x00000002
112 #define MAC_FDX 0x00000001
113 volatile u32 mac_status
;
114 #define MACST_QOS 0x4
115 #define MACST_RXFLOW 0x2
116 #define MACST_TXFLOW 0x1
117 volatile u32 emc_control
;
118 volatile u32 unused3
;
119 struct cpmac_int_regs tx_int
;
120 volatile u32 mac_int_vector
;
121 /* Int Status bits */
122 #define INTST_STATUS 0x80000
123 #define INTST_HOST 0x40000
124 #define INTST_RX 0x20000
125 #define INTST_TX 0x10000
126 volatile u32 mac_eoi_vector
;
127 volatile u32 unused4
[2];
128 struct cpmac_int_regs rx_int
;
129 volatile u32 mac_int_stat_raw
;
130 volatile u32 mac_int_stat_masked
;
131 volatile u32 mac_int_enable
;
132 volatile u32 mac_int_clear
;
133 volatile u32 mac_addr_low
[8];
134 volatile u32 mac_addr_mid
;
135 volatile u32 mac_addr_high
;
136 volatile u32 mac_hash_low
;
137 volatile u32 mac_hash_high
;
138 volatile u32 boff_test
;
139 volatile u32 pac_test
;
140 volatile u32 rx_pause
;
141 volatile u32 tx_pause
;
142 volatile u32 unused5
[2];
143 struct cpmac_stats rx_stats
;
144 struct cpmac_stats tx_stats
;
145 volatile u32 unused6
[232];
146 volatile u32 tx_ptr
[8];
147 volatile u32 rx_ptr
[8];
148 volatile u32 tx_ack
[8];
149 volatile u32 rx_ack
[8];
153 struct cpmac_mdio_regs
{
154 volatile u32 version
;
155 volatile u32 control
;
156 #define MDIOC_IDLE 0x80000000
157 #define MDIOC_ENABLE 0x40000000
158 #define MDIOC_PREAMBLE 0x00100000
159 #define MDIOC_FAULT 0x00080000
160 #define MDIOC_FAULTDETECT 0x00040000
161 #define MDIOC_INTTEST 0x00020000
162 #define MDIOC_CLKDIV(div) ((div) & 0xff)
165 struct cpmac_int_regs link_int
;
166 struct cpmac_int_regs user_int
;
169 #define MDIO_BUSY 0x80000000
170 #define MDIO_WRITE 0x40000000
171 #define MDIO_REG(reg) (((reg) & 0x1f) << 21)
172 #define MDIO_PHY(phy) (((phy) & 0x1f) << 16)
173 #define MDIO_DATA(data) ((data) & 0xffff)
186 #define CPMAC_SOP 0x8000
187 #define CPMAC_EOP 0x4000
188 #define CPMAC_OWN 0x2000
189 #define CPMAC_EOQ 0x1000
192 struct cpmac_desc
*next
;
196 struct net_device_stats stats
;
198 struct sk_buff
*skb_pool
;
200 struct cpmac_desc
*rx_head
;
201 int tx_head
, tx_tail
;
202 struct cpmac_desc
*desc_ring
;
203 struct cpmac_regs
*regs
;
204 struct mii_bus
*mii_bus
;
205 struct phy_device
*phy
;
206 char phy_name
[BUS_ID_SIZE
];
207 struct plat_cpmac_data
*config
;
208 int oldlink
, oldspeed
, oldduplex
;
210 struct net_device
*dev
;
211 struct work_struct alloc_work
;
214 static irqreturn_t
cpmac_irq(int, void *);
216 #define CPMAC_LOW_THRESH 8
217 #define CPMAC_ALLOC_SIZE 32
218 #define CPMAC_SKB_SIZE 1536
219 #define CPMAC_TX_RING_SIZE 8
220 #define CPMAC_RX_RING_SIZE 16
223 static void cpmac_dump_regs(u32
*base
, int count
)
226 for (i
= 0; i
< (count
+ 3) / 4; i
++) {
227 if (i
% 4 == 0) printk("\nCPMAC[0x%04x]:", i
* 4);
228 printk(" 0x%08x", *(base
+ i
));
234 static int cpmac_mdio_read(struct mii_bus
*bus
, int phy_id
, int regnum
)
236 struct cpmac_mdio_regs
*regs
= (struct cpmac_mdio_regs
*)bus
->priv
;
239 while ((val
= regs
->access
) & MDIO_BUSY
);
240 regs
->access
= MDIO_BUSY
| MDIO_REG(regnum
& 0x1f) |
241 MDIO_PHY(phy_id
& 0x1f);
242 while ((val
= regs
->access
) & MDIO_BUSY
);
247 static int cpmac_mdio_write(struct mii_bus
*bus
, int phy_id
, int regnum
, u16 val
)
249 struct cpmac_mdio_regs
*regs
= (struct cpmac_mdio_regs
*)bus
->priv
;
252 while ((tmp
= regs
->access
) & MDIO_BUSY
);
253 regs
->access
= MDIO_BUSY
| MDIO_WRITE
|
254 MDIO_REG(regnum
& 0x1f) | MDIO_PHY(phy_id
& 0x1f) |
260 static int cpmac_mdio_reset(struct mii_bus
*bus
)
262 struct cpmac_mdio_regs
*regs
= (struct cpmac_mdio_regs
*)bus
->priv
;
264 ar7_device_reset(AR7_RESET_BIT_MDIO
);
265 regs
->control
= MDIOC_ENABLE
|
266 MDIOC_CLKDIV(ar7_cpmac_freq() / 2200000 - 1);
271 static int mii_irqs
[PHY_MAX_ADDR
] = { PHY_POLL
, };
273 static struct mii_bus cpmac_mii
= {
275 .read
= cpmac_mdio_read
,
276 .write
= cpmac_mdio_write
,
277 .reset
= cpmac_mdio_reset
,
281 static int cpmac_config(struct net_device
*dev
, struct ifmap
*map
)
283 if (dev
->flags
& IFF_UP
)
286 /* Don't allow changing the I/O address */
287 if (map
->base_addr
!= dev
->base_addr
)
290 /* ignore other fields */
294 static int cpmac_set_mac_address(struct net_device
*dev
, void *addr
)
296 struct sockaddr
*sa
= addr
;
298 if (dev
->flags
& IFF_UP
)
301 memcpy(dev
->dev_addr
, sa
->sa_data
, dev
->addr_len
);
306 static void cpmac_set_multicast_list(struct net_device
*dev
)
308 struct dev_mc_list
*iter
;
311 int hashlo
= 0, hashhi
= 0;
312 struct cpmac_priv
*priv
= netdev_priv(dev
);
314 if(dev
->flags
& IFF_PROMISC
) {
315 priv
->regs
->mbp
&= ~MBP_PROMISCCHAN(0); /* promisc channel 0 */
316 priv
->regs
->mbp
|= MBP_RXPROMISC
;
318 priv
->regs
->mbp
&= ~MBP_RXPROMISC
;
319 if(dev
->flags
& IFF_ALLMULTI
) {
320 /* enable all multicast mode */
321 priv
->regs
->mac_hash_low
= 0xffffffff;
322 priv
->regs
->mac_hash_high
= 0xffffffff;
324 for(i
= 0, iter
= dev
->mc_list
; i
< dev
->mc_count
;
325 i
++, iter
= iter
->next
) {
327 tmp
= iter
->dmi_addr
[0];
328 hash
^= (tmp
>> 2) ^ (tmp
<< 4);
329 tmp
= iter
->dmi_addr
[1];
330 hash
^= (tmp
>> 4) ^ (tmp
<< 2);
331 tmp
= iter
->dmi_addr
[2];
332 hash
^= (tmp
>> 6) ^ tmp
;
333 tmp
= iter
->dmi_addr
[4];
334 hash
^= (tmp
>> 2) ^ (tmp
<< 4);
335 tmp
= iter
->dmi_addr
[5];
336 hash
^= (tmp
>> 4) ^ (tmp
<< 2);
337 tmp
= iter
->dmi_addr
[6];
338 hash
^= (tmp
>> 6) ^ tmp
;
343 hashhi
|= 1<<(hash
- 32);
347 priv
->regs
->mac_hash_low
= hashlo
;
348 priv
->regs
->mac_hash_high
= hashhi
;
353 static struct sk_buff
*cpmac_get_skb(struct net_device
*dev
)
356 struct cpmac_priv
*priv
= netdev_priv(dev
);
358 skb
= priv
->skb_pool
;
360 priv
->skb_pool
= skb
->next
;
362 if (likely(priv
->free_skbs
))
365 if (priv
->free_skbs
< CPMAC_LOW_THRESH
)
366 schedule_work(&priv
->alloc_work
);
371 static void cpmac_rx(struct net_device
*dev
, int channel
)
375 struct cpmac_desc
*desc
;
376 struct cpmac_priv
*priv
= netdev_priv(dev
);
378 spin_lock(&priv
->lock
);
379 if (unlikely(!priv
->rx_head
))
382 desc
= priv
->rx_head
;
383 dma_cache_inv((u32
)desc
, 16);
385 while((desc
->dataflags
& CPMAC_OWN
) == 0) {
386 priv
->regs
->rx_ack
[0] = virt_to_phys(desc
);
387 if (unlikely(!desc
->datalen
)) {
388 if (printk_ratelimit())
389 printk(KERN_NOTICE
"%s: rx: spurious interrupt\n",
391 priv
->stats
.rx_errors
++;
395 skb
= cpmac_get_skb(dev
);
397 data
= (char *)phys_to_virt(desc
->hw_data
);
398 dma_cache_inv((u32
)data
, desc
->datalen
);
399 skb_put(desc
->skb
, desc
->datalen
);
400 desc
->skb
->protocol
= eth_type_trans(desc
->skb
, dev
);
401 desc
->skb
->ip_summed
= CHECKSUM_NONE
;
402 priv
->stats
.rx_packets
++;
403 priv
->stats
.rx_bytes
+= desc
->datalen
;
407 if (printk_ratelimit())
408 printk(KERN_NOTICE
"%s: rx: no free skbs, dropping packet\n",
410 priv
->stats
.rx_dropped
++;
412 desc
->hw_data
= virt_to_phys(desc
->skb
->data
);
413 desc
->buflen
= CPMAC_SKB_SIZE
;
414 desc
->dataflags
= CPMAC_OWN
;
415 dma_cache_wback((u32
)desc
, 16);
417 dma_cache_inv((u32
)desc
, 16);
420 priv
->rx_head
= desc
;
421 spin_unlock(&priv
->lock
);
422 priv
->regs
->rx_ptr
[0] = virt_to_phys(priv
->rx_head
);
425 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 20)
427 cpmac_alloc_skbs(struct work_struct
*work
)
429 struct cpmac_priv
*priv
= container_of(work
, struct cpmac_priv
,
433 cpmac_alloc_skbs(void *data
)
435 struct net_device
*dev
= (struct net_device
*)data
;
436 struct cpmac_priv
*priv
= netdev_priv(dev
);
440 struct sk_buff
*skb
, *skbs
= NULL
;
442 for (i
= 0; i
< CPMAC_ALLOC_SIZE
; i
++) {
443 skb
= alloc_skb(CPMAC_SKB_SIZE
+ 2, GFP_KERNEL
);
448 skb
->dev
= priv
->dev
;
454 spin_lock_irqsave(&priv
->lock
, flags
);
455 for (skb
= priv
->skb_pool
; skb
&& skb
->next
; skb
= skb
->next
);
457 priv
->skb_pool
= skbs
;
461 priv
->free_skbs
+= num_skbs
;
462 spin_unlock_irqrestore(&priv
->lock
, flags
);
464 printk("%s: allocated %d skbs\n", priv
->dev
->name
, num_skbs
);
469 static int cpmac_start_xmit(struct sk_buff
*skb
, struct net_device
*dev
)
473 struct cpmac_desc
*desc
;
474 struct cpmac_priv
*priv
= netdev_priv(dev
);
477 if (unlikely(len
< ETH_ZLEN
)) {
478 if (unlikely(skb_padto(skb
, ETH_ZLEN
))) {
479 if (printk_ratelimit())
480 printk(KERN_NOTICE
"%s: padding failed, dropping\n",
482 spin_lock_irqsave(&priv
->lock
, flags
);
483 priv
->stats
.tx_dropped
++;
484 spin_unlock_irqrestore(&priv
->lock
, flags
);
489 spin_lock_irqsave(&priv
->lock
, flags
);
490 chan
= priv
->tx_tail
++;
492 if (priv
->tx_tail
== priv
->tx_head
)
493 netif_stop_queue(dev
);
495 desc
= &priv
->desc_ring
[chan
];
496 dev
->trans_start
= jiffies
;
497 desc
->jiffies
= dev
->trans_start
;
498 spin_unlock_irqrestore(&priv
->lock
, flags
);
500 desc
->dataflags
= CPMAC_SOP
| CPMAC_EOP
| CPMAC_OWN
;
502 desc
->hw_data
= virt_to_phys(skb
->data
);
503 dma_cache_wback((u32
)skb
->data
, len
);
507 dma_cache_wback((u32
)desc
, 16);
508 priv
->regs
->tx_ptr
[chan
] = virt_to_phys(desc
);
512 static void cpmac_end_xmit(struct net_device
*dev
, int channel
)
514 struct cpmac_desc
*desc
;
515 struct cpmac_priv
*priv
= netdev_priv(dev
);
517 spin_lock(&priv
->lock
);
518 desc
= &priv
->desc_ring
[channel
];
519 priv
->regs
->tx_ack
[channel
] = virt_to_phys(desc
);
520 if (likely(desc
->skb
)) {
521 priv
->stats
.tx_packets
++;
522 priv
->stats
.tx_bytes
+= desc
->skb
->len
;
523 dev_kfree_skb_irq(desc
->skb
);
524 if (priv
->tx_head
== channel
) {
525 while ((desc
->dataflags
& CPMAC_OWN
) == 0) {
528 if (priv
->tx_head
== priv
->tx_tail
)
530 desc
= &priv
->desc_ring
[priv
->tx_head
];
532 if (netif_queue_stopped(dev
))
533 netif_wake_queue(dev
);
536 if (printk_ratelimit())
537 printk(KERN_NOTICE
"%s: end_xmit: spurious interrupt\n",
540 spin_unlock(&priv
->lock
);
543 static irqreturn_t
cpmac_irq(int irq
, void *dev_id
)
545 struct net_device
*dev
= (struct net_device
*)dev_id
;
546 struct cpmac_priv
*priv
= netdev_priv(dev
);
552 status
= priv
->regs
->mac_int_vector
;
554 if (status
& INTST_TX
) {
555 cpmac_end_xmit(dev
, (status
& 7));
558 if (status
& INTST_RX
) {
559 cpmac_rx(dev
, (status
>> 8) & 7);
562 if (unlikely(status
& INTST_HOST
)) { /* host interrupt ??? */
563 printk("%s: host int, something bad happened...\n", dev
->name
);
564 printk("%s: mac status: 0x%08x\n", dev
->name
,
565 priv
->regs
->mac_status
);
568 if (unlikely(status
& INTST_STATUS
)) { /* status interrupt ??? */
569 printk("%s: status int, what are we gonna do?\n", dev
->name
);
572 priv
->regs
->mac_eoi_vector
= 0;
577 static void cpmac_tx_timeout(struct net_device
*dev
)
579 struct cpmac_priv
*priv
= netdev_priv(dev
);
580 struct cpmac_desc
*desc
;
582 priv
->stats
.tx_errors
++;
583 desc
= &priv
->desc_ring
[priv
->tx_head
++];
585 printk("Transmit timeout at %ld, latency %ld\n", jiffies
,
586 jiffies
- desc
->jiffies
);
588 dev_kfree_skb(desc
->skb
);
589 netif_wake_queue(dev
);
592 static int cpmac_ioctl(struct net_device
*dev
, struct ifreq
*ifr
, int cmd
)
594 struct cpmac_priv
*priv
= netdev_priv(dev
);
595 if (!(netif_running(dev
)))
599 return phy_mii_ioctl(priv
->phy
, if_mii(ifr
), cmd
);
602 static int cpmac_get_settings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
604 struct cpmac_priv
*priv
= netdev_priv(dev
);
607 return phy_ethtool_gset(priv
->phy
, cmd
);
612 static int cpmac_set_settings(struct net_device
*dev
, struct ethtool_cmd
*cmd
)
614 struct cpmac_priv
*priv
= netdev_priv(dev
);
616 if (!capable(CAP_NET_ADMIN
))
620 return phy_ethtool_sset(priv
->phy
, cmd
);
625 static void cpmac_get_drvinfo(struct net_device
*dev
,
626 struct ethtool_drvinfo
*info
)
628 strcpy(info
->driver
, "cpmac");
629 strcpy(info
->version
, "0.0.3");
630 info
->fw_version
[0] = '\0';
631 sprintf(info
->bus_info
, "%s", "cpmac");
632 info
->regdump_len
= 0;
635 static const struct ethtool_ops cpmac_ethtool_ops
= {
636 .get_settings
= cpmac_get_settings
,
637 .set_settings
= cpmac_set_settings
,
638 .get_drvinfo
= cpmac_get_drvinfo
,
639 .get_link
= ethtool_op_get_link
,
642 static struct net_device_stats
*cpmac_stats(struct net_device
*dev
)
644 struct cpmac_priv
*priv
= netdev_priv(dev
);
646 if (netif_device_present(dev
))
652 static int cpmac_change_mtu(struct net_device
*dev
, int mtu
)
655 struct cpmac_priv
*priv
= netdev_priv(dev
);
656 spinlock_t
*lock
= &priv
->lock
;
658 if ((mtu
< 68) || (mtu
> 1500))
661 spin_lock_irqsave(lock
, flags
);
663 spin_unlock_irqrestore(lock
, flags
);
668 static void cpmac_reset(struct net_device
*dev
)
671 struct cpmac_priv
*priv
= netdev_priv(dev
);
673 ar7_device_reset(priv
->config
->reset_bit
);
674 priv
->regs
->rx_ctrl
.control
&= ~1;
675 priv
->regs
->tx_ctrl
.control
&= ~1;
676 for (i
= 0; i
< 8; i
++) {
677 priv
->regs
->tx_ptr
[i
] = 0;
678 priv
->regs
->rx_ptr
[i
] = 0;
680 priv
->regs
->mac_control
&= ~MAC_MII
; /* disable mii */
683 static void cpmac_adjust_link(struct net_device
*dev
)
685 struct cpmac_priv
*priv
= netdev_priv(dev
);
689 spin_lock_irqsave(&priv
->lock
, flags
);
690 if (priv
->phy
->link
) {
691 if (priv
->phy
->duplex
!= priv
->oldduplex
) {
693 priv
->oldduplex
= priv
->phy
->duplex
;
696 if (priv
->phy
->speed
!= priv
->oldspeed
) {
698 priv
->oldspeed
= priv
->phy
->speed
;
701 if (!priv
->oldlink
) {
706 } else if (priv
->oldlink
) {
710 priv
->oldduplex
= -1;
714 phy_print_status(priv
->phy
);
716 spin_unlock_irqrestore(&priv
->lock
, flags
);
719 static int cpmac_open(struct net_device
*dev
)
722 struct cpmac_priv
*priv
= netdev_priv(dev
);
723 struct cpmac_desc
*desc
;
726 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 20)
727 priv
->phy
= phy_connect(dev
, priv
->phy_name
, &cpmac_adjust_link
,
728 0, PHY_INTERFACE_MODE_MII
);
730 priv
->phy
= phy_connect(dev
, priv
->phy_name
, &cpmac_adjust_link
, 0);
732 if (IS_ERR(priv
->phy
)) {
733 printk(KERN_ERR
"%s: Could not attach to PHY\n", dev
->name
);
734 return PTR_ERR(priv
->phy
);
737 if (!request_mem_region(dev
->mem_start
, dev
->mem_end
-
738 dev
->mem_start
, dev
->name
)) {
739 printk("%s: failed to request registers\n",
745 priv
->regs
= ioremap_nocache(dev
->mem_start
, dev
->mem_end
-
748 printk("%s: failed to remap registers\n", dev
->name
);
753 priv
->rx_head
= NULL
;
754 size
= sizeof(struct cpmac_desc
) * (CPMAC_RX_RING_SIZE
+
756 priv
->desc_ring
= (struct cpmac_desc
*)kmalloc(size
, GFP_KERNEL
);
757 if (!priv
->desc_ring
) {
762 memset((char *)priv
->desc_ring
, 0, size
);
764 priv
->skb_pool
= NULL
;
766 priv
->rx_head
= &priv
->desc_ring
[CPMAC_TX_RING_SIZE
];
768 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 20)
769 INIT_WORK(&priv
->alloc_work
, cpmac_alloc_skbs
);
771 INIT_WORK(&priv
->alloc_work
, cpmac_alloc_skbs
, dev
);
773 schedule_work(&priv
->alloc_work
);
774 flush_scheduled_work();
776 for (i
= 0; i
< CPMAC_RX_RING_SIZE
; i
++) {
777 desc
= &priv
->rx_head
[i
];
778 skb
= cpmac_get_skb(dev
);
784 desc
->hw_data
= virt_to_phys(skb
->data
);
785 desc
->buflen
= CPMAC_SKB_SIZE
;
786 desc
->dataflags
= CPMAC_OWN
;
787 desc
->next
= &priv
->rx_head
[i
+ 1];
788 desc
->hw_next
= virt_to_phys(desc
->next
);
789 dma_cache_wback((u32
)desc
, 16);
791 priv
->rx_head
[CPMAC_RX_RING_SIZE
- 1].next
= priv
->rx_head
;
792 priv
->rx_head
[CPMAC_RX_RING_SIZE
- 1].hw_next
=
793 virt_to_phys(priv
->rx_head
);
796 for (i
= 0; i
< 8; i
++)
797 priv
->regs
->tx_ptr
[i
] = 0;
798 priv
->regs
->rx_ptr
[0] = virt_to_phys(priv
->rx_head
);
800 priv
->regs
->mbp
= MBP_RXSHORT
| MBP_RXBCAST
| MBP_RXMCAST
;
801 priv
->regs
->unicast_enable
= 0x1;
802 priv
->regs
->unicast_clear
= 0xfe;
803 priv
->regs
->buffer_offset
= 0;
804 for (i
= 0; i
< 8; i
++)
805 priv
->regs
->mac_addr_low
[i
] = dev
->dev_addr
[5];
806 priv
->regs
->mac_addr_mid
= dev
->dev_addr
[4];
807 priv
->regs
->mac_addr_high
= dev
->dev_addr
[0] | (dev
->dev_addr
[1] << 8)
808 | (dev
->dev_addr
[2] << 16) | (dev
->dev_addr
[3] << 24);
809 priv
->regs
->max_len
= CPMAC_SKB_SIZE
;
810 priv
->regs
->rx_int
.enable
= 0x1;
811 priv
->regs
->rx_int
.clear
= 0xfe;
812 priv
->regs
->tx_int
.enable
= 0xff;
813 priv
->regs
->tx_int
.clear
= 0;
814 priv
->regs
->mac_int_enable
= 3;
815 priv
->regs
->mac_int_clear
= 0xfc;
817 if((res
= request_irq(dev
->irq
, cpmac_irq
, SA_INTERRUPT
,
819 printk("%s: failed to obtain irq\n", dev
->name
);
823 priv
->regs
->rx_ctrl
.control
|= 1;
824 priv
->regs
->tx_ctrl
.control
|= 1;
825 priv
->regs
->mac_control
|= MAC_MII
| MAC_FDX
;
827 priv
->phy
->state
= PHY_CHANGELINK
;
828 phy_start(priv
->phy
);
830 netif_start_queue(dev
);
836 for (i
= 0; i
< CPMAC_RX_RING_SIZE
; i
++)
837 if (priv
->rx_head
[i
].skb
)
838 kfree_skb(priv
->rx_head
[i
].skb
);
840 kfree(priv
->desc_ring
);
842 for (skb
= priv
->skb_pool
; skb
; skb
= priv
->skb_pool
) {
843 priv
->skb_pool
= skb
->next
;
850 release_mem_region(dev
->mem_start
, dev
->mem_end
-
854 phy_disconnect(priv
->phy
);
859 static int cpmac_stop(struct net_device
*dev
)
863 struct cpmac_priv
*priv
= netdev_priv(dev
);
865 netif_stop_queue(dev
);
868 phy_disconnect(priv
->phy
);
873 for (i
= 0; i
< 8; i
++) {
874 priv
->regs
->rx_ptr
[i
] = 0;
875 priv
->regs
->tx_ptr
[i
] = 0;
879 free_irq(dev
->irq
, dev
);
880 release_mem_region(dev
->mem_start
, dev
->mem_end
-
883 cancel_delayed_work(&priv
->alloc_work
);
884 flush_scheduled_work();
886 priv
->rx_head
= &priv
->desc_ring
[CPMAC_TX_RING_SIZE
];
887 for (i
= 0; i
< CPMAC_RX_RING_SIZE
; i
++)
888 if (priv
->rx_head
[i
].skb
)
889 kfree_skb(priv
->rx_head
[i
].skb
);
891 kfree(priv
->desc_ring
);
893 for (skb
= priv
->skb_pool
; skb
; skb
= priv
->skb_pool
) {
894 priv
->skb_pool
= skb
->next
;
901 static int external_switch
= 0;
903 static int __devinit
cpmac_probe(struct platform_device
*pdev
)
906 struct resource
*res
;
907 struct cpmac_priv
*priv
;
908 struct net_device
*dev
;
909 struct plat_cpmac_data
*pdata
;
911 if (strcmp(pdev
->name
, "cpmac") != 0)
914 pdata
= pdev
->dev
.platform_data
;
916 for (phy_id
= 0; phy_id
< PHY_MAX_ADDR
; phy_id
++) {
917 if (!(pdata
->phy_mask
& (1 << phy_id
)))
919 if (!cpmac_mii
.phy_map
[phy_id
])
924 if (phy_id
== PHY_MAX_ADDR
) {
925 if (external_switch
) {
928 printk("cpmac: no PHY present\n");
933 dev
= alloc_etherdev(sizeof(struct cpmac_priv
));
936 printk(KERN_ERR
"cpmac: Unable to allocate net_device structure!\n");
940 SET_MODULE_OWNER(dev
);
941 platform_set_drvdata(pdev
, dev
);
942 priv
= netdev_priv(dev
);
944 res
= platform_get_resource_byname(pdev
, IORESOURCE_MEM
, "regs");
950 dev
->mem_start
= res
->start
;
951 dev
->mem_end
= res
->end
;
952 dev
->irq
= platform_get_irq_byname(pdev
, "irq");
955 dev
->open
= cpmac_open
;
956 dev
->stop
= cpmac_stop
;
957 dev
->set_config
= cpmac_config
;
958 dev
->hard_start_xmit
= cpmac_start_xmit
;
959 dev
->do_ioctl
= cpmac_ioctl
;
960 dev
->get_stats
= cpmac_stats
;
961 dev
->change_mtu
= cpmac_change_mtu
;
962 dev
->set_mac_address
= cpmac_set_mac_address
;
963 dev
->set_multicast_list
= cpmac_set_multicast_list
;
964 dev
->tx_timeout
= cpmac_tx_timeout
;
965 dev
->ethtool_ops
= &cpmac_ethtool_ops
;
967 memset(priv
, 0, sizeof(struct cpmac_priv
));
968 spin_lock_init(&priv
->lock
);
969 priv
->msg_enable
= netif_msg_init(NETIF_MSG_WOL
, 0x3fff);
970 priv
->config
= pdata
;
972 memcpy(dev
->dev_addr
, priv
->config
->dev_addr
, sizeof(dev
->dev_addr
));
974 snprintf(priv
->phy_name
, BUS_ID_SIZE
, PHY_ID_FMT
,
975 cpmac_mii
.id
, phy_id
);
977 snprintf(priv
->phy_name
, BUS_ID_SIZE
, "fixed@%d:%d", 100, 1);
980 if ((rc
= register_netdev(dev
))) {
981 printk("cpmac: error %i registering device %s\n",
986 printk("cpmac: device %s (regs: %p, irq: %d, phy: %s, mac: ",
987 dev
->name
, (u32
*)dev
->mem_start
, dev
->irq
,
989 for (i
= 0; i
< 6; i
++) {
990 printk("%02x", dev
->dev_addr
[i
]);
991 if (i
< 5) printk(":");
1002 static int __devexit
cpmac_remove(struct platform_device
*pdev
)
1004 struct net_device
*dev
= platform_get_drvdata(pdev
);
1005 unregister_netdev(dev
);
1010 static struct platform_driver cpmac_driver
= {
1011 .driver
.name
= "cpmac",
1012 .probe
= cpmac_probe
,
1013 .remove
= cpmac_remove
,
1016 int __devinit
cpmac_init(void)
1020 cpmac_mii
.priv
= (struct cpmac_mdio_regs
*)
1021 ioremap_nocache(AR7_REGS_MDIO
, sizeof(struct cpmac_mdio_regs
));
1023 if (!cpmac_mii
.priv
) {
1024 printk("Can't ioremap mdio registers\n");
1028 #warning FIXME: unhardcode gpio&reset bits
1029 ar7_gpio_disable(26);
1030 ar7_gpio_disable(27);
1031 ar7_device_reset(17);
1032 ar7_device_reset(21);
1033 ar7_device_reset(26);
1035 cpmac_mii
.reset(&cpmac_mii
);
1037 for (i
= 0; i
< 300000; i
++) {
1038 mask
= ((struct cpmac_mdio_regs
*)cpmac_mii
.priv
)->alive
;
1044 if (mask
& (mask
- 1)) {
1045 external_switch
= 1;
1049 cpmac_mii
.phy_mask
= ~(mask
| 0x80000000);
1051 res
= mdiobus_register(&cpmac_mii
);
1055 res
= platform_driver_register(&cpmac_driver
);
1062 mdiobus_unregister(&cpmac_mii
);
1065 iounmap(cpmac_mii
.priv
);
1070 void __devexit
cpmac_exit(void)
1072 platform_driver_unregister(&cpmac_driver
);
1073 mdiobus_unregister(&cpmac_mii
);
1076 module_init(cpmac_init
);
1077 module_exit(cpmac_exit
);