1 From 7d6656dc127b54e53e507e8f264bb7e14e620cad Mon Sep 17 00:00:00 2001
2 From: Axel Gembe <ago@bastart.eu.org>
3 Date: Sat, 17 May 2008 15:02:39 +0200
4 Subject: [PATCH] bcm963xx: add new timer code
6 This basically selects the new generic MIPS timer code for BCM963xx and
7 simplifies the timer setup code.
9 Signed-off-by: Axel Gembe <ago@bastart.eu.org>
11 arch/mips/Kconfig | 2 +
12 arch/mips/bcm963xx/time.c | 64 ++++++++++++++++++++------------------------
13 2 files changed, 31 insertions(+), 35 deletions(-)
15 --- a/arch/mips/Kconfig
16 +++ b/arch/mips/Kconfig
19 select DMA_NONCOHERENT
24 This is a fmaily of boards based on the Broadcom MIPS32
26 --- a/arch/mips/bcm963xx/time.c
27 +++ b/arch/mips/bcm963xx/time.c
31 Copyright 2004 Broadcom Corp. All Rights Reserved.
32 + Copyright (C) 2008 Axel Gembe <ago@bastart.eu.org>
34 This program is free software; you can distribute it and/or modify it
35 under the terms of the GNU General Public License (Version 2) as
37 #include <bcm_map_part.h>
40 -static unsigned long r4k_offset; /* Amount to increment compare reg each time */
41 -static unsigned long r4k_cur; /* What counter should be at next timer irq */
43 -/* *********************************************************************
44 - * calculateCpuSpeed()
45 - * Calculate the BCM6348 CPU speed by reading the PLL strap register
46 - * and applying the following formula:
47 - * cpu_clk = (.25 * 64MHz freq) * (N1 + 1) * (N2 + 2) / (M1_CPU + 1)
52 - ********************************************************************* */
55 + * calculateCpuSpeed()
57 + * Calculate the BCM6348 CPU speed by reading the PLL strap register and applying
58 + * the following formula:
60 + * cpu_clk = (.25 * 64MHz freq) * (N1 + 1) * (N2 + 2) / (M1_CPU + 1)
62 static inline unsigned long __init calculateCpuSpeed(void)
64 - u32 pllStrap = PERF->PllStrap;
65 - int n1 = (pllStrap & PLL_N1_MASK) >> PLL_N1_SHFT;
66 - int n2 = (pllStrap & PLL_N2_MASK) >> PLL_N2_SHFT;
67 - int m1cpu = (pllStrap & PLL_M1_CPU_MASK) >> PLL_M1_CPU_SHFT;
71 + pllStrap = PERF->PllStrap;
72 + n1 = (pllStrap & PLL_N1_MASK) >> PLL_N1_SHFT;
73 + n2 = (pllStrap & PLL_N2_MASK) >> PLL_N2_SHFT;
74 + m1cpu = (pllStrap & PLL_M1_CPU_MASK) >> PLL_M1_CPU_SHFT;
76 return (16 * (n1 + 1) * (n2 + 2) / (m1cpu + 1)) * 1000000;
80 -static inline unsigned long __init cal_r4koff(void)
82 - mips_hpt_frequency = calculateCpuSpeed() / 2;
83 - return (mips_hpt_frequency / HZ);
86 void __init plat_time_init(void)
88 - unsigned int est_freq, flags;
89 - local_irq_save(flags);
90 + unsigned long cpu_clock;
92 + cpu_clock = calculateCpuSpeed();
94 + printk("CPU frequency %lu.%02lu MHz\n", cpu_clock / 1000000,
95 + (cpu_clock % 1000000) * 100 / 1000000);
97 + mips_hpt_frequency = cpu_clock / 2;
99 - printk("calculating r4koff... ");
100 - r4k_offset = cal_r4koff();
101 - printk("%08lx(%d)\n", r4k_offset, (int)r4k_offset);
103 - est_freq = 2 * r4k_offset * HZ;
104 - est_freq += 5000; /* round */
105 - est_freq -= est_freq % 10000;
106 - printk("CPU frequency %d.%02d MHz\n", est_freq / 1000000,
107 - (est_freq % 1000000) * 100 / 1000000);
108 - local_irq_restore(flags);
110 + * Use deterministic values for initial counter interrupt
111 + * so that calibrate delay avoids encountering a counter wrap.
114 + write_c0_compare(0xffff);