target/linux/rb532/files/include/asm-mips/rc32434/eth.h

   1 #ifndef __IDT_ETH_H__
   2 #define __IDT_ETH_H__
   3
   4 /*******************************************************************************
   5  *
   6  * Copyright 2002 Integrated Device Technology, Inc.
   7  *              All rights reserved.
   8  *
   9  * Ethernet register definition.
  10  *
  11  * File   : $Id: eth.h,v 1.3 2002/06/06 18:34:04 astichte Exp $
  12  *
  13  * Author : Allen.Stichter@idt.com
  14  * Date   : 20020605
  15  * Update :
  16  *          $Log: eth.h,v $
  17  *          Revision 1.3  2002/06/06 18:34:04  astichte
  18  *          Added XXX_PhysicalAddress and XXX_VirtualAddress
  19  *
  20  *          Revision 1.2  2002/06/05 18:19:46  astichte
  21  *          Added
  22  *
  23  *          Revision 1.1  2002/05/29 17:33:22  sysarch
  24  *          jba File moved from vcode/include/idt/acacia
  25  *
  26  ******************************************************************************/
  27
  28 enum
  29 {
  30         ETH0_PhysicalAddress    = 0x18060000,
  31         ETH_PhysicalAddress     = ETH0_PhysicalAddress,         // Default
  32
  33         ETH0_VirtualAddress     = 0xb8060000,
  34         ETH_VirtualAddress      = ETH0_VirtualAddress,          // Default
  35 } ;
  36
  37 typedef struct
  38 {
  39         u32 ethintfc            ;
  40         u32 ethfifott           ;
  41         u32 etharc              ;
  42         u32 ethhash0            ;
  43         u32 ethhash1            ;
  44         u32 ethu0 [4]           ;       // Reserved.
  45         u32 ethpfs              ;
  46         u32 ethmcp              ;
  47         u32 eth_u1 [10]         ;       // Reserved.
  48         u32 ethspare            ;
  49         u32 eth_u2 [42]         ;       // Reserved.
  50         u32 ethsal0             ;
  51         u32 ethsah0             ;
  52         u32 ethsal1             ;
  53         u32 ethsah1             ;
  54         u32 ethsal2             ;
  55         u32 ethsah2             ;
  56         u32 ethsal3             ;
  57         u32 ethsah3             ;
  58         u32 ethrbc              ;
  59         u32 ethrpc              ;
  60         u32 ethrupc             ;
  61         u32 ethrfc              ;
  62         u32 ethtbc              ;
  63         u32 ethgpf              ;
  64         u32 eth_u9 [50]         ;       // Reserved.
  65         u32 ethmac1             ;
  66         u32 ethmac2             ;
  67         u32 ethipgt             ;
  68         u32 ethipgr             ;
  69         u32 ethclrt             ;
  70         u32 ethmaxf             ;
  71         u32 eth_u10             ;       // Reserved.
  72         u32 ethmtest            ;
  73         u32 miimcfg             ;
  74         u32 miimcmd             ;
  75         u32 miimaddr            ;
  76         u32 miimwtd             ;
  77         u32 miimrdd             ;
  78         u32 miimind             ;
  79         u32 eth_u11             ;       // Reserved.
  80         u32 eth_u12             ;       // Reserved.
  81         u32 ethcfsa0            ;
  82         u32 ethcfsa1            ;
  83         u32 ethcfsa2            ;
  84 } volatile *ETH_t;
  85
  86 enum
  87 {
  88         ETHINTFC_en_b           = 0,
  89         ETHINTFC_en_m           = 0x00000001,
  90         ETHINTFC_its_b          = 1,
  91         ETHINTFC_its_m          = 0x00000002,
  92         ETHINTFC_rip_b          = 2,
  93         ETHINTFC_rip_m          = 0x00000004,
  94         ETHINTFC_jam_b          = 3,
  95         ETHINTFC_jam_m          = 0x00000008,
  96         ETHINTFC_ovr_b          = 4,
  97         ETHINTFC_ovr_m          = 0x00000010,
  98         ETHINTFC_und_b          = 5,
  99         ETHINTFC_und_m          = 0x00000020,
 100         ETHINTFC_iom_b          = 6,
 101         ETHINTFC_iom_m          = 0x000000c0,
 102
 103         ETHFIFOTT_tth_b         = 0,
 104         ETHFIFOTT_tth_m         = 0x0000007f,
 105
 106         ETHARC_pro_b            = 0,
 107         ETHARC_pro_m            = 0x00000001,
 108         ETHARC_am_b             = 1,
 109         ETHARC_am_m             = 0x00000002,
 110         ETHARC_afm_b            = 2,
 111         ETHARC_afm_m            = 0x00000004,
 112         ETHARC_ab_b             = 3,
 113         ETHARC_ab_m             = 0x00000008,
 114
 115         ETHSAL_byte5_b          = 0,
 116         ETHSAL_byte5_m          = 0x000000ff,
 117         ETHSAL_byte4_b          = 8,
 118         ETHSAL_byte4_m          = 0x0000ff00,
 119         ETHSAL_byte3_b          = 16,
 120         ETHSAL_byte3_m          = 0x00ff0000,
 121         ETHSAL_byte2_b          = 24,
 122         ETHSAL_byte2_m          = 0xff000000,
 123
 124         ETHSAH_byte1_b          = 0,
 125         ETHSAH_byte1_m          = 0x000000ff,
 126         ETHSAH_byte0_b          = 8,
 127         ETHSAH_byte0_m          = 0x0000ff00,
 128
 129         ETHGPF_ptv_b            = 0,
 130         ETHGPF_ptv_m            = 0x0000ffff,
 131
 132         ETHPFS_pfd_b            = 0,
 133         ETHPFS_pfd_m            = 0x00000001,
 134
 135         ETHCFSA0_cfsa4_b        = 0,
 136         ETHCFSA0_cfsa4_m        = 0x000000ff,
 137         ETHCFSA0_cfsa5_b        = 8,
 138         ETHCFSA0_cfsa5_m        = 0x0000ff00,
 139
 140         ETHCFSA1_cfsa2_b        = 0,
 141         ETHCFSA1_cfsa2_m        = 0x000000ff,
 142         ETHCFSA1_cfsa3_b        = 8,
 143         ETHCFSA1_cfsa3_m        = 0x0000ff00,
 144
 145         ETHCFSA2_cfsa0_b        = 0,
 146         ETHCFSA2_cfsa0_m        = 0x000000ff,
 147         ETHCFSA2_cfsa1_b        = 8,
 148         ETHCFSA2_cfsa1_m        = 0x0000ff00,
 149
 150         ETHMAC1_re_b            = 0,
 151         ETHMAC1_re_m            = 0x00000001,
 152         ETHMAC1_paf_b           = 1,
 153         ETHMAC1_paf_m           = 0x00000002,
 154         ETHMAC1_rfc_b           = 2,
 155         ETHMAC1_rfc_m           = 0x00000004,
 156         ETHMAC1_tfc_b           = 3,
 157         ETHMAC1_tfc_m           = 0x00000008,
 158         ETHMAC1_lb_b            = 4,
 159         ETHMAC1_lb_m            = 0x00000010,
 160         ETHMAC1_mr_b            = 31,
 161         ETHMAC1_mr_m            = 0x80000000,
 162
 163         ETHMAC2_fd_b            = 0,
 164         ETHMAC2_fd_m            = 0x00000001,
 165         ETHMAC2_flc_b           = 1,
 166         ETHMAC2_flc_m           = 0x00000002,
 167         ETHMAC2_hfe_b           = 2,
 168         ETHMAC2_hfe_m           = 0x00000004,
 169         ETHMAC2_dc_b            = 3,
 170         ETHMAC2_dc_m            = 0x00000008,
 171         ETHMAC2_cen_b           = 4,
 172         ETHMAC2_cen_m           = 0x00000010,
 173         ETHMAC2_pe_b            = 5,
 174         ETHMAC2_pe_m            = 0x00000020,
 175         ETHMAC2_vpe_b           = 6,
 176         ETHMAC2_vpe_m           = 0x00000040,
 177         ETHMAC2_ape_b           = 7,
 178         ETHMAC2_ape_m           = 0x00000080,
 179         ETHMAC2_ppe_b           = 8,
 180         ETHMAC2_ppe_m           = 0x00000100,
 181         ETHMAC2_lpe_b           = 9,
 182         ETHMAC2_lpe_m           = 0x00000200,
 183         ETHMAC2_nb_b            = 12,
 184         ETHMAC2_nb_m            = 0x00001000,
 185         ETHMAC2_bp_b            = 13,
 186         ETHMAC2_bp_m            = 0x00002000,
 187         ETHMAC2_ed_b            = 14,
 188         ETHMAC2_ed_m            = 0x00004000,
 189
 190         ETHIPGT_ipgt_b          = 0,
 191         ETHIPGT_ipgt_m          = 0x0000007f,
 192
 193         ETHIPGR_ipgr2_b         = 0,
 194         ETHIPGR_ipgr2_m         = 0x0000007f,
 195         ETHIPGR_ipgr1_b         = 8,
 196         ETHIPGR_ipgr1_m         = 0x00007f00,
 197
 198         ETHCLRT_maxret_b        = 0,
 199         ETHCLRT_maxret_m        = 0x0000000f,
 200         ETHCLRT_colwin_b        = 8,
 201         ETHCLRT_colwin_m        = 0x00003f00,
 202
 203         ETHMAXF_maxf_b          = 0,
 204         ETHMAXF_maxf_m          = 0x0000ffff,
 205
 206         ETHMTEST_tb_b           = 2,
 207         ETHMTEST_tb_m           = 0x00000004,
 208
 209         ETHMCP_div_b            = 0,
 210         ETHMCP_div_m            = 0x000000ff,
 211
 212         MIIMCFG_rsv_b           = 0,
 213         MIIMCFG_rsv_m           = 0x0000000c,
 214
 215         MIIMCMD_rd_b            = 0,
 216         MIIMCMD_rd_m            = 0x00000001,
 217         MIIMCMD_scn_b           = 1,
 218         MIIMCMD_scn_m           = 0x00000002,
 219
 220         MIIMADDR_regaddr_b      = 0,
 221         MIIMADDR_regaddr_m      = 0x0000001f,
 222         MIIMADDR_phyaddr_b      = 8,
 223         MIIMADDR_phyaddr_m      = 0x00001f00,
 224
 225         MIIMWTD_wdata_b         = 0,
 226         MIIMWTD_wdata_m         = 0x0000ffff,
 227
 228         MIIMRDD_rdata_b         = 0,
 229         MIIMRDD_rdata_m         = 0x0000ffff,
 230
 231         MIIMIND_bsy_b           = 0,
 232         MIIMIND_bsy_m           = 0x00000001,
 233         MIIMIND_scn_b           = 1,
 234         MIIMIND_scn_m           = 0x00000002,
 235         MIIMIND_nv_b            = 2,
 236         MIIMIND_nv_m            = 0x00000004,
 237
 238 } ;
 239
 240 /*
 241  * Values for the DEVCS field of the Ethernet DMA Rx and Tx descriptors.
 242  */
 243 enum
 244 {
 245         ETHRX_fd_b              = 0,
 246         ETHRX_fd_m              = 0x00000001,
 247         ETHRX_ld_b              = 1,
 248         ETHRX_ld_m              = 0x00000002,
 249         ETHRX_rok_b             = 2,
 250         ETHRX_rok_m             = 0x00000004,
 251         ETHRX_fm_b              = 3,
 252         ETHRX_fm_m              = 0x00000008,
 253         ETHRX_mp_b              = 4,
 254         ETHRX_mp_m              = 0x00000010,
 255         ETHRX_bp_b              = 5,
 256         ETHRX_bp_m              = 0x00000020,
 257         ETHRX_vlt_b             = 6,
 258         ETHRX_vlt_m             = 0x00000040,
 259         ETHRX_cf_b              = 7,
 260         ETHRX_cf_m              = 0x00000080,
 261         ETHRX_ovr_b             = 8,
 262         ETHRX_ovr_m             = 0x00000100,
 263         ETHRX_crc_b             = 9,
 264         ETHRX_crc_m             = 0x00000200,
 265         ETHRX_cv_b              = 10,
 266         ETHRX_cv_m              = 0x00000400,
 267         ETHRX_db_b              = 11,
 268         ETHRX_db_m              = 0x00000800,
 269         ETHRX_le_b              = 12,
 270         ETHRX_le_m              = 0x00001000,
 271         ETHRX_lor_b             = 13,
 272         ETHRX_lor_m             = 0x00002000,
 273         ETHRX_ces_b             = 14,
 274         ETHRX_ces_m             = 0x00004000,
 275         ETHRX_length_b          = 16,
 276         ETHRX_length_m          = 0xffff0000,
 277
 278         ETHTX_fd_b              = 0,
 279         ETHTX_fd_m              = 0x00000001,
 280         ETHTX_ld_b              = 1,
 281         ETHTX_ld_m              = 0x00000002,
 282         ETHTX_oen_b             = 2,
 283         ETHTX_oen_m             = 0x00000004,
 284         ETHTX_pen_b             = 3,
 285         ETHTX_pen_m             = 0x00000008,
 286         ETHTX_cen_b             = 4,
 287         ETHTX_cen_m             = 0x00000010,
 288         ETHTX_hen_b             = 5,
 289         ETHTX_hen_m             = 0x00000020,
 290         ETHTX_tok_b             = 6,
 291         ETHTX_tok_m             = 0x00000040,
 292         ETHTX_mp_b              = 7,
 293         ETHTX_mp_m              = 0x00000080,
 294         ETHTX_bp_b              = 8,
 295         ETHTX_bp_m              = 0x00000100,
 296         ETHTX_und_b             = 9,
 297         ETHTX_und_m             = 0x00000200,
 298         ETHTX_of_b              = 10,
 299         ETHTX_of_m              = 0x00000400,
 300         ETHTX_ed_b              = 11,
 301         ETHTX_ed_m              = 0x00000800,
 302         ETHTX_ec_b              = 12,
 303         ETHTX_ec_m              = 0x00001000,
 304         ETHTX_lc_b              = 13,
 305         ETHTX_lc_m              = 0x00002000,
 306         ETHTX_td_b              = 14,
 307         ETHTX_td_m              = 0x00004000,
 308         ETHTX_crc_b             = 15,
 309         ETHTX_crc_m             = 0x00008000,
 310         ETHTX_le_b              = 16,
 311         ETHTX_le_m              = 0x00010000,
 312         ETHTX_cc_b              = 17,
 313         ETHTX_cc_m              = 0x001E0000,
 314 } ;
 315
 316 #endif  // __IDT_ETH_H__
 317
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