target/linux/coldfire/patches/060-m547x_8x_move_memmap.patch

   1 From 961a1f1ccbb2121a4e650cd64ca1f5c15b232e18 Mon Sep 17 00:00:00 2001
   2 From: Kurt Mahan <kmahan@freescale.com>
   3 Date: Thu, 29 May 2008 22:03:08 -0600
   4 Subject: [PATCH] Update M547x/M548x memory map.
   5
   6 - Move internal memory
   7   0xF0000000 MBAR
   8   0xF1000000 MMUBAR
   9   0xF3000000 RAMBAR0
  10   0xF3001000 RAMBAR1
  11
  12 - Move KMAP area
  13   0xD0000000 -> 0xDFFFFFFF
  14
  15 - Update pagefault code for KMAP area
  16
  17 LTIBName: m547x-8x-move-memmap
  18 Signed-off-by: Kurt Mahan <kmahan@freescale.com>
  19 ---
  20  arch/m68k/coldfire/head.S   |    2 +-
  21  arch/m68k/mm/cf-mmu.c       |   20 ++++++++++----------
  22  arch/m68k/mm/kmap.c         |   18 +++++++++++++++---
  23  include/asm-m68k/coldfire.h |    8 ++++----
  24  include/asm-m68k/pgtable.h  |    4 ++--
  25  5 files changed, 32 insertions(+), 20 deletions(-)
  26
  27 --- a/arch/m68k/coldfire/head.S
  28 +++ b/arch/m68k/coldfire/head.S
  29 @@ -87,7 +87,7 @@
  30  #else
  31  #if defined(CONFIG_M54455)
  32  #elif defined(CONFIG_M547X_8X)
  33 -#define ACR0_DEFAULT   #0xE000C040   /* ACR0 default value */
  34 +#define ACR0_DEFAULT   #0xF00FC040   /* ACR0 default value */
  35  #define ACR1_DEFAULT   #0x000FA008   /* ACR1 default value */
  36  #define ACR2_DEFAULT   #0x00000000   /* ACR2 default value */
  37  #define ACR3_DEFAULT   #0x000FA008   /* ACR3 default value */
  38 --- a/arch/m68k/mm/cf-mmu.c
  39 +++ b/arch/m68k/mm/cf-mmu.c
  40 @@ -35,11 +35,9 @@
  41  #include <asm/coldfire.h>
  42  #include <asm/tlbflush.h>
  43
  44 -#if PAGE_OFFSET == CONFIG_SDRAM_BASE
  45 -#define        KERNRAM(x) ((x >= PAGE_OFFSET) && (x < (PAGE_OFFSET + CONFIG_SDRAM_SIZE)))
  46 -#else
  47 -#define        KERNRAM(x) (x >= PAGE_OFFSET)
  48 -#endif
  49 +#define KMAPAREA(x)    ((x >= KMAP_START) && ( x < KMAP_END))
  50 +
  51 +#undef DEBUG
  52
  53  mm_context_t next_mmu_context;
  54  unsigned long context_map[LAST_CONTEXT / BITS_PER_LONG + 1];
  55 @@ -162,7 +160,7 @@ int cf_tlb_miss(struct pt_regs *regs, in
  56         mmuar = ( dtlb ) ? regs->mmuar
  57                          : regs->pc + (extension_word * sizeof(long));
  58
  59 -        mm = (!user_mode(regs) && KERNRAM(mmuar)) ? &init_mm : current->mm;
  60 +        mm = (!user_mode(regs) && KMAPAREA(mmuar)) ? &init_mm : current->mm;
  61
  62          if (!mm) {
  63             local_irq_restore(flags);
  64 @@ -181,7 +179,7 @@ int cf_tlb_miss(struct pt_regs *regs, in
  65             return (-1);
  66         }
  67
  68 -       pte = (KERNRAM(mmuar)) ? pte_offset_kernel(pmd, mmuar)
  69 +       pte = (KMAPAREA(mmuar)) ? pte_offset_kernel(pmd, mmuar)
  70                                : pte_offset_map(pmd, mmuar);
  71         if (pte_none(*pte) || !pte_present(*pte)) {
  72             local_irq_restore(flags);
  73 @@ -198,7 +196,7 @@ int cf_tlb_miss(struct pt_regs *regs, in
  74
  75          set_pte(pte, pte_mkyoung(*pte));
  76          asid = mm->context & 0xff;
  77 -        if (!pte_dirty(*pte) && !KERNRAM(mmuar))
  78 +        if (!pte_dirty(*pte) && !KMAPAREA(mmuar))
  79             set_pte(pte, pte_wrprotect(*pte));
  80
  81          *MMUTR = (mmuar & PAGE_MASK) | (asid << CF_ASID_MMU_SHIFT)
  82 @@ -216,8 +214,10 @@ int cf_tlb_miss(struct pt_regs *regs, in
  83
  84         asm("nop");
  85
  86 -       /*printk("cf_tlb_miss: va=%lx, pa=%lx\n", (mmuar & PAGE_MASK),
  87 -                 (pte_val(*pte)  & PAGE_MASK));*/
  88 +#ifdef DEBUG
  89 +       printk("cf_tlb_miss: va=%lx, pa=%lx\n", (mmuar & PAGE_MASK),
  90 +                 (pte_val(*pte)  & PAGE_MASK));
  91 +#endif
  92         local_irq_restore(flags);
  93          return (0);
  94  }
  95 --- a/arch/m68k/mm/kmap.c
  96 +++ b/arch/m68k/mm/kmap.c
  97 @@ -135,10 +135,22 @@ void __iomem *__ioremap(unsigned long ph
  98
  99  #ifdef CONFIG_M54455
 100         if (physaddr >= 0xf0000000) {
 101 -               /* short circuit mappings for xf0000000 */
 102 -#ifdef DEBUG
 103 -               printk(KERN_INFO "ioremap: short circuiting 0x%lx mapping\n", physaddr);
 104 +               /*
 105 +                * On the M5445x processors an ACR is setup to map
 106 +                * the 0xF0000000 range into kernel memory as
 107 +                * non-cacheable.
 108 +                */
 109 +               return (void __iomem *)physaddr;
 110 +       }
 111  #endif
 112 +
 113 +#ifdef CONFIG_M547X_8X
 114 +       if (physaddr >= 0xf0000000) {
 115 +               /*
 116 +                * On the M547x/M548x processors an ACR is setup to map
 117 +                * the 0xF0000000 range into kernel memory as
 118 +                * non-cacheable.
 119 +                */
 120                 return (void __iomem *)physaddr;
 121         }
 122  #endif
 123 --- a/include/asm-m68k/coldfire.h
 124 +++ b/include/asm-m68k/coldfire.h
 125 @@ -6,10 +6,10 @@
 126  #define MCF_RAMBAR1    0x40000000
 127  #define MCF_SRAM       0x80000000
 128  #elif defined(CONFIG_M547X_8X)
 129 -#define MCF_MBAR       0xE0000000
 130 -#define MCF_MMUBAR     0xE1000000
 131 -#define MCF_RAMBAR0    0xE3000000
 132 -#define MCF_RAMBAR1    0xE3001000
 133 +#define MCF_MBAR       0xF0000000
 134 +#define MCF_MMUBAR     0xF1000000
 135 +#define MCF_RAMBAR0    0xF3000000
 136 +#define MCF_RAMBAR1    0xF3001000
 137  #endif
 138
 139  #define MCF_CLK        CONFIG_MCFCLK
 140 --- a/include/asm-m68k/pgtable.h
 141 +++ b/include/asm-m68k/pgtable.h
 142 @@ -73,8 +73,8 @@
 143  #define KMAP_START     0x0DC00000
 144  #define KMAP_END       0x0E000000
 145  #elif defined(CONFIG_COLDFIRE)
 146 -#define KMAP_START     0xe0000000
 147 -#define KMAP_END       0xf0000000
 148 +#define KMAP_START     0xd0000000
 149 +#define KMAP_END       0xe0000000
 150  #else
 151  #define        KMAP_START      0xd0000000
 152  #define        KMAP_END        0xf0000000