package/p54/src/p54pci.c

   1
   2 /*
   3  * Linux device driver for PCI based Prism54
   4  *
   5  * Copyright (c) 2006, Michael Wu <flamingice@sourmilk.net>
   6  *
   7  * Based on the islsm (softmac prism54) driver, which is:
   8  * Copyright 2004-2006 Jean-Baptiste Note <jean-baptiste.note@m4x.org>, et al.
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License version 2 as
  12  * published by the Free Software Foundation.
  13  */
  14
  15 #include <linux/init.h>
  16 #include <linux/pci.h>
  17 #include <linux/firmware.h>
  18 #include <linux/etherdevice.h>
  19 #include <linux/delay.h>
  20 #include <linux/completion.h>
  21 #include <net/mac80211.h>
  22
  23 #include "p54.h"
  24 #include "p54pci.h"
  25
  26 MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
  27 MODULE_DESCRIPTION("Prism54 PCI wireless driver");
  28 MODULE_LICENSE("GPL");
  29 MODULE_ALIAS("prism54pci");
  30
  31 static struct pci_device_id p54p_table[] __devinitdata = {
  32         /* Intersil PRISM Duette/Prism GT Wireless LAN adapter */
  33         { PCI_DEVICE(0x1260, 0x3890) },
  34         /* 3COM 3CRWE154G72 Wireless LAN adapter */
  35         { PCI_DEVICE(0x10b7, 0x6001) },
  36         /* Intersil PRISM Indigo Wireless LAN adapter */
  37         { PCI_DEVICE(0x1260, 0x3877) },
  38         /* Intersil PRISM Javelin/Xbow Wireless LAN adapter */
  39         { PCI_DEVICE(0x1260, 0x3886) },
  40         { },
  41 };
  42
  43 MODULE_DEVICE_TABLE(pci, p54p_table);
  44
  45 static int p54p_upload_firmware(struct ieee80211_hw *dev)
  46 {
  47         struct p54p_priv *priv = dev->priv;
  48         const struct firmware *fw_entry = NULL;
  49         __le32 reg;
  50         int err;
  51         u32 *data;
  52         u32 remains, left, device_addr;
  53
  54         P54P_WRITE(int_enable, 0);
  55         P54P_READ(int_enable);
  56         udelay(10);
  57
  58         reg = P54P_READ(ctrl_stat);
  59         reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RESET);
  60         reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RAMBOOT);
  61         P54P_WRITE(ctrl_stat, reg);
  62         P54P_READ(ctrl_stat);
  63         udelay(10);
  64
  65         reg |= cpu_to_le32(ISL38XX_CTRL_STAT_RESET);
  66         P54P_WRITE(ctrl_stat, reg);
  67         wmb();
  68         udelay(10);
  69
  70         reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RESET);
  71         P54P_WRITE(ctrl_stat, reg);
  72         wmb();
  73
  74         mdelay(50);
  75
  76         err = request_firmware(&fw_entry, "isl3886", &priv->pdev->dev);
  77         if (err) {
  78                 printk(KERN_ERR "%s (prism54pci): cannot find firmware "
  79                        "(isl3886)\n", pci_name(priv->pdev));
  80                 return err;
  81         }
  82
  83         p54_parse_firmware(dev, fw_entry);
  84
  85         data = (u32 *) fw_entry->data;
  86         remains = fw_entry->size;
  87         device_addr = ISL38XX_DEV_FIRMWARE_ADDR;
  88         while (remains) {
  89                 u32 i = 0;
  90                 left = min((u32)0x1000, remains);
  91                 P54P_WRITE(direct_mem_base, cpu_to_le32(device_addr));
  92                 P54P_READ(int_enable);
  93
  94                 device_addr += 0x1000;
  95                 while (i < left) {
  96                         P54P_WRITE(direct_mem_win[i], *data++);
  97                         i += sizeof(u32);
  98                 }
  99
 100                 remains -= left;
 101                 P54P_READ(int_enable);
 102         }
 103
 104         release_firmware(fw_entry);
 105
 106         reg = P54P_READ(ctrl_stat);
 107         reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_CLKRUN);
 108         reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RESET);
 109         reg |= cpu_to_le32(ISL38XX_CTRL_STAT_RAMBOOT);
 110         P54P_WRITE(ctrl_stat, reg);
 111         P54P_READ(ctrl_stat);
 112         udelay(10);
 113
 114         reg |= cpu_to_le32(ISL38XX_CTRL_STAT_RESET);
 115         P54P_WRITE(ctrl_stat, reg);
 116         wmb();
 117         udelay(10);
 118
 119         reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RESET);
 120         P54P_WRITE(ctrl_stat, reg);
 121         wmb();
 122         udelay(10);
 123
 124         return 0;
 125 }
 126
 127 static irqreturn_t p54p_simple_interrupt(int irq, void *dev_id)
 128 {
 129         struct p54p_priv *priv = (struct p54p_priv *) dev_id;
 130         __le32 reg;
 131
 132         reg = P54P_READ(int_ident);
 133         P54P_WRITE(int_ack, reg);
 134
 135         if (reg & P54P_READ(int_enable))
 136                 complete(&priv->boot_comp);
 137
 138         return IRQ_HANDLED;
 139 }
 140
 141 static int p54p_read_eeprom(struct ieee80211_hw *dev)
 142 {
 143         struct p54p_priv *priv = dev->priv;
 144         int err;
 145         struct p54_control_hdr *hdr;
 146         void *eeprom;
 147         dma_addr_t rx_mapping, tx_mapping;
 148         u16 alen;
 149
 150         init_completion(&priv->boot_comp);
 151         err = request_irq(priv->pdev->irq, &p54p_simple_interrupt,
 152                           IRQF_SHARED, "prism54pci", priv);
 153         if (err) {
 154                 printk(KERN_ERR "%s (prism54pci): failed to register IRQ handler\n",
 155                        pci_name(priv->pdev));
 156                 return err;
 157         }
 158
 159         eeprom = kmalloc(0x2010 + EEPROM_READBACK_LEN, GFP_KERNEL);
 160         if (!eeprom) {
 161                 printk(KERN_ERR "%s (prism54pci): no memory for eeprom!\n",
 162                        pci_name(priv->pdev));
 163                 err = -ENOMEM;
 164                 goto out;
 165         }
 166
 167         memset(priv->ring_control, 0, sizeof(*priv->ring_control));
 168         P54P_WRITE(ring_control_base, priv->ring_control_dma);
 169         P54P_READ(ring_control_base);
 170         udelay(10);
 171
 172         P54P_WRITE(int_enable, cpu_to_le32(ISL38XX_INT_IDENT_INIT));
 173         P54P_READ(int_enable);
 174         udelay(10);
 175
 176         P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_RESET));
 177
 178         if (!wait_for_completion_interruptible_timeout(&priv->boot_comp, HZ)) {
 179                 printk(KERN_ERR "%s (prism54pci): Cannot boot firmware!\n",
 180                        pci_name(priv->pdev));
 181                 err = -EINVAL;
 182                 goto out;
 183         }
 184
 185         P54P_WRITE(int_enable, cpu_to_le32(ISL38XX_INT_IDENT_UPDATE));
 186         P54P_READ(int_enable);
 187
 188         hdr = eeprom + 0x2010;
 189         p54_fill_eeprom_readback(hdr);
 190         hdr->req_id = cpu_to_le32(priv->common.rx_start);
 191
 192         rx_mapping = pci_map_single(priv->pdev, eeprom,
 193                                     0x2010, PCI_DMA_FROMDEVICE);
 194         tx_mapping = pci_map_single(priv->pdev, (void *)hdr,
 195                                     EEPROM_READBACK_LEN, PCI_DMA_TODEVICE);
 196
 197         priv->ring_control->rx_mgmt[0].host_addr = cpu_to_le32(rx_mapping);
 198         priv->ring_control->rx_mgmt[0].len = cpu_to_le16(0x2010);
 199         priv->ring_control->tx_data[0].host_addr = cpu_to_le32(tx_mapping);
 200         priv->ring_control->tx_data[0].device_addr = hdr->req_id;
 201         priv->ring_control->tx_data[0].len = cpu_to_le16(EEPROM_READBACK_LEN);
 202
 203         priv->ring_control->host_idx[2] = cpu_to_le32(1);
 204         priv->ring_control->host_idx[1] = cpu_to_le32(1);
 205
 206         wmb();
 207         mdelay(100);
 208         P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_UPDATE));
 209
 210         wait_for_completion_interruptible_timeout(&priv->boot_comp, HZ);
 211         wait_for_completion_interruptible_timeout(&priv->boot_comp, HZ);
 212
 213         pci_unmap_single(priv->pdev, tx_mapping,
 214                          EEPROM_READBACK_LEN, PCI_DMA_TODEVICE);
 215         pci_unmap_single(priv->pdev, rx_mapping,
 216                          0x2010, PCI_DMA_FROMDEVICE);
 217
 218         alen = le16_to_cpu(priv->ring_control->rx_mgmt[0].len);
 219         if (le32_to_cpu(priv->ring_control->device_idx[2]) != 1 ||
 220             alen < 0x10) {
 221                 printk(KERN_ERR "%s (prism54pci): Cannot read eeprom!\n",
 222                        pci_name(priv->pdev));
 223                 err = -EINVAL;
 224                 goto out;
 225         }
 226
 227         p54_parse_eeprom(dev, (u8 *)eeprom + 0x10, alen - 0x10);
 228
 229  out:
 230         kfree(eeprom);
 231         P54P_WRITE(int_enable, 0);
 232         P54P_READ(int_enable);
 233         udelay(10);
 234         free_irq(priv->pdev->irq, priv);
 235         P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_RESET));
 236         return err;
 237 }
 238
 239 static void p54p_refill_rx_ring(struct ieee80211_hw *dev)
 240 {
 241         struct p54p_priv *priv = dev->priv;
 242         u32 limit, host_idx, idx;
 243
 244         host_idx = le32_to_cpu(priv->ring_control->host_idx[0]);
 245         limit = host_idx;
 246         limit -= le32_to_cpu(priv->ring_control->device_idx[0]);
 247         limit = ARRAY_SIZE(priv->ring_control->rx_data) - limit;
 248
 249         idx = host_idx % ARRAY_SIZE(priv->ring_control->rx_data);
 250         while (limit-- > 1) {
 251                 struct p54p_desc *desc = &priv->ring_control->rx_data[idx];
 252
 253                 if (!desc->host_addr) {
 254                         struct sk_buff *skb;
 255                         dma_addr_t mapping;
 256                         skb = dev_alloc_skb(MAX_RX_SIZE);
 257                         if (!skb)
 258                                 break;
 259
 260                         mapping = pci_map_single(priv->pdev,
 261                                                  skb_tail_pointer(skb),
 262                                                  MAX_RX_SIZE,
 263                                                  PCI_DMA_FROMDEVICE);
 264                         desc->host_addr = cpu_to_le32(mapping);
 265                         desc->device_addr = 0;  // FIXME: necessary?
 266                         desc->len = cpu_to_le16(MAX_RX_SIZE);
 267                         desc->flags = 0;
 268                         priv->rx_buf[idx] = skb;
 269                 }
 270
 271                 idx++;
 272                 host_idx++;
 273                 idx %= ARRAY_SIZE(priv->ring_control->rx_data);
 274         }
 275
 276         wmb();
 277         priv->ring_control->host_idx[0] = cpu_to_le32(host_idx);
 278 }
 279
 280 static irqreturn_t p54p_interrupt(int irq, void *dev_id)
 281 {
 282         struct ieee80211_hw *dev = dev_id;
 283         struct p54p_priv *priv = dev->priv;
 284         __le32 reg;
 285
 286         spin_lock(&priv->lock);
 287         reg = P54P_READ(int_ident);
 288         if (unlikely(reg == 0xFFFFFFFF)) {
 289                 spin_unlock(&priv->lock);
 290                 return IRQ_HANDLED;
 291         }
 292
 293         P54P_WRITE(int_ack, reg);
 294
 295         reg &= P54P_READ(int_enable);
 296
 297         if (reg & cpu_to_le32(ISL38XX_INT_IDENT_UPDATE)) {
 298                 struct p54p_desc *desc;
 299                 u32 idx, i;
 300                 i = priv->tx_idx;
 301                 i %= ARRAY_SIZE(priv->ring_control->tx_data);
 302                 priv->tx_idx = idx = le32_to_cpu(priv->ring_control->device_idx[1]);
 303                 idx %= ARRAY_SIZE(priv->ring_control->tx_data);
 304
 305                 while (i != idx) {
 306                         desc = &priv->ring_control->tx_data[i];
 307                         if (priv->tx_buf[i]) {
 308                                 kfree(priv->tx_buf[i]);
 309                                 priv->tx_buf[i] = NULL;
 310                         }
 311
 312                         pci_unmap_single(priv->pdev, le32_to_cpu(desc->host_addr),
 313                                          le16_to_cpu(desc->len), PCI_DMA_TODEVICE);
 314
 315                         desc->host_addr = 0;
 316                         desc->device_addr = 0;
 317                         desc->len = 0;
 318                         desc->flags = 0;
 319
 320                         i++;
 321                         i %= ARRAY_SIZE(priv->ring_control->tx_data);
 322                 }
 323
 324                 i = priv->rx_idx;
 325                 i %= ARRAY_SIZE(priv->ring_control->rx_data);
 326                 priv->rx_idx = idx = le32_to_cpu(priv->ring_control->device_idx[0]);
 327                 idx %= ARRAY_SIZE(priv->ring_control->rx_data);
 328                 while (i != idx) {
 329                         u16 len;
 330                         struct sk_buff *skb;
 331                         desc = &priv->ring_control->rx_data[i];
 332                         len = le16_to_cpu(desc->len);
 333                         skb = priv->rx_buf[i];
 334
 335                         skb_put(skb, len);
 336
 337                         if (p54_rx(dev, skb)) {
 338                                 pci_unmap_single(priv->pdev,
 339                                                  le32_to_cpu(desc->host_addr),
 340                                                  MAX_RX_SIZE, PCI_DMA_FROMDEVICE);
 341
 342                                 priv->rx_buf[i] = NULL;
 343                                 desc->host_addr = 0;
 344                         } else {
 345                                 skb_trim(skb, 0);
 346                                 desc->len = cpu_to_le16(MAX_RX_SIZE);
 347                         }
 348
 349                         i++;
 350                         i %= ARRAY_SIZE(priv->ring_control->rx_data);
 351                 }
 352
 353                 p54p_refill_rx_ring(dev);
 354
 355                 wmb();
 356                 P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_UPDATE));
 357         } else if (reg & cpu_to_le32(ISL38XX_INT_IDENT_INIT))
 358                 complete(&priv->boot_comp);
 359
 360         spin_unlock(&priv->lock);
 361
 362         return reg ? IRQ_HANDLED : IRQ_NONE;
 363 }
 364
 365 static void p54p_tx(struct ieee80211_hw *dev, struct p54_control_hdr *data,
 366                     size_t len, int free_on_tx)
 367 {
 368         struct p54p_priv *priv = dev->priv;
 369         unsigned long flags;
 370         struct p54p_desc *desc;
 371         dma_addr_t mapping;
 372         u32 device_idx, idx, i;
 373
 374         spin_lock_irqsave(&priv->lock, flags);
 375
 376         device_idx = le32_to_cpu(priv->ring_control->device_idx[1]);
 377         idx = le32_to_cpu(priv->ring_control->host_idx[1]);
 378         i = idx % ARRAY_SIZE(priv->ring_control->tx_data);
 379
 380         mapping = pci_map_single(priv->pdev, data, len, PCI_DMA_TODEVICE);
 381         desc = &priv->ring_control->tx_data[i];
 382         desc->host_addr = cpu_to_le32(mapping);
 383         desc->device_addr = data->req_id;
 384         desc->len = cpu_to_le16(len);
 385         desc->flags = 0;
 386
 387         wmb();
 388         priv->ring_control->host_idx[1] = cpu_to_le32(idx + 1);
 389
 390         if (free_on_tx)
 391                 priv->tx_buf[i] = data;
 392
 393         spin_unlock_irqrestore(&priv->lock, flags);
 394
 395         P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_UPDATE));
 396         P54P_READ(dev_int);
 397
 398         /* FIXME: unlikely to happen because the device usually runs out of
 399            memory before we fill the ring up, but we can make it impossible */
 400         if (idx - device_idx > ARRAY_SIZE(priv->ring_control->tx_data) - 2)
 401                 printk(KERN_INFO "%s: tx overflow.\n", wiphy_name(dev->wiphy));
 402 }
 403
 404 static int p54p_open(struct ieee80211_hw *dev)
 405 {
 406         struct p54p_priv *priv = dev->priv;
 407         int err;
 408
 409         init_completion(&priv->boot_comp);
 410         err = request_irq(priv->pdev->irq, &p54p_interrupt,
 411                           IRQF_SHARED, "prism54pci", dev);
 412         if (err) {
 413                 printk(KERN_ERR "%s: failed to register IRQ handler\n",
 414                        wiphy_name(dev->wiphy));
 415                 return err;
 416         }
 417
 418         memset(priv->ring_control, 0, sizeof(*priv->ring_control));
 419         priv->rx_idx = priv->tx_idx = 0;
 420         p54p_refill_rx_ring(dev);
 421
 422         p54p_upload_firmware(dev);
 423
 424         P54P_WRITE(ring_control_base, priv->ring_control_dma);
 425         P54P_READ(ring_control_base);
 426         wmb();
 427         udelay(10);
 428
 429         P54P_WRITE(int_enable, cpu_to_le32(ISL38XX_INT_IDENT_INIT));
 430         P54P_READ(int_enable);
 431         wmb();
 432         udelay(10);
 433
 434         P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_RESET));
 435         P54P_READ(dev_int);
 436
 437         if (!wait_for_completion_interruptible_timeout(&priv->boot_comp, HZ)) {
 438                 printk(KERN_ERR "%s: Cannot boot firmware!\n",
 439                        wiphy_name(dev->wiphy));
 440                 free_irq(priv->pdev->irq, dev);
 441                 return -ETIMEDOUT;
 442         }
 443
 444         P54P_WRITE(int_enable, cpu_to_le32(ISL38XX_INT_IDENT_UPDATE));
 445         P54P_READ(int_enable);
 446         wmb();
 447         udelay(10);
 448
 449         P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_UPDATE));
 450         P54P_READ(dev_int);
 451         wmb();
 452         udelay(10);
 453
 454         return 0;
 455 }
 456
 457 static void p54p_stop(struct ieee80211_hw *dev)
 458 {
 459         struct p54p_priv *priv = dev->priv;
 460         unsigned int i;
 461         struct p54p_desc *desc;
 462
 463         P54P_WRITE(int_enable, 0);
 464         P54P_READ(int_enable);
 465         udelay(10);
 466
 467         free_irq(priv->pdev->irq, dev);
 468
 469         P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_RESET));
 470
 471         for (i = 0; i < ARRAY_SIZE(priv->rx_buf); i++) {
 472                 desc = &priv->ring_control->rx_data[i];
 473                 if (desc->host_addr)
 474                         pci_unmap_single(priv->pdev, le32_to_cpu(desc->host_addr),
 475                                          MAX_RX_SIZE, PCI_DMA_FROMDEVICE);
 476                 kfree_skb(priv->rx_buf[i]);
 477                 priv->rx_buf[i] = NULL;
 478         }
 479
 480         for (i = 0; i < ARRAY_SIZE(priv->tx_buf); i++) {
 481                 desc = &priv->ring_control->tx_data[i];
 482                 if (desc->host_addr)
 483                         pci_unmap_single(priv->pdev, le32_to_cpu(desc->host_addr),
 484                                          le16_to_cpu(desc->len), PCI_DMA_TODEVICE);
 485
 486                 kfree(priv->tx_buf[i]);
 487                 priv->tx_buf[i] = NULL;
 488         }
 489
 490         memset(priv->ring_control, 0, sizeof(*priv->ring_control));
 491 }
 492
 493 static int __devinit p54p_probe(struct pci_dev *pdev,
 494                                 const struct pci_device_id *id)
 495 {
 496         struct p54p_priv *priv;
 497         struct ieee80211_hw *dev;
 498         unsigned long mem_addr, mem_len;
 499         int err;
 500
 501         err = pci_enable_device(pdev);
 502         if (err) {
 503                 printk(KERN_ERR "%s (prism54pci): Cannot enable new PCI device\n",
 504                        pci_name(pdev));
 505                 return err;
 506         }
 507
 508         mem_addr = pci_resource_start(pdev, 0);
 509         mem_len = pci_resource_len(pdev, 0);
 510         if (mem_len < sizeof(struct p54p_csr)) {
 511                 printk(KERN_ERR "%s (prism54pci): Too short PCI resources\n",
 512                        pci_name(pdev));
 513                 pci_disable_device(pdev);
 514                 return err;
 515         }
 516
 517         err = pci_request_regions(pdev, "prism54pci");
 518         if (err) {
 519                 printk(KERN_ERR "%s (prism54pci): Cannot obtain PCI resources\n",
 520                        pci_name(pdev));
 521                 return err;
 522         }
 523
 524         if (pci_set_dma_mask(pdev, DMA_32BIT_MASK) ||
 525             pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK)) {
 526                 printk(KERN_ERR "%s (prism54pci): No suitable DMA available\n",
 527                        pci_name(pdev));
 528                 goto err_free_reg;
 529         }
 530
 531         pci_set_master(pdev);
 532         pci_try_set_mwi(pdev);
 533
 534         pci_write_config_byte(pdev, 0x40, 0);
 535         pci_write_config_byte(pdev, 0x41, 0);
 536
 537         dev = p54_init_common(sizeof(*priv));
 538         if (!dev) {
 539                 printk(KERN_ERR "%s (prism54pci): ieee80211 alloc failed\n",
 540                        pci_name(pdev));
 541                 err = -ENOMEM;
 542                 goto err_free_reg;
 543         }
 544
 545         priv = dev->priv;
 546         priv->pdev = pdev;
 547
 548         SET_IEEE80211_DEV(dev, &pdev->dev);
 549         pci_set_drvdata(pdev, dev);
 550
 551         priv->map = ioremap(mem_addr, mem_len);
 552         if (!priv->map) {
 553                 printk(KERN_ERR "%s (prism54pci): Cannot map device memory\n",
 554                        pci_name(pdev));
 555                 err = -EINVAL;  // TODO: use a better error code?
 556                 goto err_free_dev;
 557         }
 558
 559         priv->ring_control = pci_alloc_consistent(pdev, sizeof(*priv->ring_control),
 560                                                   &priv->ring_control_dma);
 561         if (!priv->ring_control) {
 562                 printk(KERN_ERR "%s (prism54pci): Cannot allocate rings\n",
 563                        pci_name(pdev));
 564                 err = -ENOMEM;
 565                 goto err_iounmap;
 566         }
 567         memset(priv->ring_control, 0, sizeof(*priv->ring_control));
 568
 569         err = p54p_upload_firmware(dev);
 570         if (err)
 571                 goto err_free_desc;
 572
 573         err = p54p_read_eeprom(dev);
 574         if (err)
 575                 goto err_free_desc;
 576
 577         priv->common.open = p54p_open;
 578         priv->common.stop = p54p_stop;
 579         priv->common.tx = p54p_tx;
 580
 581         spin_lock_init(&priv->lock);
 582
 583         err = ieee80211_register_hw(dev);
 584         if (err) {
 585                 printk(KERN_ERR "%s (prism54pci): Cannot register netdevice\n",
 586                        pci_name(pdev));
 587                 goto err_free_common;
 588         }
 589
 590         printk(KERN_INFO "%s: hwaddr " MAC_FMT ", isl38%02x\n",
 591                wiphy_name(dev->wiphy), MAC_ARG(dev->wiphy->perm_addr),
 592                priv->common.version);
 593
 594         return 0;
 595
 596  err_free_common:
 597         p54_free_common(dev);
 598
 599  err_free_desc:
 600         pci_free_consistent(pdev, sizeof(*priv->ring_control),
 601                             priv->ring_control, priv->ring_control_dma);
 602
 603  err_iounmap:
 604         iounmap(priv->map);
 605
 606  err_free_dev:
 607         pci_set_drvdata(pdev, NULL);
 608         ieee80211_free_hw(dev);
 609
 610  err_free_reg:
 611         pci_release_regions(pdev);
 612         pci_disable_device(pdev);
 613         return err;
 614 }
 615
 616 static void __devexit p54p_remove(struct pci_dev *pdev)
 617 {
 618         struct ieee80211_hw *dev = pci_get_drvdata(pdev);
 619         struct p54p_priv *priv;
 620
 621         if (!dev)
 622                 return;
 623
 624         ieee80211_unregister_hw(dev);
 625         priv = dev->priv;
 626         pci_free_consistent(pdev, sizeof(*priv->ring_control),
 627                             priv->ring_control, priv->ring_control_dma);
 628         p54_free_common(dev);
 629         iounmap(priv->map);
 630         pci_release_regions(pdev);
 631         pci_disable_device(pdev);
 632         ieee80211_free_hw(dev);
 633 }
 634
 635 #ifdef CONFIG_PM
 636 static int p54p_suspend(struct pci_dev *pdev, pm_message_t state)
 637 {
 638         struct ieee80211_hw *dev = pci_get_drvdata(pdev);
 639         struct p54p_priv *priv = dev->priv;
 640
 641         if (priv->common.mode != IEEE80211_IF_TYPE_INVALID) {
 642                 ieee80211_stop_queues(dev);
 643                 p54p_stop(dev);
 644         }
 645
 646         pci_save_state(pdev);
 647         pci_set_power_state(pdev, pci_choose_state(pdev, state));
 648         return 0;
 649 }
 650
 651 static int p54p_resume(struct pci_dev *pdev)
 652 {
 653         struct ieee80211_hw *dev = pci_get_drvdata(pdev);
 654         struct p54p_priv *priv = dev->priv;
 655
 656         pci_set_power_state(pdev, PCI_D0);
 657         pci_restore_state(pdev);
 658
 659         if (priv->common.mode != IEEE80211_IF_TYPE_INVALID) {
 660                 p54p_open(dev);
 661                 ieee80211_start_queues(dev);
 662         }
 663
 664         return 0;
 665 }
 666 #endif /* CONFIG_PM */
 667
 668 static struct pci_driver p54p_driver = {
 669         .name           = "prism54pci",
 670         .id_table       = p54p_table,
 671         .probe          = p54p_probe,
 672         .remove         = __devexit_p(p54p_remove),
 673 #ifdef CONFIG_PM
 674         .suspend        = p54p_suspend,
 675         .resume         = p54p_resume,
 676 #endif /* CONFIG_PM */
 677 };
 678
 679 static int __init p54p_init(void)
 680 {
 681         return pci_register_driver(&p54p_driver);
 682 }
 683
 684 static void __exit p54p_exit(void)
 685 {
 686         pci_unregister_driver(&p54p_driver);
 687 }
 688
 689 module_init(p54p_init);
 690 module_exit(p54p_exit);