generic: ar8216: add setup_port field to ar8xxx_chip
[openwrt.git] / target / linux / generic / files / crypto / ocf / hifn / hifn7751var.h
1 /* $FreeBSD: src/sys/dev/hifn/hifn7751var.h,v 1.9 2007/03/21 03:42:49 sam Exp $ */
2 /* $OpenBSD: hifn7751var.h,v 1.42 2002/04/08 17:49:42 jason Exp $ */
3
4 /*-
5 * Invertex AEON / Hifn 7751 driver
6 * Copyright (c) 1999 Invertex Inc. All rights reserved.
7 * Copyright (c) 1999 Theo de Raadt
8 * Copyright (c) 2000-2001 Network Security Technologies, Inc.
9 * http://www.netsec.net
10 *
11 * Please send any comments, feedback, bug-fixes, or feature requests to
12 * software@invertex.com.
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions
16 * are met:
17 *
18 * 1. Redistributions of source code must retain the above copyright
19 * notice, this list of conditions and the following disclaimer.
20 * 2. Redistributions in binary form must reproduce the above copyright
21 * notice, this list of conditions and the following disclaimer in the
22 * documentation and/or other materials provided with the distribution.
23 * 3. The name of the author may not be used to endorse or promote products
24 * derived from this software without specific prior written permission.
25 *
26 *
27 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
28 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
29 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
30 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
31 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
32 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
33 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
34 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
35 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
36 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
37 *
38 * Effort sponsored in part by the Defense Advanced Research Projects
39 * Agency (DARPA) and Air Force Research Laboratory, Air Force
40 * Materiel Command, USAF, under agreement number F30602-01-2-0537.
41 *
42 */
43
44 #ifndef __HIFN7751VAR_H__
45 #define __HIFN7751VAR_H__
46
47 #ifdef __KERNEL__
48
49 /*
50 * Some configurable values for the driver. By default command+result
51 * descriptor rings are the same size. The src+dst descriptor rings
52 * are sized at 3.5x the number of potential commands. Slower parts
53 * (e.g. 7951) tend to run out of src descriptors; faster parts (7811)
54 * src+cmd/result descriptors. It's not clear that increasing the size
55 * of the descriptor rings helps performance significantly as other
56 * factors tend to come into play (e.g. copying misaligned packets).
57 */
58 #define HIFN_D_CMD_RSIZE 24 /* command descriptors */
59 #define HIFN_D_SRC_RSIZE ((HIFN_D_CMD_RSIZE * 7) / 2) /* source descriptors */
60 #define HIFN_D_RES_RSIZE HIFN_D_CMD_RSIZE /* result descriptors */
61 #define HIFN_D_DST_RSIZE HIFN_D_SRC_RSIZE /* destination descriptors */
62
63 /*
64 * Length values for cryptography
65 */
66 #define HIFN_DES_KEY_LENGTH 8
67 #define HIFN_3DES_KEY_LENGTH 24
68 #define HIFN_MAX_CRYPT_KEY_LENGTH HIFN_3DES_KEY_LENGTH
69 #define HIFN_IV_LENGTH 8
70 #define HIFN_AES_IV_LENGTH 16
71 #define HIFN_MAX_IV_LENGTH HIFN_AES_IV_LENGTH
72
73 /*
74 * Length values for authentication
75 */
76 #define HIFN_MAC_KEY_LENGTH 64
77 #define HIFN_MD5_LENGTH 16
78 #define HIFN_SHA1_LENGTH 20
79 #define HIFN_MAC_TRUNC_LENGTH 12
80
81 #define MAX_SCATTER 64
82
83 /*
84 * Data structure to hold all 4 rings and any other ring related data.
85 */
86 struct hifn_dma {
87 /*
88 * Descriptor rings. We add +1 to the size to accomidate the
89 * jump descriptor.
90 */
91 struct hifn_desc cmdr[HIFN_D_CMD_RSIZE+1];
92 struct hifn_desc srcr[HIFN_D_SRC_RSIZE+1];
93 struct hifn_desc dstr[HIFN_D_DST_RSIZE+1];
94 struct hifn_desc resr[HIFN_D_RES_RSIZE+1];
95
96 struct hifn_command *hifn_commands[HIFN_D_RES_RSIZE];
97
98 u_char command_bufs[HIFN_D_CMD_RSIZE][HIFN_MAX_COMMAND];
99 u_char result_bufs[HIFN_D_CMD_RSIZE][HIFN_MAX_RESULT];
100 u_int32_t slop[HIFN_D_CMD_RSIZE];
101
102 u_int64_t test_src, test_dst;
103
104 /*
105 * Our current positions for insertion and removal from the desriptor
106 * rings.
107 */
108 int cmdi, srci, dsti, resi;
109 volatile int cmdu, srcu, dstu, resu;
110 int cmdk, srck, dstk, resk;
111 };
112
113 struct hifn_session {
114 int hs_used;
115 int hs_mlen;
116 };
117
118 #define HIFN_RING_SYNC(sc, r, i, f) \
119 /* DAVIDM bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_dmamap, (f)) */
120
121 #define HIFN_CMDR_SYNC(sc, i, f) HIFN_RING_SYNC((sc), cmdr, (i), (f))
122 #define HIFN_RESR_SYNC(sc, i, f) HIFN_RING_SYNC((sc), resr, (i), (f))
123 #define HIFN_SRCR_SYNC(sc, i, f) HIFN_RING_SYNC((sc), srcr, (i), (f))
124 #define HIFN_DSTR_SYNC(sc, i, f) HIFN_RING_SYNC((sc), dstr, (i), (f))
125
126 #define HIFN_CMD_SYNC(sc, i, f) \
127 /* DAVIDM bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_dmamap, (f)) */
128
129 #define HIFN_RES_SYNC(sc, i, f) \
130 /* DAVIDM bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_dmamap, (f)) */
131
132 typedef int bus_size_t;
133
134 /*
135 * Holds data specific to a single HIFN board.
136 */
137 struct hifn_softc {
138 softc_device_decl sc_dev;
139
140 struct pci_dev *sc_pcidev; /* PCI device pointer */
141 spinlock_t sc_mtx; /* per-instance lock */
142
143 int sc_num; /* for multiple devs */
144
145 ocf_iomem_t sc_bar0;
146 bus_size_t sc_bar0_lastreg;/* bar0 last reg written */
147 ocf_iomem_t sc_bar1;
148 bus_size_t sc_bar1_lastreg;/* bar1 last reg written */
149
150 int sc_irq;
151
152 u_int32_t sc_dmaier;
153 u_int32_t sc_drammodel; /* 1=dram, 0=sram */
154 u_int32_t sc_pllconfig; /* 7954/7955/7956 PLL config */
155
156 struct hifn_dma *sc_dma;
157 dma_addr_t sc_dma_physaddr;/* physical address of sc_dma */
158
159 int sc_dmansegs;
160 int32_t sc_cid;
161 int sc_maxses;
162 int sc_nsessions;
163 struct hifn_session *sc_sessions;
164 int sc_ramsize;
165 int sc_flags;
166 #define HIFN_HAS_RNG 0x1 /* includes random number generator */
167 #define HIFN_HAS_PUBLIC 0x2 /* includes public key support */
168 #define HIFN_HAS_AES 0x4 /* includes AES support */
169 #define HIFN_IS_7811 0x8 /* Hifn 7811 part */
170 #define HIFN_IS_7956 0x10 /* Hifn 7956/7955 don't have SDRAM */
171
172 struct timer_list sc_tickto; /* for managing DMA */
173
174 int sc_rngfirst;
175 int sc_rnghz; /* RNG polling frequency */
176
177 int sc_c_busy; /* command ring busy */
178 int sc_s_busy; /* source data ring busy */
179 int sc_d_busy; /* destination data ring busy */
180 int sc_r_busy; /* result ring busy */
181 int sc_active; /* for initial countdown */
182 int sc_needwakeup; /* ops q'd wating on resources */
183 int sc_curbatch; /* # ops submitted w/o int */
184 int sc_suspended;
185 #ifdef HIFN_VULCANDEV
186 struct cdev *sc_pkdev;
187 #endif
188 };
189
190 #define HIFN_LOCK(_sc) spin_lock_irqsave(&(_sc)->sc_mtx, l_flags)
191 #define HIFN_UNLOCK(_sc) spin_unlock_irqrestore(&(_sc)->sc_mtx, l_flags)
192
193 /*
194 * hifn_command_t
195 *
196 * This is the control structure used to pass commands to hifn_encrypt().
197 *
198 * flags
199 * -----
200 * Flags is the bitwise "or" values for command configuration. A single
201 * encrypt direction needs to be set:
202 *
203 * HIFN_ENCODE or HIFN_DECODE
204 *
205 * To use cryptography, a single crypto algorithm must be included:
206 *
207 * HIFN_CRYPT_3DES or HIFN_CRYPT_DES
208 *
209 * To use authentication is used, a single MAC algorithm must be included:
210 *
211 * HIFN_MAC_MD5 or HIFN_MAC_SHA1
212 *
213 * By default MD5 uses a 16 byte hash and SHA-1 uses a 20 byte hash.
214 * If the value below is set, hash values are truncated or assumed
215 * truncated to 12 bytes:
216 *
217 * HIFN_MAC_TRUNC
218 *
219 * Keys for encryption and authentication can be sent as part of a command,
220 * or the last key value used with a particular session can be retrieved
221 * and used again if either of these flags are not specified.
222 *
223 * HIFN_CRYPT_NEW_KEY, HIFN_MAC_NEW_KEY
224 *
225 * session_num
226 * -----------
227 * A number between 0 and 2048 (for DRAM models) or a number between
228 * 0 and 768 (for SRAM models). Those who don't want to use session
229 * numbers should leave value at zero and send a new crypt key and/or
230 * new MAC key on every command. If you use session numbers and
231 * don't send a key with a command, the last key sent for that same
232 * session number will be used.
233 *
234 * Warning: Using session numbers and multiboard at the same time
235 * is currently broken.
236 *
237 * mbuf
238 * ----
239 * Either fill in the mbuf pointer and npa=0 or
240 * fill packp[] and packl[] and set npa to > 0
241 *
242 * mac_header_skip
243 * ---------------
244 * The number of bytes of the source_buf that are skipped over before
245 * authentication begins. This must be a number between 0 and 2^16-1
246 * and can be used by IPsec implementers to skip over IP headers.
247 * *** Value ignored if authentication not used ***
248 *
249 * crypt_header_skip
250 * -----------------
251 * The number of bytes of the source_buf that are skipped over before
252 * the cryptographic operation begins. This must be a number between 0
253 * and 2^16-1. For IPsec, this number will always be 8 bytes larger
254 * than the auth_header_skip (to skip over the ESP header).
255 * *** Value ignored if cryptography not used ***
256 *
257 */
258 struct hifn_operand {
259 union {
260 struct sk_buff *skb;
261 struct uio *io;
262 unsigned char *buf;
263 } u;
264 void *map;
265 bus_size_t mapsize;
266 int nsegs;
267 struct {
268 dma_addr_t ds_addr;
269 int ds_len;
270 } segs[MAX_SCATTER];
271 };
272
273 struct hifn_command {
274 u_int16_t session_num;
275 u_int16_t base_masks, cry_masks, mac_masks;
276 u_int8_t iv[HIFN_MAX_IV_LENGTH], *ck, mac[HIFN_MAC_KEY_LENGTH];
277 int cklen;
278 int sloplen, slopidx;
279
280 struct hifn_operand src;
281 struct hifn_operand dst;
282
283 struct hifn_softc *softc;
284 struct cryptop *crp;
285 struct cryptodesc *enccrd, *maccrd;
286 };
287
288 #define src_skb src.u.skb
289 #define src_io src.u.io
290 #define src_map src.map
291 #define src_mapsize src.mapsize
292 #define src_segs src.segs
293 #define src_nsegs src.nsegs
294 #define src_buf src.u.buf
295
296 #define dst_skb dst.u.skb
297 #define dst_io dst.u.io
298 #define dst_map dst.map
299 #define dst_mapsize dst.mapsize
300 #define dst_segs dst.segs
301 #define dst_nsegs dst.nsegs
302 #define dst_buf dst.u.buf
303
304 /*
305 * Return values for hifn_crypto()
306 */
307 #define HIFN_CRYPTO_SUCCESS 0
308 #define HIFN_CRYPTO_BAD_INPUT (-1)
309 #define HIFN_CRYPTO_RINGS_FULL (-2)
310
311 /**************************************************************************
312 *
313 * Function: hifn_crypto
314 *
315 * Purpose: Called by external drivers to begin an encryption on the
316 * HIFN board.
317 *
318 * Blocking/Non-blocking Issues
319 * ============================
320 * The driver cannot block in hifn_crypto (no calls to tsleep) currently.
321 * hifn_crypto() returns HIFN_CRYPTO_RINGS_FULL if there is not enough
322 * room in any of the rings for the request to proceed.
323 *
324 * Return Values
325 * =============
326 * 0 for success, negative values on error
327 *
328 * Defines for negative error codes are:
329 *
330 * HIFN_CRYPTO_BAD_INPUT : The passed in command had invalid settings.
331 * HIFN_CRYPTO_RINGS_FULL : All DMA rings were full and non-blocking
332 * behaviour was requested.
333 *
334 *************************************************************************/
335
336 /*
337 * Convert back and forth from 'sid' to 'card' and 'session'
338 */
339 #define HIFN_CARD(sid) (((sid) & 0xf0000000) >> 28)
340 #define HIFN_SESSION(sid) ((sid) & 0x000007ff)
341 #define HIFN_SID(crd,ses) (((crd) << 28) | ((ses) & 0x7ff))
342
343 #endif /* _KERNEL */
344
345 struct hifn_stats {
346 u_int64_t hst_ibytes;
347 u_int64_t hst_obytes;
348 u_int32_t hst_ipackets;
349 u_int32_t hst_opackets;
350 u_int32_t hst_invalid;
351 u_int32_t hst_nomem; /* malloc or one of hst_nomem_* */
352 u_int32_t hst_abort;
353 u_int32_t hst_noirq; /* IRQ for no reason */
354 u_int32_t hst_totbatch; /* ops submitted w/o interrupt */
355 u_int32_t hst_maxbatch; /* max ops submitted together */
356 u_int32_t hst_unaligned; /* unaligned src caused copy */
357 /*
358 * The following divides hst_nomem into more specific buckets.
359 */
360 u_int32_t hst_nomem_map; /* bus_dmamap_create failed */
361 u_int32_t hst_nomem_load; /* bus_dmamap_load_* failed */
362 u_int32_t hst_nomem_mbuf; /* MGET* failed */
363 u_int32_t hst_nomem_mcl; /* MCLGET* failed */
364 u_int32_t hst_nomem_cr; /* out of command/result descriptor */
365 u_int32_t hst_nomem_sd; /* out of src/dst descriptors */
366 };
367
368 #endif /* __HIFN7751VAR_H__ */
This page took 0.063113 seconds and 5 git commands to generate.