package/broadcom-diag/src/gpio.h

   1 #ifndef __DIAG_GPIO_H
   2 #define __DIAG_GPIO_H
   3 #include <linux/interrupt.h>
   4
   5 #ifndef BCMDRIVER
   6 #include <linux/ssb/ssb.h>
   7 #include <linux/ssb/ssb_driver_chipcommon.h>
   8 #include <linux/ssb/ssb_driver_extif.h>
   9
  10 extern struct ssb_bus ssb;
  11
  12 #define gpio_op(op, param...) \
  13         do { \
  14                 if (ssb.chipco.dev) \
  15                         return ssb_chipco_gpio_##op(&ssb.chipco, param); \
  16                 else if (ssb.extif.dev) \
  17                         return ssb_extif_gpio_##op(&ssb.extif, param); \
  18                 else \
  19                         return 0; \
  20         } while (0);
  21
  22
  23 static inline u32 gpio_in(void)
  24 {
  25         gpio_op(in, ~0);
  26 }
  27
  28 static inline u32 gpio_out(u32 mask, u32 value)
  29 {
  30         gpio_op(out, mask, value);
  31 }
  32
  33 static inline u32 gpio_outen(u32 mask, u32 value)
  34 {
  35         gpio_op(outen, mask, value);
  36 }
  37
  38 static inline u32 gpio_control(u32 mask, u32 value)
  39 {
  40         if (ssb.chipco.dev)
  41                 return ssb_chipco_gpio_control(&ssb.chipco, mask, value);
  42         else
  43                 return 0;
  44 }
  45
  46 static inline u32 gpio_intmask(u32 mask, u32 value)
  47 {
  48         gpio_op(intmask, mask, value);
  49 }
  50
  51 static inline u32 gpio_intpolarity(u32 mask, u32 value)
  52 {
  53         gpio_op(polarity, mask, value);
  54 }
  55
  56 static void gpio_set_irqenable(int enabled, irqreturn_t (*handler)(int, void *, struct pt_regs *))
  57 {
  58         int irq;
  59
  60         if (ssb.chipco.dev)
  61                 irq = ssb_mips_irq(ssb.chipco.dev) + 2;
  62         else if (ssb.extif.dev)
  63                 irq = ssb_mips_irq(ssb.extif.dev) + 2;
  64         else return;
  65
  66         if (enabled)
  67                 request_irq(irq, handler, SA_SHIRQ | SA_SAMPLE_RANDOM, "gpio", handler);
  68         else
  69                 free_irq(irq, handler);
  70
  71         if (ssb.chipco.dev)
  72                 ssb_write32_masked(ssb.chipco.dev, SSB_CHIPCO_IRQMASK, SSB_CHIPCO_IRQ_GPIO, (enabled ? SSB_CHIPCO_IRQ_GPIO : 0));
  73 }
  74
  75 #else
  76
  77 #include <typedefs.h>
  78 #include <osl.h>
  79 #include <bcmdevs.h>
  80 #include <sbutils.h>
  81 #include <sbconfig.h>
  82 #include <sbchipc.h>
  83 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
  84 #include <sbmips.h>
  85 #else
  86 #include <hndcpu.h>
  87 #endif
  88
  89 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0)
  90 #define sbh bcm947xx_sbh
  91 #define sbh_lock bcm947xx_sbh_lock
  92 #endif
  93
  94 extern void *sbh;
  95 extern spinlock_t sbh_lock;
  96
  97 #define gpio_in()       sb_gpioin(sbh)
  98 #define gpio_out(mask, value)   sb_gpioout(sbh, mask, ((value) & (mask)), GPIO_DRV_PRIORITY)
  99 #define gpio_outen(mask, value)         sb_gpioouten(sbh, mask, value, GPIO_DRV_PRIORITY)
 100 #define gpio_control(mask, value)       sb_gpiocontrol(sbh, mask, value, GPIO_DRV_PRIORITY)
 101 #define gpio_intmask(mask, value)       sb_gpiointmask(sbh, mask, value, GPIO_DRV_PRIORITY)
 102 #define gpio_intpolarity(mask, value)   sb_gpiointpolarity(sbh, mask, value, GPIO_DRV_PRIORITY)
 103
 104 static void gpio_set_irqenable(int enabled, irqreturn_t (*handler)(int, void *, struct pt_regs *))
 105 {
 106         unsigned int coreidx;
 107         unsigned long flags;
 108         chipcregs_t *cc;
 109         int irq;
 110
 111         spin_lock_irqsave(sbh_lock, flags);
 112         coreidx = sb_coreidx(sbh);
 113
 114         irq = sb_irq(sbh) + 2;
 115         if (enabled)
 116                 request_irq(irq, handler, SA_SHIRQ | SA_SAMPLE_RANDOM, "gpio", handler);
 117         else
 118                 free_irq(irq, handler);
 119
 120         if ((cc = sb_setcore(sbh, SB_CC, 0))) {
 121                 int intmask;
 122
 123                 intmask = readl(&cc->intmask);
 124                 if (enabled)
 125                         intmask |= CI_GPIO;
 126                 else
 127                         intmask &= ~CI_GPIO;
 128                 writel(intmask, &cc->intmask);
 129         }
 130         sb_setcoreidx(sbh, coreidx);
 131         spin_unlock_irqrestore(sbh_lock, flags);
 132 }
 133
 134 #endif /* BCMDRIVER */
 135
 136 #define EXTIF_ADDR 0x1f000000
 137 #define EXTIF_UART (EXTIF_ADDR + 0x00800000)
 138
 139 #define GPIO_TYPE_NORMAL        (0x0 << 24)
 140 #define GPIO_TYPE_EXTIF         (0x1 << 24)
 141 #define GPIO_TYPE_MASK          (0xf << 24)
 142
 143 static inline void gpio_set_extif(int gpio, int value)
 144 {
 145         volatile u8 *addr = (volatile u8 *) KSEG1ADDR(EXTIF_UART) + (gpio & ~GPIO_TYPE_MASK);
 146         if (value)
 147                 *addr = 0xFF;
 148         else
 149                 *addr;
 150 }
 151
 152 #endif /* __DIAG_GPIO_H */