ramips: introduce ramips_soc_prom_init and move SoC detection into that
[openwrt.git] / target / linux / ramips / files / drivers / watchdog / ramips_wdt.c
1 /*
2 * Ralink RT288X/RT305X built-in hardware watchdog timer
3 *
4 * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
5 *
6 * This driver was based on: drivers/watchdog/ixp4xx_wdt.c
7 * Author: Deepak Saxena <dsaxena@plexity.net>
8 * Copyright 2004 (c) MontaVista, Software, Inc.
9 *
10 * which again was based on sa1100 driver,
11 * Copyright (C) 2000 Oleg Drokin <green@crimea.edu>
12 *
13 * parts of the driver are based on Ralink's 2.6.21 BSP
14 *
15 * This program is free software; you can redistribute it and/or modify it
16 * under the terms of the GNU General Public License version 2 as published
17 * by the Free Software Foundation.
18 */
19
20 #include <linux/bitops.h>
21 #include <linux/errno.h>
22 #include <linux/fs.h>
23 #include <linux/init.h>
24 #include <linux/kernel.h>
25 #include <linux/miscdevice.h>
26 #include <linux/module.h>
27 #include <linux/moduleparam.h>
28 #include <linux/platform_device.h>
29 #include <linux/types.h>
30 #include <linux/watchdog.h>
31 #include <linux/clk.h>
32 #include <linux/err.h>
33
34 #define DRIVER_NAME "ramips-wdt"
35
36 #define RAMIPS_WDT_TIMEOUT 20 /* seconds */
37 #define RAMIPS_WDT_PRESCALE 65536
38
39 #define TIMER_REG_TMRSTAT 0x00
40 #define TIMER_REG_TMR1LOAD 0x20
41 #define TIMER_REG_TMR1CTL 0x28
42
43 #define TMRSTAT_TMR1RST BIT(5)
44
45 #define TMR1CTL_ENABLE BIT(7)
46 #define TMR1CTL_MODE_SHIFT 4
47 #define TMR1CTL_MODE_MASK 0x3
48 #define TMR1CTL_MODE_FREE_RUNNING 0x0
49 #define TMR1CTL_MODE_PERIODIC 0x1
50 #define TMR1CTL_MODE_TIMEOUT 0x2
51 #define TMR1CTL_MODE_WDT 0x3
52 #define TMR1CTL_PRESCALE_MASK 0xf
53 #define TMR1CTL_PRESCALE_65536 0xf
54
55 static int nowayout = WATCHDOG_NOWAYOUT;
56 module_param(nowayout, int, 0);
57 MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started "
58 "(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
59
60 static int ramips_wdt_timeout = RAMIPS_WDT_TIMEOUT;
61 module_param_named(timeout, ramips_wdt_timeout, int, 0);
62 MODULE_PARM_DESC(timeout, "Watchdog timeout in seconds "
63 "(default=" __MODULE_STRING(RAMIPS_WDT_TIMEOUT) "s)");
64
65 static unsigned long ramips_wdt_flags;
66
67 #define WDT_FLAGS_BUSY 0
68 #define WDT_FLAGS_EXPECT_CLOSE 1
69
70 static struct clk *ramips_wdt_clk;
71 static unsigned long ramips_wdt_freq;
72 static int ramips_wdt_max_timeout;
73 static void __iomem *ramips_wdt_base;
74
75 static inline void ramips_wdt_wr(unsigned reg, u32 val)
76 {
77 __raw_writel(val, ramips_wdt_base + reg);
78 }
79
80 static inline u32 ramips_wdt_rr(unsigned reg)
81 {
82 return __raw_readl(ramips_wdt_base + reg);
83 }
84
85 static inline void ramips_wdt_keepalive(void)
86 {
87 ramips_wdt_wr(TIMER_REG_TMR1LOAD, ramips_wdt_timeout * ramips_wdt_freq);
88 }
89
90 static inline void ramips_wdt_enable(void)
91 {
92 u32 t;
93
94 ramips_wdt_keepalive();
95
96 t = ramips_wdt_rr(TIMER_REG_TMR1CTL);
97 t |= TMR1CTL_ENABLE;
98 ramips_wdt_wr(TIMER_REG_TMR1CTL, t);
99 }
100
101 static inline void ramips_wdt_disable(void)
102 {
103 u32 t;
104
105 ramips_wdt_keepalive();
106
107 t = ramips_wdt_rr(TIMER_REG_TMR1CTL);
108 t &= ~TMR1CTL_ENABLE;
109 ramips_wdt_wr(TIMER_REG_TMR1CTL, t);
110 }
111
112 static int ramips_wdt_set_timeout(int val)
113 {
114 if (val < 1 || val > ramips_wdt_max_timeout) {
115 pr_crit(DRIVER_NAME
116 ": timeout value %d must be 0 < timeout < %d\n",
117 val, ramips_wdt_max_timeout);
118 return -EINVAL;
119 }
120
121 ramips_wdt_timeout = val;
122 ramips_wdt_keepalive();
123
124 return 0;
125 }
126
127 static int ramips_wdt_open(struct inode *inode, struct file *file)
128 {
129 u32 t;
130
131 if (test_and_set_bit(WDT_FLAGS_BUSY, &ramips_wdt_flags))
132 return -EBUSY;
133
134 clear_bit(WDT_FLAGS_EXPECT_CLOSE, &ramips_wdt_flags);
135
136 t = ramips_wdt_rr(TIMER_REG_TMR1CTL);
137 t &= ~(TMR1CTL_MODE_MASK << TMR1CTL_MODE_SHIFT |
138 TMR1CTL_PRESCALE_MASK);
139 t |= (TMR1CTL_MODE_WDT << TMR1CTL_MODE_SHIFT |
140 TMR1CTL_PRESCALE_65536);
141 ramips_wdt_wr(TIMER_REG_TMR1CTL, t);
142
143 ramips_wdt_enable();
144
145 return nonseekable_open(inode, file);
146 }
147
148 static int ramips_wdt_release(struct inode *inode, struct file *file)
149 {
150 if (test_bit(WDT_FLAGS_EXPECT_CLOSE, &ramips_wdt_flags))
151 ramips_wdt_disable();
152 else {
153 pr_crit(DRIVER_NAME ": device closed unexpectedly, "
154 "watchdog timer will not stop!\n");
155 ramips_wdt_keepalive();
156 }
157
158 clear_bit(WDT_FLAGS_BUSY, &ramips_wdt_flags);
159 clear_bit(WDT_FLAGS_EXPECT_CLOSE, &ramips_wdt_flags);
160
161 return 0;
162 }
163
164 static ssize_t ramips_wdt_write(struct file *file, const char *data,
165 size_t len, loff_t *ppos)
166 {
167 if (len) {
168 if (!nowayout) {
169 size_t i;
170
171 clear_bit(WDT_FLAGS_EXPECT_CLOSE, &ramips_wdt_flags);
172
173 for (i = 0; i != len; i++) {
174 char c;
175
176 if (get_user(c, data + i))
177 return -EFAULT;
178
179 if (c == 'V')
180 set_bit(WDT_FLAGS_EXPECT_CLOSE,
181 &ramips_wdt_flags);
182 }
183 }
184
185 ramips_wdt_keepalive();
186 }
187
188 return len;
189 }
190
191 static const struct watchdog_info ramips_wdt_info = {
192 .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING |
193 WDIOF_MAGICCLOSE,
194 .firmware_version = 0,
195 .identity = "RAMIPS watchdog",
196 };
197
198 static long ramips_wdt_ioctl(struct file *file, unsigned int cmd,
199 unsigned long arg)
200 {
201 void __user *argp = (void __user *)arg;
202 int __user *p = argp;
203 int err;
204 int t;
205
206 switch (cmd) {
207 case WDIOC_GETSUPPORT:
208 err = copy_to_user(argp, &ramips_wdt_info,
209 sizeof(ramips_wdt_info)) ? -EFAULT : 0;
210 break;
211
212 case WDIOC_GETSTATUS:
213 err = put_user(0, p);
214 break;
215
216 case WDIOC_KEEPALIVE:
217 ramips_wdt_keepalive();
218 err = 0;
219 break;
220
221 case WDIOC_SETTIMEOUT:
222 err = get_user(t, p);
223 if (err)
224 break;
225
226 err = ramips_wdt_set_timeout(t);
227 if (err)
228 break;
229
230 /* fallthrough */
231 case WDIOC_GETTIMEOUT:
232 err = put_user(ramips_wdt_timeout, p);
233 break;
234
235 default:
236 err = -ENOTTY;
237 break;
238 }
239
240 return err;
241 }
242
243 static const struct file_operations ramips_wdt_fops = {
244 .owner = THIS_MODULE,
245 .llseek = no_llseek,
246 .write = ramips_wdt_write,
247 .unlocked_ioctl = ramips_wdt_ioctl,
248 .open = ramips_wdt_open,
249 .release = ramips_wdt_release,
250 };
251
252 static struct miscdevice ramips_wdt_miscdev = {
253 .minor = WATCHDOG_MINOR,
254 .name = "watchdog",
255 .fops = &ramips_wdt_fops,
256 };
257
258 static int __devinit ramips_wdt_probe(struct platform_device *pdev)
259 {
260 struct resource *res;
261 int err;
262
263 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
264 if (!res) {
265 dev_err(&pdev->dev, "no memory resource found\n");
266 return -EINVAL;
267 }
268
269 ramips_wdt_base = ioremap(res->start, resource_size(res));
270 if (!ramips_wdt_base)
271 return -ENOMEM;
272
273 ramips_wdt_clk = clk_get(&pdev->dev, "wdt");
274 if (IS_ERR(ramips_wdt_clk)) {
275 err = PTR_ERR(ramips_wdt_clk);
276 goto err_unmap;
277 }
278
279 err = clk_enable(ramips_wdt_clk);
280 if (err)
281 goto err_clk_put;
282
283 ramips_wdt_freq = clk_get_rate(ramips_wdt_clk) / RAMIPS_WDT_PRESCALE;
284 if (!ramips_wdt_freq) {
285 err = -EINVAL;
286 goto err_clk_disable;
287 }
288
289 ramips_wdt_max_timeout = (0xfffful / ramips_wdt_freq);
290 if (ramips_wdt_timeout < 1 ||
291 ramips_wdt_timeout > ramips_wdt_max_timeout) {
292 ramips_wdt_timeout = ramips_wdt_max_timeout;
293 dev_info(&pdev->dev,
294 "timeout value must be 0 < timeout < %d, using %d\n",
295 ramips_wdt_max_timeout, ramips_wdt_timeout);
296 }
297
298 err = misc_register(&ramips_wdt_miscdev);
299 if (err) {
300 dev_err(&pdev->dev,
301 "unable to register misc device, err=%d\n", err);
302 goto err_clk_disable;
303 }
304
305 return 0;
306
307 err_clk_disable:
308 clk_disable(ramips_wdt_clk);
309 err_clk_put:
310 clk_put(ramips_wdt_clk);
311 err_unmap:
312 iounmap(ramips_wdt_base);
313 return err;
314 }
315
316 static int __devexit ramips_wdt_remove(struct platform_device *pdev)
317 {
318 misc_deregister(&ramips_wdt_miscdev);
319 clk_disable(ramips_wdt_clk);
320 clk_put(ramips_wdt_clk);
321 iounmap(ramips_wdt_base);
322 return 0;
323 }
324
325 static void ramips_wdt_shutdown(struct platform_device *pdev)
326 {
327 ramips_wdt_disable();
328 }
329
330 static struct platform_driver ramips_wdt_driver = {
331 .remove = __devexit_p(ramips_wdt_remove),
332 .shutdown = ramips_wdt_shutdown,
333 .driver = {
334 .name = DRIVER_NAME,
335 .owner = THIS_MODULE,
336 },
337 };
338
339 static int __init ramips_wdt_init(void)
340 {
341 return platform_driver_probe(&ramips_wdt_driver, ramips_wdt_probe);
342 }
343 module_init(ramips_wdt_init);
344
345 static void __exit ramips_wdt_exit(void)
346 {
347 platform_driver_unregister(&ramips_wdt_driver);
348 }
349 module_exit(ramips_wdt_exit);
350
351 MODULE_DESCRIPTION("Ralink RT288X/RT305X hardware watchdog driver");
352 MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org");
353 MODULE_LICENSE("GPL v2");
354 MODULE_ALIAS("platform:" DRIVER_NAME);
355 MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
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