target/linux/lantiq/patches-3.2/0064-MIPS-lantiq-fixes-danube-clock.patch

   1 From 1303ac4fbe98c7132717102223089dc10d0ab4a2 Mon Sep 17 00:00:00 2001
   2 From: John Crispin <blogic@openwrt.org>
   3 Date: Mon, 19 Mar 2012 15:53:37 +0100
   4 Subject: [PATCH 64/70] MIPS: lantiq: fixes danube clock
   5
   6 ---
   7  arch/mips/lantiq/xway/clk.c |   20 ++++++++++----------
   8  1 files changed, 10 insertions(+), 10 deletions(-)
   9
  10 --- a/arch/mips/lantiq/xway/clk.c
  11 +++ b/arch/mips/lantiq/xway/clk.c
  12 @@ -181,7 +181,7 @@ unsigned long ltq_danube_io_region_clock
  13  {
  14         unsigned int ret = ltq_get_pll0_fosc();
  15
  16 -       switch (ltq_cgu_r32(LTQ_CGU_PLL2_CFG) & CGU_SYS_DDR_SEL) {
  17 +       switch (ltq_cgu_r32(LTQ_CGU_SYS) & 0x3) {
  18         default:
  19         case 0:
  20                 return (ret + 1) / 2;
  21 @@ -203,6 +203,15 @@ unsigned long ltq_danube_fpi_bus_clock(i
  22         return ret;
  23  }
  24
  25 +unsigned long ltq_danube_fpi_hz(void)
  26 +{
  27 +       unsigned long ddr_clock = DDR_HZ;
  28 +
  29 +       if (ltq_cgu_r32(LTQ_CGU_SYS) & 0x40)
  30 +               return ddr_clock >> 1;
  31 +       return ddr_clock;
  32 +}
  33 +
  34  unsigned long ltq_danube_cpu_hz(void)
  35  {
  36         switch (ltq_cgu_r32(LTQ_CGU_SYS) & 0xc) {
  37 @@ -241,15 +250,6 @@ unsigned long ltq_ar9_cpu_hz(void)
  38                 return ltq_ar9_sys_hz();
  39  }
  40
  41 -unsigned long ltq_danube_fpi_hz(void)
  42 -{
  43 -       unsigned long ddr_clock = DDR_HZ;
  44 -
  45 -       if (ltq_cgu_r32(LTQ_CGU_SYS) & 0x40)
  46 -               return ddr_clock >> 1;
  47 -       return ddr_clock;
  48 -}
  49 -
  50  unsigned long ltq_vr9_cpu_hz(void)
  51  {
  52         unsigned int cpu_sel;