linux/3.2: show correct name for MIPS 24KEc in /proc/cpuinfo
[openwrt.git] / target / linux / generic / patches-3.3 / 020-ssb_update.patch
1 --- a/drivers/ssb/pci.c
2 +++ b/drivers/ssb/pci.c
3 @@ -523,7 +523,13 @@ static void sprom_extract_r45(struct ssb
4 static void sprom_extract_r8(struct ssb_sprom *out, const u16 *in)
5 {
6 int i;
7 - u16 v;
8 + u16 v, o;
9 + u16 pwr_info_offset[] = {
10 + SSB_SROM8_PWR_INFO_CORE0, SSB_SROM8_PWR_INFO_CORE1,
11 + SSB_SROM8_PWR_INFO_CORE2, SSB_SROM8_PWR_INFO_CORE3
12 + };
13 + BUILD_BUG_ON(ARRAY_SIZE(pwr_info_offset) !=
14 + ARRAY_SIZE(out->core_pwr_info));
15
16 /* extract the MAC address */
17 for (i = 0; i < 3; i++) {
18 @@ -607,6 +613,38 @@ static void sprom_extract_r8(struct ssb_
19 memcpy(&out->antenna_gain.ghz5, &out->antenna_gain.ghz24,
20 sizeof(out->antenna_gain.ghz5));
21
22 + /* Extract cores power info info */
23 + for (i = 0; i < ARRAY_SIZE(pwr_info_offset); i++) {
24 + o = pwr_info_offset[i];
25 + SPEX(core_pwr_info[i].itssi_2g, o + SSB_SROM8_2G_MAXP_ITSSI,
26 + SSB_SPROM8_2G_ITSSI, SSB_SPROM8_2G_ITSSI_SHIFT);
27 + SPEX(core_pwr_info[i].maxpwr_2g, o + SSB_SROM8_2G_MAXP_ITSSI,
28 + SSB_SPROM8_2G_MAXP, 0);
29 +
30 + SPEX(core_pwr_info[i].pa_2g[0], o + SSB_SROM8_2G_PA_0, ~0, 0);
31 + SPEX(core_pwr_info[i].pa_2g[1], o + SSB_SROM8_2G_PA_1, ~0, 0);
32 + SPEX(core_pwr_info[i].pa_2g[2], o + SSB_SROM8_2G_PA_2, ~0, 0);
33 +
34 + SPEX(core_pwr_info[i].itssi_5g, o + SSB_SROM8_5G_MAXP_ITSSI,
35 + SSB_SPROM8_5G_ITSSI, SSB_SPROM8_5G_ITSSI_SHIFT);
36 + SPEX(core_pwr_info[i].maxpwr_5g, o + SSB_SROM8_5G_MAXP_ITSSI,
37 + SSB_SPROM8_5G_MAXP, 0);
38 + SPEX(core_pwr_info[i].maxpwr_5gh, o + SSB_SPROM8_5GHL_MAXP,
39 + SSB_SPROM8_5GH_MAXP, 0);
40 + SPEX(core_pwr_info[i].maxpwr_5gl, o + SSB_SPROM8_5GHL_MAXP,
41 + SSB_SPROM8_5GL_MAXP, SSB_SPROM8_5GL_MAXP_SHIFT);
42 +
43 + SPEX(core_pwr_info[i].pa_5gl[0], o + SSB_SROM8_5GL_PA_0, ~0, 0);
44 + SPEX(core_pwr_info[i].pa_5gl[1], o + SSB_SROM8_5GL_PA_1, ~0, 0);
45 + SPEX(core_pwr_info[i].pa_5gl[2], o + SSB_SROM8_5GL_PA_2, ~0, 0);
46 + SPEX(core_pwr_info[i].pa_5g[0], o + SSB_SROM8_5G_PA_0, ~0, 0);
47 + SPEX(core_pwr_info[i].pa_5g[1], o + SSB_SROM8_5G_PA_1, ~0, 0);
48 + SPEX(core_pwr_info[i].pa_5g[2], o + SSB_SROM8_5G_PA_2, ~0, 0);
49 + SPEX(core_pwr_info[i].pa_5gh[0], o + SSB_SROM8_5GH_PA_0, ~0, 0);
50 + SPEX(core_pwr_info[i].pa_5gh[1], o + SSB_SROM8_5GH_PA_1, ~0, 0);
51 + SPEX(core_pwr_info[i].pa_5gh[2], o + SSB_SROM8_5GH_PA_2, ~0, 0);
52 + }
53 +
54 /* Extract FEM info */
55 SPEX(fem.ghz2.tssipos, SSB_SPROM8_FEM2G,
56 SSB_SROM8_FEM_TSSIPOS, SSB_SROM8_FEM_TSSIPOS_SHIFT);
57 --- a/include/linux/ssb/ssb.h
58 +++ b/include/linux/ssb/ssb.h
59 @@ -16,6 +16,12 @@ struct pcmcia_device;
60 struct ssb_bus;
61 struct ssb_driver;
62
63 +struct ssb_sprom_core_pwr_info {
64 + u8 itssi_2g, itssi_5g;
65 + u8 maxpwr_2g, maxpwr_5gl, maxpwr_5g, maxpwr_5gh;
66 + u16 pa_2g[3], pa_5gl[3], pa_5g[3], pa_5gh[3];
67 +};
68 +
69 struct ssb_sprom {
70 u8 revision;
71 u8 il0mac[6]; /* MAC address for 802.11b/g */
72 @@ -82,6 +88,8 @@ struct ssb_sprom {
73 u16 boardflags2_hi; /* Board flags (bits 48-63) */
74 /* TODO store board flags in a single u64 */
75
76 + struct ssb_sprom_core_pwr_info core_pwr_info[4];
77 +
78 /* Antenna gain values for up to 4 antennas
79 * on each band. Values in dBm/4 (Q5.2). Negative gain means the
80 * loss in the connectors is bigger than the gain. */
81 --- a/include/linux/ssb/ssb_regs.h
82 +++ b/include/linux/ssb/ssb_regs.h
83 @@ -449,6 +449,39 @@
84 #define SSB_SPROM8_TS_SLP_OPT_CORRX 0x00B6
85 #define SSB_SPROM8_FOC_HWIQ_IQSWP 0x00B8
86 #define SSB_SPROM8_PHYCAL_TEMPDELTA 0x00BA
87 +
88 +/* There are 4 blocks with power info sharing the same layout */
89 +#define SSB_SROM8_PWR_INFO_CORE0 0x00C0
90 +#define SSB_SROM8_PWR_INFO_CORE1 0x00E0
91 +#define SSB_SROM8_PWR_INFO_CORE2 0x0100
92 +#define SSB_SROM8_PWR_INFO_CORE3 0x0120
93 +
94 +#define SSB_SROM8_2G_MAXP_ITSSI 0x00
95 +#define SSB_SPROM8_2G_MAXP 0x00FF
96 +#define SSB_SPROM8_2G_ITSSI 0xFF00
97 +#define SSB_SPROM8_2G_ITSSI_SHIFT 8
98 +#define SSB_SROM8_2G_PA_0 0x02 /* 2GHz power amp settings */
99 +#define SSB_SROM8_2G_PA_1 0x04
100 +#define SSB_SROM8_2G_PA_2 0x06
101 +#define SSB_SROM8_5G_MAXP_ITSSI 0x08 /* 5GHz ITSSI and 5.3GHz Max Power */
102 +#define SSB_SPROM8_5G_MAXP 0x00FF
103 +#define SSB_SPROM8_5G_ITSSI 0xFF00
104 +#define SSB_SPROM8_5G_ITSSI_SHIFT 8
105 +#define SSB_SPROM8_5GHL_MAXP 0x0A /* 5.2GHz and 5.8GHz Max Power */
106 +#define SSB_SPROM8_5GH_MAXP 0x00FF
107 +#define SSB_SPROM8_5GL_MAXP 0xFF00
108 +#define SSB_SPROM8_5GL_MAXP_SHIFT 8
109 +#define SSB_SROM8_5G_PA_0 0x0C /* 5.3GHz power amp settings */
110 +#define SSB_SROM8_5G_PA_1 0x0E
111 +#define SSB_SROM8_5G_PA_2 0x10
112 +#define SSB_SROM8_5GL_PA_0 0x12 /* 5.2GHz power amp settings */
113 +#define SSB_SROM8_5GL_PA_1 0x14
114 +#define SSB_SROM8_5GL_PA_2 0x16
115 +#define SSB_SROM8_5GH_PA_0 0x18 /* 5.8GHz power amp settings */
116 +#define SSB_SROM8_5GH_PA_1 0x1A
117 +#define SSB_SROM8_5GH_PA_2 0x1C
118 +
119 +/* TODO: Make it deprecated */
120 #define SSB_SPROM8_MAXP_BG 0x00C0 /* Max Power 2GHz in path 1 */
121 #define SSB_SPROM8_MAXP_BG_MASK 0x00FF /* Mask for Max Power 2GHz */
122 #define SSB_SPROM8_ITSSI_BG 0xFF00 /* Mask for path 1 itssi_bg */
123 @@ -473,6 +506,7 @@
124 #define SSB_SPROM8_PA1HIB0 0x00D8 /* 5.8GHz power amp settings */
125 #define SSB_SPROM8_PA1HIB1 0x00DA
126 #define SSB_SPROM8_PA1HIB2 0x00DC
127 +
128 #define SSB_SPROM8_CCK2GPO 0x0140 /* CCK power offset */
129 #define SSB_SPROM8_OFDM2GPO 0x0142 /* 2.4GHz OFDM power offset */
130 #define SSB_SPROM8_OFDM5GPO 0x0146 /* 5.3GHz OFDM power offset */
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