target/linux/coldfire/files-2.6.31/arch/m68k/include/asm/cfmmu.h

   1 /*
   2  * Copyright 2007-2009 Freescale Semiconductor, Inc. All Rights Reserved.
   3  * Definitions for Coldfire V4e MMU
   4  */
   5 #include <asm/movs.h>
   6
   7 #ifndef __CF_MMU_H__
   8 #define __CF_MMU_H__
   9
  10
  11 #define MMU_BASE 0xE8000000
  12
  13
  14 #define MMUCR (MMU_BASE+0x00)
  15 #define MMUCR_ASMN  1
  16 #define MMUCR_ASM   (1<<MMUCR_ASMN)
  17 #define MMUCR_ENN   0
  18 #define MMUCR_EN    (1<<MMUCR_ENN)
  19
  20 #define MMUOR REG16(MMU_BASE+0x04+0x02)
  21 #define MMUOR_AAN   16
  22 #define MMUOR_AA    (0xffff<<MMUOR_AAN)
  23 #define MMUOR_STLBN 8
  24 #define MMUOR_STLB  (1<<MMUOR_STLBN)
  25 #define MMUOR_CAN   7
  26 #define MMUOR_CA    (1<<MMUOR_CAN)
  27 #define MMUOR_CNLN  6
  28 #define MMUOR_CNL   (1<<MMUOR_CNLN)
  29 #define MMUOR_CASN  5
  30 #define MMUOR_CAS   (1<<MMUOR_CASN)
  31 #define MMUOR_ITLBN 4
  32 #define MMUOR_ITLB  (1<<MMUOR_ITLBN)
  33 #define MMUOR_ADRN  3
  34 #define MMUOR_ADR   (1<<MMUOR_ADRN)
  35 #define MMUOR_RWN   2
  36 #define MMUOR_RW    (1<<MMUOR_RWN)
  37 #define MMUOR_ACCN  1
  38 #define MMUOR_ACC   (1<<MMUOR_ACCN)
  39 #define MMUOR_UAAN  0
  40 #define MMUOR_UAA   (1<<MMUOR_UAAN)
  41
  42 #define MMUSR REG32(MMU_BASE+0x08)
  43 #define MMUSR_SPFN  5
  44 #define MMUSR_SPF   (1<<MMUSR_SPFN)
  45 #define MMUSR_RFN   4
  46 #define MMUSR_RF    (1<<MMUSR_RFN)
  47 #define MMUSR_WFN   3
  48 #define MMUSR_WF    (1<<MMUSR_WFN)
  49 #define MMUSR_HITN  1
  50 #define MMUSR_HIT   (1<<MMUSR_HITN)
  51
  52 #define MMUAR REG32(MMU_BASE+0x10)
  53 #define MMUAR_VPN   1
  54 #define MMUAR_VP    (0xfffffffe)
  55 #define MMUAR_SN    0
  56 #define MMUAR_S     (1<<MMUAR_SN)
  57
  58 #define MMUTR REG32(MMU_BASE+0x14)
  59 #define MMUTR_VAN   10
  60 #define MMUTR_VA    (0xfffffc00)
  61 #define MMUTR_IDN   2
  62 #define MMUTR_ID    (0xff<<MMUTR_IDN)
  63 #define MMUTR_SGN   1
  64 #define MMUTR_SG    (1<<MMUTR_SGN)
  65 #define MMUTR_VN    0
  66 #define MMUTR_V     (1<<MMUTR_VN)
  67
  68 #define MMUDR REG32(MMU_BASE+0x18)
  69 #define MMUDR_PAN   10
  70 #define MMUDR_PA    (0xfffffc00)
  71 #define MMUDR_SZN   8
  72 #define MMUDR_SZ_MASK (0x2<<MMUDR_SZN)
  73 #define MMUDR_SZ1M  (0<<MMUDR_SZN)
  74 #define MMUDR_SZ4K  (1<<MMUDR_SZN)
  75 #define MMUDR_SZ8K  (2<<MMUDR_SZN)
  76 #define MMUDR_SZ16M (3<<MMUDR_SZN)
  77 #define MMUDR_CMN   6
  78 #define MMUDR_INC   (2<<MMUDR_CMN)
  79 #define MMUDR_IC    (0<<MMUDR_CMN)
  80 #define MMUDR_DWT   (0<<MMUDR_CMN)
  81 #define MMUDR_DCB   (1<<MMUDR_CMN)
  82 #define MMUDR_DNCP  (2<<MMUDR_CMN)
  83 #define MMUDR_DNCIP (3<<MMUDR_CMN)
  84 #define MMUDR_SPN   5
  85 #define MMUDR_SP    (1<<MMUDR_SPN)
  86 #define MMUDR_RN    4
  87 #define MMUDR_R     (1<<MMUDR_RN)
  88 #define MMUDR_WN    3
  89 #define MMUDR_W     (1<<MMUDR_WN)
  90 #define MMUDR_XN    2
  91 #define MMUDR_X     (1<<MMUDR_XN)
  92 #define MMUDR_LKN   1
  93 #define MMUDR_LK    (1<<MMUDR_LKN)
  94
  95
  96 #ifndef __ASSEMBLY__
  97 #define CF_PMEGS_NUM            256
  98 #define CF_INVALID_CONTEXT      255
  99 #define CF_PAGE_PGNUM_MASK      (PAGE_MASK)
 100
 101 extern int cf_tlb_miss(struct pt_regs *regs, int write, int dtlb,
 102                        int extension_word);
 103 #endif /* __ASSEMBLY__*/
 104
 105 #endif  /* !__CF_MMU_H__ */