target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt288x.h

   1 /*
   2  * Ralink RT288x SoC specific definitions
   3  *
   4  * Copyright (C) 2008 Gabor Juhos <juhosg@openwrt.org>
   5  * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
   6  *
   7  * Parts of this file are based on Ralink's 2.6.21 BSP
   8  *
   9  * This program is free software; you can redistribute it and/or modify it
  10  * under the terms of the GNU General Public License version 2 as published
  11  * by the Free Software Foundation.
  12  */
  13
  14 #ifndef _RT288X_H_
  15 #define _RT288X_H_
  16
  17 #include <linux/init.h>
  18 #include <linux/io.h>
  19
  20 void rt288x_detect_sys_type(void) __init;
  21
  22 #define RT288X_SYS_TYPE_LEN     64
  23 extern unsigned char rt288x_sys_type[RT288X_SYS_TYPE_LEN];
  24
  25 void rt288x_detect_sys_freq(void) __init;
  26
  27 extern unsigned long rt288x_cpu_freq;
  28 extern unsigned long rt288x_sys_freq;
  29
  30 extern unsigned long rt288x_mach_type;
  31 #define RT288X_MACH_GENERIC     0
  32
  33 #define RT288X_CPU_IRQ_BASE     0
  34 #define RT288X_INTC_IRQ_BASE    8
  35 #define RT288X_INTC_IRQ_COUNT   32
  36 #define RT288X_GPIO_IRQ_BASE    40
  37
  38 #define RT288X_CPU_IRQ_INTC     (RT288X_CPU_IRQ_BASE + 2)
  39 #define RT288X_CPU_IRQ_PCI      (RT288X_CPU_IRQ_BASE + 4)
  40 #define RT288X_CPU_IRQ_FE       (RT288X_CPU_IRQ_BASE + 5)
  41 #define RT288X_CPU_IRQ_WNIC     (RT288X_CPU_IRQ_BASE + 6)
  42 #define RT288X_CPU_IRQ_COUNTER  (RT288X_CPU_IRQ_BASE + 7)
  43
  44 #define RT2880_INTC_IRQ_TIMER0  (RT288X_INTC_IRQ_BASE + 0)
  45 #define RT2880_INTC_IRQ_TIMER1  (RT288X_INTC_IRQ_BASE + 1)
  46 #define RT2880_INTC_IRQ_UART0   (RT288X_INTC_IRQ_BASE + 2)
  47 #define RT2880_INTC_IRQ_PIO     (RT288X_INTC_IRQ_BASE + 3)
  48 #define RT2880_INTC_IRQ_PCM     (RT288X_INTC_IRQ_BASE + 4)
  49 #define RT2880_INTC_IRQ_UART1   (RT288X_INTC_IRQ_BASE + 8)
  50 #define RT2880_INTC_IRQ_IA      (RT288X_INTC_IRQ_BASE + 23)
  51
  52 #define RT288X_GPIO_IRQ(x)      (RT288X_GPIO_IRQ_BASE + (x))
  53 #define RT288X_GPIO_COUNT       32
  54
  55 extern void __iomem *rt288x_sysc_base;
  56 extern void __iomem *rt288x_memc_base;
  57
  58 static inline void rt288x_sysc_wr(u32 val, unsigned reg)
  59 {
  60         __raw_writel(val, rt288x_sysc_base + reg);
  61 }
  62
  63 static inline u32 rt288x_sysc_rr(unsigned reg)
  64 {
  65         return __raw_readl(rt288x_sysc_base + reg);
  66 }
  67
  68 static inline void rt288x_memc_wr(u32 val, unsigned reg)
  69 {
  70         __raw_writel(val, rt288x_memc_base + reg);
  71 }
  72
  73 static inline u32 rt288x_memc_rr(unsigned reg)
  74 {
  75         return __raw_readl(rt288x_memc_base + reg);
  76 }
  77
  78 #endif /* _RT228X_H_ */