target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-pb92.c

   1 /*
   2  *  Atheros PB92 board support
   3  *
   4  *  Copyright (C) 2010 Felix Fietkau <nbd@openwrt.org>
   5  *  Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
   6  *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
   7  *
   8  *  This program is free software; you can redistribute it and/or modify it
   9  *  under the terms of the GNU General Public License version 2 as published
  10  *  by the Free Software Foundation.
  11  */
  12
  13 #include <linux/mtd/mtd.h>
  14 #include <linux/mtd/partitions.h>
  15
  16 #include <asm/mach-ath79/ath79.h>
  17
  18 #include "dev-eth.h"
  19 #include "dev-gpio-buttons.h"
  20 #include "dev-m25p80.h"
  21 #include "dev-usb.h"
  22 #include "machtypes.h"
  23 #include "pci.h"
  24
  25 static struct mtd_partition pb92_partitions[] = {
  26         {
  27                 .name           = "u-boot",
  28                 .offset         = 0,
  29                 .size           = 0x040000,
  30                 .mask_flags     = MTD_WRITEABLE,
  31         }, {
  32                 .name           = "u-boot-env",
  33                 .offset         = 0x040000,
  34                 .size           = 0x010000,
  35         }, {
  36                 .name           = "rootfs",
  37                 .offset         = 0x050000,
  38                 .size           = 0x2b0000,
  39         }, {
  40                 .name           = "uImage",
  41                 .offset         = 0x300000,
  42                 .size           = 0x0e0000,
  43         }, {
  44                 .name           = "ART",
  45                 .offset         = 0x3e0000,
  46                 .size           = 0x020000,
  47                 .mask_flags     = MTD_WRITEABLE,
  48         }
  49 };
  50
  51 static struct flash_platform_data pb92_flash_data = {
  52         .parts          = pb92_partitions,
  53         .nr_parts       = ARRAY_SIZE(pb92_partitions),
  54 };
  55
  56 #define PB92_KEYS_POLL_INTERVAL         20      /* msecs */
  57 #define PB92_KEYS_DEBOUNCE_INTERVAL     (3 * PB92_KEYS_POLL_INTERVAL)
  58
  59 #define PB92_GPIO_BTN_SW4       8
  60 #define PB92_GPIO_BTN_SW5       3
  61
  62 static struct gpio_keys_button pb92_gpio_keys[] __initdata = {
  63         {
  64                 .desc           = "sw4",
  65                 .type           = EV_KEY,
  66                 .code           = BTN_0,
  67                 .debounce_interval = PB92_KEYS_DEBOUNCE_INTERVAL,
  68                 .gpio           = PB92_GPIO_BTN_SW4,
  69                 .active_low     = 1,
  70         }, {
  71                 .desc           = "sw5",
  72                 .type           = EV_KEY,
  73                 .code           = BTN_1,
  74                 .debounce_interval = PB92_KEYS_DEBOUNCE_INTERVAL,
  75                 .gpio           = PB92_GPIO_BTN_SW5,
  76                 .active_low     = 1,
  77         }
  78 };
  79
  80 static void __init pb92_init(void)
  81 {
  82         u8 *mac = (u8 *) KSEG1ADDR(0x1fff0000);
  83
  84         ath79_register_m25p80(&pb92_flash_data);
  85
  86         ath79_register_mdio(0, ~BIT(0));
  87         ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0);
  88         ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
  89         ath79_eth0_data.speed = SPEED_1000;
  90         ath79_eth0_data.duplex = DUPLEX_FULL;
  91         ath79_eth0_data.phy_mask = BIT(0);
  92
  93         ath79_register_eth(0);
  94
  95         ath79_register_gpio_keys_polled(-1, PB92_KEYS_POLL_INTERVAL,
  96                                          ARRAY_SIZE(pb92_gpio_keys),
  97                                          pb92_gpio_keys);
  98
  99         ath79_register_usb();
 100
 101         ath79_register_pci();
 102 }
 103
 104 MIPS_MACHINE(ATH79_MACH_PB92, "PB92", "Atheros PB92", pb92_init);