add new switch configuration api
[openwrt.git] / target / linux / rb532 / files / include / asm-mips / rc32434 / gpio.h
1 /*
2 * Copyright 2002 Integrated Device Technology, Inc.
3 * All rights reserved.
4 *
5 * GPIO register definition.
6 *
7 * Author : ryan.holmQVist@idt.com
8 * Date : 20011005
9 * Copyright (C) 2001, 2002 Ryan Holm <ryan.holmQVist@idt.com>
10 * Copyright (C) 2008 Florian Fainelli <florian@openwrt.org>
11 */
12
13 #ifndef _RC32434_GPIO_H_
14 #define _RC32434_GPIO_H_
15
16 #include <linux/types.h>
17
18 struct rb500_gpio_reg {
19 u32 gpiofunc; /* GPIO Function Register
20 * gpiofunc[x]==0 bit = gpio
21 * func[x]==1 bit = altfunc
22 */
23 u32 gpiocfg; /* GPIO Configuration Register
24 * gpiocfg[x]==0 bit = input
25 * gpiocfg[x]==1 bit = output
26 */
27 u32 gpiod; /* GPIO Data Register
28 * gpiod[x] read/write gpio pinX status
29 */
30 u32 gpioilevel; /* GPIO Interrupt Status Register
31 * interrupt level (see gpioistat)
32 */
33 u32 gpioistat; /* Gpio Interrupt Status Register
34 * istat[x] = (gpiod[x] == level[x])
35 * cleared in ISR (STICKY bits)
36 */
37 u32 gpionmien; /* GPIO Non-maskable Interrupt Enable Register */
38 };
39
40 /* UART GPIO signals */
41 #define RC32434_UART0_SOUT (1 << 0)
42 #define RC32434_UART0_SIN (1 << 1)
43 #define RC32434_UART0_RTS (1 << 2)
44 #define RC32434_UART0_CTS (1 << 3)
45
46 /* M & P bus GPIO signals */
47 #define RC32434_MP_BIT_22 (1 << 4)
48 #define RC32434_MP_BIT_23 (1 << 5)
49 #define RC32434_MP_BIT_24 (1 << 6)
50 #define RC32434_MP_BIT_25 (1 << 7)
51
52 /* CPU GPIO signals */
53 #define RC32434_CPU_GPIO (1 << 8)
54
55 /* Reserved GPIO signals */
56 #define RC32434_AF_SPARE_6 (1 << 9)
57 #define RC32434_AF_SPARE_4 (1 << 10)
58 #define RC32434_AF_SPARE_3 (1 << 11)
59 #define RC32434_AF_SPARE_2 (1 << 12)
60
61 /* PCI messaging unit */
62 #define RC32434_PCI_MSU_GPIO (1 << 13)
63
64 extern int rb500_gpio_get_value(unsigned gpio);
65 extern void rb500_gpio_set_value(unsigned gpio, int value);
66 extern int rb500_gpio_direction_input(unsigned gpio);
67 extern int rb500_gpio_direction_output(unsigned gpio, int value);
68 extern void rb500_gpio_set_int_level(unsigned gpio, int value);
69 extern int rb500_gpio_get_int_level(unsigned gpio);
70 extern void rb500_gpio_set_int_status(unsigned gpio, int value);
71 extern int rb500_gpio_get_int_status(unsigned gpio);
72 extern void rb500_gpio_set_func(unsigned gpio, int value);
73 extern int rb500_gpio_get_func(unsigned gpio);
74
75
76 /* Wrappers for the arch-neutral GPIO API */
77
78 static inline int gpio_request(unsigned gpio, const char *label)
79 {
80 /* Not yet implemented */
81 return 0;
82 }
83
84 static inline void gpio_free(unsigned gpio)
85 {
86 /* Not yet implemented */
87 }
88
89 static inline int gpio_direction_input(unsigned gpio)
90 {
91 return rb500_gpio_direction_input(gpio);
92 }
93
94 static inline int gpio_direction_output(unsigned gpio, int value)
95 {
96 return rb500_gpio_direction_output(gpio, value);
97 }
98
99 static inline int gpio_get_value(unsigned gpio)
100 {
101 return rb500_gpio_get_value(gpio);
102 }
103
104 static inline void gpio_set_value(unsigned gpio, int value)
105 {
106 rb500_gpio_set_value(gpio, value);
107 }
108
109 static inline int gpio_to_irq(unsigned gpio)
110 {
111 return gpio;
112 }
113
114 static inline int irq_to_gpio(unsigned irq)
115 {
116 return irq;
117 }
118
119 /* For cansleep */
120 #include <asm-generic/gpio.h>
121
122 #endif /* _RC32434_GPIO_H_ */
This page took 0.042727 seconds and 5 git commands to generate.