package/mac80211/patches/409-ath9k-remove-u16-casts-from-rtc-register-access.patch

   1 From 491719852fb049d0a65dc05550b645b62d799453 Mon Sep 17 00:00:00 2001
   2 From: Gabor Juhos <juhosg@openwrt.org>
   3 Date: Mon, 5 Jan 2009 11:11:28 +0100
   4 Subject: [PATCH 09/11] ath9k: remove (u16) casts from rtc register access
   5
   6 The RTC register offsets don't fit into 'u16' on the AR913x, so we have
   7 to remove the existing casts.
   8
   9 Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
  10 Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
  11 ---
  12  drivers/net/wireless/ath9k/hw.c |   14 +++++++-------
  13  1 files changed, 7 insertions(+), 7 deletions(-)
  14
  15 --- a/drivers/net/wireless/ath9k/hw.c
  16 +++ b/drivers/net/wireless/ath9k/hw.c
  17 @@ -1010,7 +1010,7 @@ static void ath9k_hw_init_pll(struct ath
  18                                 pll |= SM(0xb, AR_RTC_PLL_DIV);
  19                 }
  20         }
  21 -       REG_WRITE(ah, (u16) (AR_RTC_PLL_CONTROL), pll);
  22 +       REG_WRITE(ah, (AR_RTC_PLL_CONTROL), pll);
  23
  24         udelay(RTC_PLL_SETTLE_DELAY);
  25
  26 @@ -1550,11 +1550,11 @@ static bool ath9k_hw_set_reset(struct at
  27                         rst_flags |= AR_RTC_RC_MAC_COLD;
  28         }
  29
  30 -       REG_WRITE(ah, (u16) (AR_RTC_RC), rst_flags);
  31 +       REG_WRITE(ah, (AR_RTC_RC), rst_flags);
  32         udelay(50);
  33
  34 -       REG_WRITE(ah, (u16) (AR_RTC_RC), 0);
  35 -       if (!ath9k_hw_wait(ah, (u16) (AR_RTC_RC), AR_RTC_RC_M, 0)) {
  36 +       REG_WRITE(ah, (AR_RTC_RC), 0);
  37 +       if (!ath9k_hw_wait(ah, (AR_RTC_RC), AR_RTC_RC_M, 0)) {
  38                 DPRINTF(ah->ah_sc, ATH_DBG_RESET,
  39                         "RTC stuck in MAC reset\n");
  40                 return false;
  41 @@ -1576,8 +1576,8 @@ static bool ath9k_hw_set_reset_power_on(
  42         REG_WRITE(ah, AR_RTC_FORCE_WAKE, AR_RTC_FORCE_WAKE_EN |
  43                   AR_RTC_FORCE_WAKE_ON_INT);
  44
  45 -       REG_WRITE(ah, (u16) (AR_RTC_RESET), 0);
  46 -       REG_WRITE(ah, (u16) (AR_RTC_RESET), 1);
  47 +       REG_WRITE(ah, (AR_RTC_RESET), 0);
  48 +       REG_WRITE(ah, (AR_RTC_RESET), 1);
  49
  50         if (!ath9k_hw_wait(ah,
  51                            AR_RTC_STATUS,
  52 @@ -2602,7 +2602,7 @@ static void ath9k_set_power_sleep(struct
  53                 if (!AR_SREV_9100(ah))
  54                         REG_WRITE(ah, AR_RC, AR_RC_AHB | AR_RC_HOSTIF);
  55
  56 -               REG_CLR_BIT(ah, (u16) (AR_RTC_RESET),
  57 +               REG_CLR_BIT(ah, (AR_RTC_RESET),
  58                             AR_RTC_RESET_EN);
  59         }
  60  }