target/linux/lantiq/patches/0005-MIPS-lantiq-make-irq.c-support-the-FALC-ON.patch

   1 From d9355bb07878f9aa40856cc437c43cedc87662fc Mon Sep 17 00:00:00 2001
   2 From: John Crispin <blogic@openwrt.org>
   3 Date: Thu, 11 Aug 2011 12:25:55 +0200
   4 Subject: [PATCH 05/24] MIPS: lantiq: make irq.c support the FALC-ON
   5
   6 There are minor differences in how irqs work on xway and falcon socs.
   7 Xway needs 2 quirks that we need to disable for falcon to also work with
   8 this code.
   9
  10 * EBU irq does not need to send a special ack to the EBU
  11 * The EIU does not exist
  12
  13 Signed-off-by: John Crispin <blogic@openwrt.org>
  14 Signed-off-by: Thomas Langer <thomas.langer@lantiq.com>
  15 Cc: linux-mips@linux-mips.org
  16 ---
  17  arch/mips/lantiq/irq.c |   24 +++++++++++++-----------
  18  1 files changed, 13 insertions(+), 11 deletions(-)
  19
  20 --- a/arch/mips/lantiq/irq.c
  21 +++ b/arch/mips/lantiq/irq.c
  22 @@ -195,7 +195,7 @@ static void ltq_hw_irqdispatch(int modul
  23         do_IRQ((int)irq + INT_NUM_IM0_IRL0 + (INT_NUM_IM_OFFSET * module));
  24
  25         /* if this is a EBU irq, we need to ack it or get a deadlock */
  26 -       if ((irq == LTQ_ICU_EBU_IRQ) && (module == 0))
  27 +       if ((irq == LTQ_ICU_EBU_IRQ) && (module == 0) && LTQ_EBU_PCC_ISTAT)
  28                 ltq_ebu_w32(ltq_ebu_r32(LTQ_EBU_PCC_ISTAT) | 0x10,
  29                         LTQ_EBU_PCC_ISTAT);
  30  }
  31 @@ -260,17 +260,19 @@ void __init arch_init_irq(void)
  32         if (!ltq_icu_membase)
  33                 panic("Failed to remap icu memory\n");
  34
  35 -       if (insert_resource(&iomem_resource, &ltq_eiu_resource) < 0)
  36 -               panic("Failed to insert eiu memory\n");
  37 +       if (LTQ_EIU_BASE_ADDR) {
  38 +               if (insert_resource(&iomem_resource, &ltq_eiu_resource) < 0)
  39 +                       panic("Failed to insert eiu memory\n");
  40 +
  41 +               if (request_mem_region(ltq_eiu_resource.start,
  42 +                               resource_size(&ltq_eiu_resource), "eiu") < 0)
  43 +                       panic("Failed to request eiu memory\n");
  44
  45 -       if (request_mem_region(ltq_eiu_resource.start,
  46 -                       resource_size(&ltq_eiu_resource), "eiu") < 0)
  47 -               panic("Failed to request eiu memory\n");
  48 -
  49 -       ltq_eiu_membase = ioremap_nocache(ltq_eiu_resource.start,
  50 +               ltq_eiu_membase = ioremap_nocache(ltq_eiu_resource.start,
  51                                 resource_size(&ltq_eiu_resource));
  52 -       if (!ltq_eiu_membase)
  53 -               panic("Failed to remap eiu memory\n");
  54 +               if (!ltq_eiu_membase)
  55 +                       panic("Failed to remap eiu memory\n");
  56 +       }
  57
  58         /* make sure all irqs are turned off by default */
  59         for (i = 0; i < 5; i++)
  60 @@ -296,8 +298,8 @@ void __init arch_init_irq(void)
  61
  62         for (i = INT_NUM_IRQ0;
  63                 i <= (INT_NUM_IRQ0 + (5 * INT_NUM_IM_OFFSET)); i++)
  64 -               if ((i == LTQ_EIU_IR0) || (i == LTQ_EIU_IR1) ||
  65 -                       (i == LTQ_EIU_IR2))
  66 +               if (((i == LTQ_EIU_IR0) || (i == LTQ_EIU_IR1) ||
  67 +                       (i == LTQ_EIU_IR2)) && LTQ_EIU_BASE_ADDR)
  68                         irq_set_chip_and_handler(i, &ltq_eiu_type,
  69                                 handle_level_irq);
  70                 /* EIU3-5 only exist on ar9 and vr9 */