target/linux/kirkwood/patches/004-cpuidle.patch

   1 From: Rabeeh Khoury <rabeeh@marvell.com>
   2 Date: Tue, 24 Mar 2009 14:10:15 +0000 (+0200)
   3 Subject: [ARM] Kirkwood: CPU idle driver
   4 X-Git-Url: http://git.marvell.com/?p=orion.git;a=commitdiff_plain;h=039b97666e1335eac517c7d35a0fa1143af689f0;hp=56a50adda49b2020156616c4eb15353e0f9ad7de
   5
   6 [ARM] Kirkwood: CPU idle driver
   7
   8 The patch adds support for Kirkwood cpu idle.
   9 Two idle states are defined:
  10 1. Wait-for-interrupt (replacing default kirkwood wfi)
  11 2. Wait-for-interrupt and DDR self refresh
  12
  13 Signed-off-by: Rabeeh Khoury <rabeeh@marvell.com>
  14 Signed-off-by: Nicolas Pitre <nico@marvell.com>
  15 ---
  16
  17 --- a/arch/arm/configs/kirkwood_defconfig
  18 +++ b/arch/arm/configs/kirkwood_defconfig
  19 @@ -270,7 +270,9 @@ CONFIG_CMDLINE=""
  20  #
  21  # CPU Power Management
  22  #
  23 -# CONFIG_CPU_IDLE is not set
  24 +CONFIG_CPU_IDLE=y
  25 +CONFIG_CPU_IDLE_GOV_LADDER=y
  26 +CONFIG_CPU_IDLE_GOV_MENU=y
  27
  28  #
  29  # Floating point emulation
  30 --- a/arch/arm/mach-kirkwood/Makefile
  31 +++ b/arch/arm/mach-kirkwood/Makefile
  32 @@ -5,3 +5,5 @@ obj-$(CONFIG_MACH_RD88F6192_NAS)        += rd88
  33  obj-$(CONFIG_MACH_RD88F6281)           += rd88f6281-setup.o
  34  obj-$(CONFIG_MACH_SHEEVAPLUG)          += sheevaplug-setup.o
  35  obj-$(CONFIG_MACH_TS219)               += ts219-setup.o
  36 +
  37 +obj-$(CONFIG_CPU_IDLE)                 += cpuidle.o
  38 --- /dev/null
  39 +++ b/arch/arm/mach-kirkwood/cpuidle.c
  40 @@ -0,0 +1,96 @@
  41 +/*
  42 + * arch/arm/mach-kirkwood/cpuidle.c
  43 + *
  44 + * CPU idle Marvell Kirkwood SoCs
  45 + *
  46 + * This file is licensed under the terms of the GNU General Public
  47 + * License version 2.  This program is licensed "as is" without any
  48 + * warranty of any kind, whether express or implied.
  49 + *
  50 + * The cpu idle uses wait-for-interrupt and DDR self refresh in order
  51 + * to implement two idle states -
  52 + * #1 wait-for-interrupt
  53 + * #2 wait-for-interrupt and DDR self refresh
  54 + */
  55 +
  56 +#include <linux/kernel.h>
  57 +#include <linux/init.h>
  58 +#include <linux/platform_device.h>
  59 +#include <linux/cpuidle.h>
  60 +#include <asm/io.h>
  61 +#include <asm/proc-fns.h>
  62 +#include <mach/kirkwood.h>
  63 +
  64 +#define KIRKWOOD_MAX_STATES    2
  65 +
  66 +static struct cpuidle_driver kirkwood_idle_driver = {
  67 +       .name =         "kirkwood_idle",
  68 +       .owner =        THIS_MODULE,
  69 +};
  70 +
  71 +static DEFINE_PER_CPU(struct cpuidle_device, kirkwood_cpuidle_device);
  72 +
  73 +/* Actual code that puts the SoC in different idle states */
  74 +static int kirkwood_enter_idle(struct cpuidle_device *dev,
  75 +                              struct cpuidle_state *state)
  76 +{
  77 +       struct timeval before, after;
  78 +       int idle_time;
  79 +
  80 +       local_irq_disable();
  81 +       do_gettimeofday(&before);
  82 +       if (state == &dev->states[0])
  83 +               /* Wait for interrupt state */
  84 +               cpu_do_idle();
  85 +       else if (state == &dev->states[1]) {
  86 +               /*
  87 +                * Following write will put DDR in self refresh.
  88 +                * Note that we have 256 cycles before DDR puts it
  89 +                * self in self-refresh, so the wait-for-interrupt
  90 +                * call afterwards won't get the DDR from self refresh
  91 +                * mode.
  92 +                */
  93 +               writel(0x7, DDR_OPERATION_BASE);
  94 +               cpu_do_idle();
  95 +       }
  96 +       do_gettimeofday(&after);
  97 +       local_irq_enable();
  98 +       idle_time = (after.tv_sec - before.tv_sec) * USEC_PER_SEC +
  99 +                       (after.tv_usec - before.tv_usec);
 100 +       return idle_time;
 101 +}
 102 +
 103 +/* Initialize CPU idle by registering the idle states */
 104 +static int kirkwood_init_cpuidle(void)
 105 +{
 106 +       struct cpuidle_device *device;
 107 +
 108 +       cpuidle_register_driver(&kirkwood_idle_driver);
 109 +
 110 +       device = &per_cpu(kirkwood_cpuidle_device, smp_processor_id());
 111 +       device->state_count = KIRKWOOD_MAX_STATES;
 112 +
 113 +       /* Wait for interrupt state */
 114 +       device->states[0].enter = kirkwood_enter_idle;
 115 +       device->states[0].exit_latency = 1;
 116 +       device->states[0].target_residency = 10000;
 117 +       device->states[0].flags = CPUIDLE_FLAG_TIME_VALID;
 118 +       strcpy(device->states[0].name, "WFI");
 119 +       strcpy(device->states[0].desc, "Wait for interrupt");
 120 +
 121 +       /* Wait for interrupt and DDR self refresh state */
 122 +       device->states[1].enter = kirkwood_enter_idle;
 123 +       device->states[1].exit_latency = 10;
 124 +       device->states[1].target_residency = 10000;
 125 +       device->states[1].flags = CPUIDLE_FLAG_TIME_VALID;
 126 +       strcpy(device->states[1].name, "DDR SR");
 127 +       strcpy(device->states[1].desc, "WFI and DDR Self Refresh");
 128 +
 129 +       if (cpuidle_register_device(device)) {
 130 +               printk(KERN_ERR "kirkwood_init_cpuidle: Failed registering\n");
 131 +               return -EIO;
 132 +       }
 133 +       return 0;
 134 +}
 135 +
 136 +device_initcall(kirkwood_init_cpuidle);
 137 --- a/arch/arm/mach-kirkwood/include/mach/kirkwood.h
 138 +++ b/arch/arm/mach-kirkwood/include/mach/kirkwood.h
 139 @@ -48,6 +48,7 @@
 140   */
 141  #define DDR_VIRT_BASE          (KIRKWOOD_REGS_VIRT_BASE | 0x00000)
 142  #define  DDR_WINDOW_CPU_BASE   (DDR_VIRT_BASE | 0x1500)
 143 +#define DDR_OPERATION_BASE     (DDR_VIRT_BASE | 0x1418)
 144
 145  #define DEV_BUS_PHYS_BASE      (KIRKWOOD_REGS_PHYS_BASE | 0x10000)
 146  #define DEV_BUS_VIRT_BASE      (KIRKWOOD_REGS_VIRT_BASE | 0x10000)