target/linux/s3c24xx/files-2.6.30/drivers/ar6000/include/targaddrs.h

   1 /*
   2  * Copyright (c) 2004-2007 Atheros Communications Inc.
   3  * All rights reserved.
   4  *
   5  * $ATH_LICENSE_HOSTSDK0_C$
   6  *
   7  */
   8
   9 #ifndef __TARGADDRS_H__
  10 #define __TARGADDRS_H__
  11 #if defined(AR6001)
  12 #include "AR6001/addrs.h"
  13 #endif
  14 #if defined(AR6002)
  15 #include "AR6002/addrs.h"
  16 #endif
  17
  18 /*
  19  * AR6K option bits, to enable/disable various features.
  20  * By default, all option bits are 0.
  21  * These bits can be set in LOCAL_SCRATCH register 0.
  22  */
  23 #define AR6K_OPTION_BMI_DISABLE      0x01 /* Disable BMI comm with Host */
  24 #define AR6K_OPTION_SERIAL_ENABLE    0x02 /* Enable serial port msgs */
  25 #define AR6K_OPTION_WDT_DISABLE      0x04 /* WatchDog Timer override */
  26 #define AR6K_OPTION_SLEEP_DISABLE    0x08 /* Disable system sleep */
  27 #define AR6K_OPTION_STOP_BOOT        0x10 /* Stop boot processes (for ATE) */
  28 #define AR6K_OPTION_ENABLE_NOANI     0x20 /* Operate without ANI */
  29 #define AR6K_OPTION_DSET_DISABLE     0x40 /* Ignore DataSets */
  30 #define AR6K_OPTION_IGNORE_FLASH     0x80 /* Ignore flash during bootup */
  31
  32 /*
  33  * xxx_HOST_INTEREST_ADDRESS is the address in Target RAM of the
  34  * host_interest structure.  It must match the address of the _host_interest
  35  * symbol (see linker script).
  36  *
  37  * Host Interest is shared between Host and Target in order to coordinate
  38  * between the two, and is intended to remain constant (with additions only
  39  * at the end) across software releases.
  40  */
  41 #define AR6001_HOST_INTEREST_ADDRESS     0x80000600
  42 #define AR6002_HOST_INTEREST_ADDRESS     0x00500400
  43
  44 #define HOST_INTEREST_MAX_SIZE          0x100
  45
  46 #if !defined(__ASSEMBLER__)
  47 struct register_dump_s;
  48 struct dbglog_hdr_s;
  49
  50 /*
  51  * These are items that the Host may need to access
  52  * via BMI or via the Diagnostic Window. The position
  53  * of items in this structure must remain constant
  54  * across firmware revisions!
  55  *
  56  * Types for each item must be fixed size across
  57  * target and host platforms.
  58  *
  59  * More items may be added at the end.
  60  */
  61 struct host_interest_s {
  62     /*
  63      * Pointer to application-defined area, if any.
  64      * Set by Target application during startup.
  65      */
  66     A_UINT32               hi_app_host_interest;                      /* 0x00 */
  67
  68     /* Pointer to register dump area, valid after Target crash. */
  69     A_UINT32               hi_failure_state;                          /* 0x04 */
  70
  71     /* Pointer to debug logging header */
  72     A_UINT32               hi_dbglog_hdr;                             /* 0x08 */
  73
  74     /* Indicates whether or not flash is present on Target.
  75      * NB: flash_is_present indicator is here not just
  76      * because it might be of interest to the Host; but
  77      * also because it's set early on by Target's startup
  78      * asm code and we need it to have a special RAM address
  79      * so that it doesn't get reinitialized with the rest
  80      * of data.
  81      */
  82     A_UINT32               hi_flash_is_present;                       /* 0x0c */
  83
  84     /*
  85      * General-purpose flag bits, similar to AR6000_OPTION_* flags.
  86      * Can be used by application rather than by OS.
  87      */
  88     A_UINT32               hi_option_flag;                            /* 0x10 */
  89
  90     /*
  91      * Boolean that determines whether or not to
  92      * display messages on the serial port.
  93      */
  94     A_UINT32               hi_serial_enable;                          /* 0x14 */
  95
  96     /* Start address of Flash DataSet index, if any */
  97     A_UINT32               hi_dset_list_head;                         /* 0x18 */
  98
  99     /* Override Target application start address */
 100     A_UINT32               hi_app_start;                              /* 0x1c */
 101
 102     /* Clock and voltage tuning */
 103     A_UINT32               hi_skip_clock_init;                        /* 0x20 */
 104     A_UINT32               hi_core_clock_setting;                     /* 0x24 */
 105     A_UINT32               hi_cpu_clock_setting;                      /* 0x28 */
 106     A_UINT32               hi_system_sleep_setting;                   /* 0x2c */
 107     A_UINT32               hi_xtal_control_setting;                   /* 0x30 */
 108     A_UINT32               hi_pll_ctrl_setting_24ghz;                 /* 0x34 */
 109     A_UINT32               hi_pll_ctrl_setting_5ghz;                  /* 0x38 */
 110     A_UINT32               hi_ref_voltage_trim_setting;               /* 0x3c */
 111     A_UINT32               hi_clock_info;                             /* 0x40 */
 112
 113     /*
 114      * Flash configuration overrides, used only
 115      * when firmware is not executing from flash.
 116      * (When using flash, modify the global variables
 117      * with equivalent names.)
 118      */
 119     A_UINT32               hi_bank0_addr_value;                       /* 0x44 */
 120     A_UINT32               hi_bank0_read_value;                       /* 0x48 */
 121     A_UINT32               hi_bank0_write_value;                      /* 0x4c */
 122     A_UINT32               hi_bank0_config_value;                     /* 0x50 */
 123
 124     /* Pointer to Board Data  */
 125     A_UINT32               hi_board_data;                             /* 0x54 */
 126     A_UINT32               hi_board_data_initialized;                 /* 0x58 */
 127
 128     A_UINT32               hi_dset_RAM_index_table;                   /* 0x5c */
 129
 130     A_UINT32               hi_desired_baud_rate;                      /* 0x60 */
 131     A_UINT32               hi_dbglog_config;                          /* 0x64 */
 132     A_UINT32               hi_end_RAM_reserve_sz;                     /* 0x68 */
 133     A_UINT32               hi_mbox_io_block_sz;                       /* 0x6c */
 134
 135     A_UINT32               hi_num_bpatch_streams;                     /* 0x70 */
 136     A_UINT32               hi_mbox_isr_yield_limit;                   /* 0x74 */
 137
 138     A_UINT32               hi_refclk_hz;                              /* 0x78 */
 139 };
 140
 141 /* Bits defined in hi_option_flag */
 142 #define HI_OPTION_TIMER_WAR     1 /* not really used */
 143
 144 /*
 145  * Intended for use by Host software, this macro returns the Target RAM
 146  * address of any item in the host_interest structure.
 147  * Example: target_addr = AR6001_HOST_INTEREST_ITEM_ADDRESS(hi_board_data);
 148  */
 149 #define AR6001_HOST_INTEREST_ITEM_ADDRESS(item) \
 150     ((A_UINT32)&((((struct host_interest_s *)(AR6001_HOST_INTEREST_ADDRESS))->item)))
 151
 152 #define AR6002_HOST_INTEREST_ITEM_ADDRESS(item) \
 153     ((A_UINT32)&((((struct host_interest_s *)(AR6002_HOST_INTEREST_ADDRESS))->item)))
 154
 155
 156 #endif /* !__ASSEMBLER__ */
 157
 158 #endif /* __TARGADDRS_H__ */