target/linux/xburst/files-2.6.32/drivers/video/jz4740_fb.c

   1 /*
   2  *  Copyright (C) 2009, Lars-Peter Clausen <lars@metafoo.de>
   3  *      JZ4720/JZ4740 SoC LCD framebuffer driver
   4  *
   5  *  This program is free software; you can redistribute  it and/or modify it
   6  *  under  the terms of  the GNU General  Public License as published by the
   7  *  Free Software Foundation;  either version 2 of the  License, or (at your
   8  *  option) any later version.
   9  *
  10  *  You should have received a copy of the  GNU General Public License along
  11  *  with this program; if not, write  to the Free Software Foundation, Inc.,
  12  *  675 Mass Ave, Cambridge, MA 02139, USA.
  13  *
  14  */
  15
  16 #include <linux/types.h>
  17 #include <linux/platform_device.h>
  18 #include <linux/fb.h>
  19 #include <linux/module.h>
  20 #include <linux/dma-mapping.h>
  21 #include <linux/jz4740_fb.h>
  22
  23 #include <linux/delay.h>
  24 #include <linux/clk.h>
  25
  26 #include <asm/mach-jz4740/gpio.h>
  27
  28 #define JZ_REG_LCD_CFG          0x00
  29 #define JZ_REG_LCD_VSYNC        0x04
  30 #define JZ_REG_LCD_HSYNC        0x08
  31 #define JZ_REG_LCD_VAT          0x0C
  32 #define JZ_REG_LCD_DAH          0x10
  33 #define JZ_REG_LCD_DAV          0x14
  34 #define JZ_REG_LCD_PS           0x18
  35 #define JZ_REG_LCD_CLS          0x1C
  36 #define JZ_REG_LCD_SPL          0x20
  37 #define JZ_REG_LCD_REV          0x24
  38 #define JZ_REG_LCD_CTRL         0x30
  39 #define JZ_REG_LCD_STATE        0x34
  40 #define JZ_REG_LCD_IID          0x38
  41 #define JZ_REG_LCD_DA0          0x40
  42 #define JZ_REG_LCD_SA0          0x44
  43 #define JZ_REG_LCD_FID0         0x48
  44 #define JZ_REG_LCD_CMD0         0x4C
  45 #define JZ_REG_LCD_DA1          0x50
  46 #define JZ_REG_LCD_SA1          0x54
  47 #define JZ_REG_LCD_FID1         0x58
  48 #define JZ_REG_LCD_CMD1         0x5C
  49
  50 #define JZ_LCD_CFG_SLCD BIT(31)
  51 #define JZ_LCD_CFG_PSM BIT(23)
  52 #define JZ_LCD_CFG_CLSM BIT(22)
  53 #define JZ_LCD_CFG_SPLM BIT(21)
  54 #define JZ_LCD_CFG_REVM BIT(20)
  55 #define JZ_LCD_CFG_HSYNCM BIT(19)
  56 #define JZ_LCD_CFG_PCLKM BIT(18)
  57 #define JZ_LCD_CFG_INV BIT(17)
  58 #define JZ_LCD_CFG_SYNC_DIR BIT(16)
  59 #define JZ_LCD_CFG_PSP BIT(15)
  60 #define JZ_LCD_CFG_CLSP BIT(14)
  61 #define JZ_LCD_CFG_SPLP BIT(13)
  62 #define JZ_LCD_CFG_REVP BIT(12)
  63 #define JZ_LCD_CFG_HSYNCP BIT(11)
  64 #define JZ_LCD_CFG_PCLKP BIT(10)
  65 #define JZ_LCD_CFG_DEP BIT(9)
  66 #define JZ_LCD_CFG_VSYNCP BIT(8)
  67 #define JZ_LCD_CFG_18_BIT BIT(7)
  68 #define JZ_LCD_CFG_PDW BIT(5) | BIT(4)
  69 #define JZ_LCD_CFG_MODE_MASK 0xf
  70
  71 #define JZ_LCD_CTRL_BURST_4 (0x0 << 28)
  72 #define JZ_LCD_CTRL_BURST_8 (0x1 << 28)
  73 #define JZ_LCD_CTRL_BURST_16 (0x2 << 28)
  74 #define JZ_LCD_CTRL_RGB555 BIT(27)
  75 #define JZ_LCD_CTRL_OFUP BIT(26)
  76 #define JZ_LCD_CTRL_FRC_GRAYSCALE_16 (0x0 << 24)
  77 #define JZ_LCD_CTRL_FRC_GRAYSCALE_4 (0x1 << 24)
  78 #define JZ_LCD_CTRL_FRC_GRAYSCALE_2 (0x2 << 24)
  79 #define JZ_LCD_CTRL_PDD_MASK (0xff << 16)
  80 #define JZ_LCD_CTRL_EOF_IRQ BIT(13)
  81 #define JZ_LCD_CTRL_SOF_IRQ BIT(12)
  82 #define JZ_LCD_CTRL_OFU_IRQ BIT(11)
  83 #define JZ_LCD_CTRL_IFU0_IRQ BIT(10)
  84 #define JZ_LCD_CTRL_IFU1_IRQ BIT(9)
  85 #define JZ_LCD_CTRL_DD_IRQ BIT(8)
  86 #define JZ_LCD_CTRL_QDD_IRQ BIT(7)
  87 #define JZ_LCD_CTRL_REVERSE_ENDIAN BIT(6)
  88 #define JZ_LCD_CTRL_LSB_FISRT BIT(5)
  89 #define JZ_LCD_CTRL_DISABLE BIT(4)
  90 #define JZ_LCD_CTRL_ENABLE BIT(3)
  91 #define JZ_LCD_CTRL_BPP_1 0x0
  92 #define JZ_LCD_CTRL_BPP_2 0x1
  93 #define JZ_LCD_CTRL_BPP_4 0x2
  94 #define JZ_LCD_CTRL_BPP_8 0x3
  95 #define JZ_LCD_CTRL_BPP_15_16 0x4
  96 #define JZ_LCD_CTRL_BPP_18_24 0x5
  97
  98 #define JZ_LCD_CMD_SOF_IRQ BIT(15)
  99 #define JZ_LCD_CMD_EOF_IRQ BIT(16)
 100 #define JZ_LCD_CMD_ENABLE_PAL BIT(12)
 101
 102 #define JZ_LCD_SYNC_MASK 0x3ff
 103
 104 #define JZ_LCD_STATE_DISABLED BIT(0)
 105
 106 struct jzfb_framedesc {
 107         uint32_t next;
 108         uint32_t addr;
 109         uint32_t id;
 110         uint32_t cmd;
 111 } __attribute__((packed));
 112
 113 struct jzfb {
 114         struct fb_info *fb;
 115         struct platform_device *pdev;
 116         void __iomem *base;
 117         struct resource *mem;
 118         struct jz4740_fb_platform_data *pdata;
 119
 120         void *devmem;
 121         size_t devmem_size;
 122         dma_addr_t devmem_phys;
 123         void *vidmem;
 124         size_t vidmem_size;
 125         dma_addr_t vidmem_phys;
 126         struct jzfb_framedesc *framedesc;
 127
 128         struct clk *ldclk;
 129         struct clk *lpclk;
 130
 131         uint32_t pseudo_palette[16];
 132         unsigned is_enabled:1;
 133 };
 134
 135 static struct fb_fix_screeninfo jzfb_fix __devinitdata = {
 136         .id =           "JZ4740 FB",
 137         .type =         FB_TYPE_PACKED_PIXELS,
 138         .visual =       FB_VISUAL_TRUECOLOR,
 139         .xpanstep =     0,
 140         .ypanstep =     0,
 141         .ywrapstep =    0,
 142         .accel =        FB_ACCEL_NONE,
 143 };
 144
 145 const static struct jz_gpio_bulk_request jz_lcd_pins[] = {
 146         JZ_GPIO_BULK_PIN(LCD_PCLK),
 147         JZ_GPIO_BULK_PIN(LCD_HSYNC),
 148         JZ_GPIO_BULK_PIN(LCD_VSYNC),
 149         JZ_GPIO_BULK_PIN(LCD_DATA0),
 150         JZ_GPIO_BULK_PIN(LCD_DATA1),
 151         JZ_GPIO_BULK_PIN(LCD_DATA2),
 152         JZ_GPIO_BULK_PIN(LCD_DATA3),
 153         JZ_GPIO_BULK_PIN(LCD_DATA4),
 154         JZ_GPIO_BULK_PIN(LCD_DATA5),
 155         JZ_GPIO_BULK_PIN(LCD_DATA6),
 156         JZ_GPIO_BULK_PIN(LCD_DATA7),
 157 };
 158
 159
 160 int jzfb_setcolreg(unsigned regno, unsigned red, unsigned green, unsigned blue,
 161                         unsigned transp, struct fb_info *fb)
 162 {
 163         ((uint32_t*)fb->pseudo_palette)[regno] = red << 16 | green << 8 | blue;
 164         return 0;
 165 }
 166
 167 static int jzfb_get_controller_bpp(struct jzfb *jzfb)
 168 {
 169         switch(jzfb->pdata->bpp) {
 170                 case 18:
 171                 case 24:
 172                         return 32;
 173                         break;
 174                 default:
 175                         return jzfb->pdata->bpp;
 176         }
 177 }
 178
 179 static int jzfb_check_var(struct fb_var_screeninfo *var, struct fb_info *fb)
 180 {
 181         struct jzfb* jzfb = fb->par;
 182         struct fb_videomode *mode = jzfb->pdata->modes;
 183         int i;
 184
 185         if (fb->var.bits_per_pixel != jzfb_get_controller_bpp(jzfb) &&
 186                 fb->var.bits_per_pixel != jzfb->pdata->bpp)
 187                 return -EINVAL;
 188
 189         for (i = 0; i < jzfb->pdata->num_modes; ++i, ++mode) {
 190                 if (mode->xres == fb->var.xres && mode->yres == fb->var.yres)
 191                         break;
 192         }
 193
 194         if (i == jzfb->pdata->num_modes)
 195                 return -EINVAL;
 196
 197         fb_videomode_to_var(&fb->var, fb->mode);
 198
 199         switch (jzfb->pdata->bpp) {
 200         case 8:
 201                 break;
 202         case 15:
 203                 var->red.offset = 10;
 204                 var->red.length = 5;
 205                 var->green.offset = 6;
 206                 var->green.length = 5;
 207                 var->blue.offset = 0;
 208                 var->blue.length = 5;
 209                 break;
 210         case 16:
 211                 var->red.offset = 11;
 212                 var->red.length = 5;
 213                 var->green.offset = 6;
 214                 var->green.length = 6;
 215                 var->blue.offset = 0;
 216                 var->blue.length = 5;
 217                 break;
 218         case 18:
 219                 var->red.offset = 16;
 220                 var->red.length = 6;
 221                 var->green.offset = 8;
 222                 var->green.length = 6;
 223                 var->blue.offset = 0;
 224                 var->blue.length = 6;
 225                 fb->var.bits_per_pixel = 32;
 226                 break;
 227         case 32:
 228         case 24:
 229                 var->transp.offset = 24;
 230                 var->transp.length = 8;
 231                 var->red.offset = 16;
 232                 var->red.length = 8;
 233                 var->green.offset = 8;
 234                 var->green.length = 8;
 235                 var->blue.offset = 0;
 236                 var->blue.length = 8;
 237                 fb->var.bits_per_pixel = 32;
 238                 break;
 239         default:
 240                 break;
 241         }
 242
 243         return 0;
 244 }
 245
 246 static int jzfb_set_par(struct fb_info *info)
 247 {
 248         struct jzfb* jzfb = info->par;
 249         struct fb_var_screeninfo *var = &info->var;
 250         uint16_t hds, vds;
 251         uint16_t hde, vde;
 252         uint16_t ht, vt;
 253         uint32_t ctrl;
 254
 255         hds = var->hsync_len + var->left_margin;
 256         hde = hds + var->xres;
 257         ht = hde + var->right_margin;
 258
 259         vds = var->vsync_len + var->upper_margin;
 260         vde = vds + var->yres;
 261         vt = vde + var->lower_margin;
 262
 263         writel(var->hsync_len, jzfb->base + JZ_REG_LCD_HSYNC);
 264         writel(var->vsync_len, jzfb->base + JZ_REG_LCD_VSYNC);
 265
 266         writel((ht << 16) | vt, jzfb->base + JZ_REG_LCD_VAT);
 267
 268         writel((hds << 16) | hde, jzfb->base + JZ_REG_LCD_DAH);
 269         writel((vds << 16) | vde, jzfb->base + JZ_REG_LCD_DAV);
 270
 271         ctrl = JZ_LCD_CTRL_OFUP | JZ_LCD_CTRL_BURST_16;
 272         ctrl |= JZ_LCD_CTRL_ENABLE;
 273
 274         switch (jzfb->pdata->bpp) {
 275         case 1:
 276                 ctrl |= JZ_LCD_CTRL_BPP_1;
 277                 break;
 278         case 2:
 279                 ctrl |= JZ_LCD_CTRL_BPP_2;
 280                 break;
 281         case 4:
 282                 ctrl |= JZ_LCD_CTRL_BPP_4;
 283                 break;
 284         case 8:
 285                 ctrl |= JZ_LCD_CTRL_BPP_8;
 286         break;
 287         case 15:
 288                 ctrl |= JZ_LCD_CTRL_RGB555; /* Falltrough */
 289         case 16:
 290                 ctrl |= JZ_LCD_CTRL_BPP_15_16;
 291                 break;
 292         case 18:
 293         case 24:
 294         case 32:
 295                 ctrl |= JZ_LCD_CTRL_BPP_18_24;
 296                 break;
 297         default:
 298                 break;
 299         }
 300         writel(ctrl, jzfb->base + JZ_REG_LCD_CTRL);
 301
 302         return 0;
 303 }
 304
 305 static int jzfb_blank(int blank_mode, struct fb_info *info)
 306 {
 307         struct jzfb* jzfb = info->par;
 308         uint32_t ctrl = readl(jzfb->base + JZ_REG_LCD_CTRL);
 309
 310         switch (blank_mode) {
 311         case FB_BLANK_UNBLANK:
 312                 if (jzfb->is_enabled)
 313                         return 0;
 314
 315                 jz_gpio_bulk_resume(jz_lcd_pins, ARRAY_SIZE(jz_lcd_pins));
 316                 clk_enable(jzfb->ldclk);
 317                 clk_enable(jzfb->lpclk);
 318
 319                 writel(0, jzfb->base + JZ_REG_LCD_STATE);
 320
 321                 writel(jzfb->framedesc->next, jzfb->base + JZ_REG_LCD_DA0);
 322
 323                 ctrl |= JZ_LCD_CTRL_ENABLE;
 324                 ctrl &= ~JZ_LCD_CTRL_DISABLE;
 325                 writel(ctrl, jzfb->base + JZ_REG_LCD_CTRL);
 326
 327                 jzfb->is_enabled = 1;
 328                 break;
 329         default:
 330                 if (!jzfb->is_enabled)
 331                         return 0;
 332
 333                 ctrl |= JZ_LCD_CTRL_DISABLE;
 334                 writel(ctrl, jzfb->base + JZ_REG_LCD_CTRL);
 335                 do {
 336                         ctrl = readl(jzfb->base + JZ_REG_LCD_STATE);
 337                 } while (!(ctrl & JZ_LCD_STATE_DISABLED));
 338
 339                 clk_disable(jzfb->lpclk);
 340                 clk_disable(jzfb->ldclk);
 341                 jz_gpio_bulk_suspend(jz_lcd_pins, ARRAY_SIZE(jz_lcd_pins));
 342                 jzfb->is_enabled = 0;
 343                 break;
 344         }
 345
 346         return 0;
 347 }
 348
 349
 350 static int jzfb_alloc_vidmem(struct jzfb *jzfb)
 351 {
 352         size_t devmem_size;
 353         int max_videosize = 0;
 354         struct fb_videomode *mode = jzfb->pdata->modes;
 355         struct jzfb_framedesc *framedesc;
 356         void *page;
 357         int i;
 358
 359         for (i = 0; i < jzfb->pdata->num_modes; ++mode, ++i) {
 360                 if (max_videosize < mode->xres * mode->yres)
 361                         max_videosize = mode->xres * mode->yres;
 362         }
 363
 364         max_videosize *= jzfb_get_controller_bpp(jzfb) >> 3;
 365
 366         devmem_size = max_videosize + sizeof(struct jzfb_framedesc);
 367
 368         jzfb->devmem_size = devmem_size;
 369         jzfb->devmem = dma_alloc_coherent(&jzfb->pdev->dev,
 370                                                 PAGE_ALIGN(devmem_size),
 371                                                 &jzfb->devmem_phys, GFP_KERNEL);
 372
 373         if (!jzfb->devmem) {
 374                 return -ENOMEM;
 375         }
 376
 377         for (page = jzfb->vidmem;
 378                  page < jzfb->vidmem + PAGE_ALIGN(jzfb->vidmem_size);
 379                  page += PAGE_SIZE) {
 380                 SetPageReserved(virt_to_page(page));
 381         }
 382
 383
 384         framedesc = jzfb->devmem  + max_videosize;
 385         jzfb->vidmem = jzfb->devmem;
 386         jzfb->vidmem_phys = jzfb->devmem_phys;
 387
 388         framedesc->next = jzfb->devmem_phys + max_videosize;
 389         framedesc->addr = jzfb->devmem_phys;
 390         framedesc->id = 0;
 391         framedesc->cmd = 0;
 392         framedesc->cmd |= max_videosize / 4;
 393
 394         jzfb->framedesc = framedesc;
 395
 396
 397         return 0;
 398 }
 399
 400 static void jzfb_free_devmem(struct jzfb *jzfb)
 401 {
 402         dma_free_coherent(&jzfb->pdev->dev, jzfb->devmem_size, jzfb->devmem,
 403                           jzfb->devmem_phys);
 404 }
 405
 406 static struct  fb_ops jzfb_ops = {
 407         .owner = THIS_MODULE,
 408         .fb_check_var = jzfb_check_var,
 409         .fb_set_par = jzfb_set_par,
 410         .fb_blank = jzfb_blank,
 411         .fb_fillrect    = sys_fillrect,
 412         .fb_copyarea    = sys_copyarea,
 413         .fb_imageblit   = sys_imageblit,
 414         .fb_setcolreg = jzfb_setcolreg,
 415 };
 416
 417 static int __devinit jzfb_probe(struct platform_device *pdev)
 418 {
 419         int ret;
 420         struct jzfb *jzfb;
 421         struct fb_info *fb;
 422         struct jz4740_fb_platform_data *pdata = pdev->dev.platform_data;
 423         struct resource *mem;
 424
 425         if (!pdata) {
 426                 dev_err(&pdev->dev, "Missing platform data\n");
 427                 return -ENOENT;
 428         }
 429
 430         mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 431
 432         if (!mem) {
 433                 dev_err(&pdev->dev, "Failed to get register memory resource\n");
 434                 return -ENOENT;
 435         }
 436
 437         mem = request_mem_region(mem->start, resource_size(mem), pdev->name);
 438
 439         if (!mem) {
 440                 dev_err(&pdev->dev, "Failed to request register memory region\n");
 441                 return -EBUSY;
 442         }
 443
 444
 445         fb = framebuffer_alloc(sizeof(struct jzfb), &pdev->dev);
 446
 447         if (!fb) {
 448                 dev_err(&pdev->dev, "Failed to allocate framebuffer device\n");
 449                 ret = -ENOMEM;
 450                 goto err_release_mem_region;
 451         }
 452
 453         fb->fbops = &jzfb_ops;
 454         fb->flags = FBINFO_DEFAULT;
 455
 456         jzfb = fb->par;
 457         jzfb->pdev = pdev;
 458         jzfb->pdata = pdata;
 459         jzfb->mem = mem;
 460
 461         jzfb->ldclk = clk_get(&pdev->dev, "lcd");
 462         jzfb->lpclk = clk_get(&pdev->dev, "lcd_pclk");
 463
 464         jzfb->is_enabled = 1;
 465
 466         if (IS_ERR(jzfb->ldclk)) {
 467                 ret = PTR_ERR(jzfb->ldclk);
 468                 dev_err(&pdev->dev, "Faild to get device clock: %d\n", ret);
 469                 goto err_framebuffer_release;
 470         }
 471
 472         if (IS_ERR(jzfb->lpclk)) {
 473                 ret = PTR_ERR(jzfb->ldclk);
 474                 dev_err(&pdev->dev, "Faild to get pixel clock: %d\n", ret);
 475                 goto err_framebuffer_release;
 476         }
 477
 478
 479         jzfb->base = ioremap(mem->start, resource_size(mem));
 480
 481         if (!jzfb->base) {
 482                 dev_err(&pdev->dev, "Failed to ioremap register memory region\n");
 483                 ret = -EBUSY;
 484                 goto err_framebuffer_release;
 485         }
 486
 487         platform_set_drvdata(pdev, jzfb);
 488
 489         fb_videomode_to_modelist(pdata->modes, pdata->num_modes,
 490                                  &fb->modelist);
 491         fb->mode = pdata->modes;
 492
 493         fb_videomode_to_var(&fb->var, fb->mode);
 494         fb->var.bits_per_pixel = pdata->bpp;
 495         jzfb_check_var(&fb->var, fb);
 496
 497         ret = jzfb_alloc_vidmem(jzfb);
 498         if (ret) {
 499                 dev_err(&pdev->dev, "Failed to allocate video memory\n");
 500                 goto err_iounmap;
 501         }
 502
 503         fb->fix = jzfb_fix;
 504         fb->fix.line_length = fb->var.bits_per_pixel * fb->var.xres / 8;
 505         fb->fix.mmio_start = mem->start;
 506         fb->fix.mmio_len = resource_size(mem);
 507         fb->fix.smem_start = jzfb->vidmem_phys;
 508         fb->fix.smem_len =  fb->fix.line_length * fb->var.yres;
 509         fb->screen_base = jzfb->vidmem;
 510         fb->pseudo_palette = jzfb->pseudo_palette;
 511
 512         fb_alloc_cmap(&fb->cmap, 256, 0);
 513
 514         jzfb_set_par(fb);
 515         writel(jzfb->framedesc->next, jzfb->base + JZ_REG_LCD_DA0);
 516
 517         jz_gpio_bulk_request(jz_lcd_pins, ARRAY_SIZE(jz_lcd_pins));
 518
 519         ret = register_framebuffer(fb);
 520         if (ret) {
 521                 dev_err(&pdev->dev, "Failed to register framebuffer: %d\n", ret);
 522                 goto err_free_devmem;
 523         }
 524
 525         return 0;
 526 err_free_devmem:
 527         jzfb_free_devmem(jzfb);
 528 err_iounmap:
 529         iounmap(jzfb->base);
 530 err_framebuffer_release:
 531         framebuffer_release(fb);
 532 err_release_mem_region:
 533         release_mem_region(mem->start, resource_size(mem));
 534         return ret;
 535 }
 536
 537 static int __devexit jzfb_remove(struct platform_device *pdev)
 538 {
 539         struct jzfb *jzfb = platform_get_drvdata(pdev);
 540
 541         jz_gpio_bulk_free(jz_lcd_pins, ARRAY_SIZE(jz_lcd_pins));
 542         iounmap(jzfb->base);
 543         release_mem_region(jzfb->mem->start, resource_size(jzfb->mem));
 544         jzfb_free_devmem(jzfb);
 545         platform_set_drvdata(pdev, NULL);
 546         framebuffer_release(jzfb->fb);
 547         return 0;
 548 }
 549
 550 static struct platform_driver jzfb_driver = {
 551         .probe = jzfb_probe,
 552         .remove = __devexit_p(jzfb_remove),
 553
 554         .driver = {
 555                 .name = "jz4740-fb",
 556         },
 557 };
 558
 559 int __init jzfb_init(void)
 560 {
 561         return platform_driver_register(&jzfb_driver);
 562 }
 563 module_init(jzfb_init);
 564
 565 void __exit jzfb_exit(void)
 566 {
 567         platform_driver_unregister(&jzfb_driver);
 568 }
 569 module_exit(jzfb_exit);
 570
 571 MODULE_LICENSE("GPL");
 572 MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
 573 MODULE_DESCRIPTION("JZ4720/JZ4740 SoC LCD framebuffer driver");
 574 MODULE_ALIAS("platform:jz4740-fb");
 575 MODULE_ALIAS("platform:jz4720-fb");