[ramips] add common setup code
[openwrt.git] / target / linux / ramips / files / arch / mips / ralink / rt305x / setup.c
1 /*
2 * Ralink RT305x SoC specific setup
3 *
4 * Copyright (C) 2008 Gabor Juhos <juhosg@openwrt.org>
5 *
6 * Parts of this file are based on Ralink's 2.6.21 BSP
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License version 2 as published
10 * by the Free Software Foundation.
11 */
12
13 #include <linux/kernel.h>
14 #include <linux/init.h>
15 #include <linux/io.h>
16 #include <linux/serial_8250.h>
17
18 #include <asm/bootinfo.h>
19 #include <asm/mips_machine.h>
20 #include <asm/reboot.h>
21 #include <asm/time.h>
22
23 #include <asm/mach-ralink/common.h>
24 #include <asm/mach-ralink/rt305x.h>
25 #include <asm/mach-ralink/rt305x_regs.h>
26
27 #include "machine.h"
28
29 enum rt305x_mach_type rt305x_mach;
30
31 static void rt305x_restart(char *command)
32 {
33 rt305x_sysc_wr(RT305X_RESET_SYSTEM, SYSC_REG_RESET_CTRL);
34 while (1)
35 if (cpu_wait)
36 cpu_wait();
37 }
38
39 static void rt305x_halt(void)
40 {
41 while (1)
42 if (cpu_wait)
43 cpu_wait();
44 }
45
46 static void __init rt305x_detect_mem_size(void)
47 {
48 unsigned long size;
49
50 for (size = RT305X_MEM_SIZE_MIN; size < RT305X_MEM_SIZE_MAX;
51 size <<= 1 ) {
52 if (!memcmp(rt305x_detect_mem_size,
53 rt305x_detect_mem_size + size, 1024))
54 break;
55 }
56
57 add_memory_region(RT305X_SDRAM_BASE, size, BOOT_MEM_RAM);
58 }
59
60 static void __init rt305x_early_serial_setup(void)
61 {
62 struct uart_port p;
63 int err;
64
65 memset(&p, 0, sizeof(p));
66 p.flags = UPF_SKIP_TEST;
67 p.iotype = UPIO_AU;
68 p.uartclk = rt305x_sys_freq;
69 p.regshift = 2;
70 p.type = PORT_16550A;
71
72 p.mapbase = RT305X_UART0_BASE;
73 p.membase = ioremap_nocache(p.mapbase, RT305X_UART0_SIZE);
74 p.line = 0;
75 p.irq = RT305X_INTC_IRQ_UART0;
76
77 err = early_serial_setup(&p);
78 if (err)
79 printk(KERN_ERR "RT305x: early UART0 registration failed %d\n",
80 err);
81
82 p.mapbase = RT305X_UART1_BASE;
83 p.membase = ioremap_nocache(p.mapbase, RT305X_UART1_SIZE);
84 p.line = 1;
85 p.irq = RT305X_INTC_IRQ_UART1;
86
87 err = early_serial_setup(&p);
88 if (err)
89 printk(KERN_ERR "RT305x: early UART1 registration failed %d\n",
90 err);
91 }
92
93 const char *get_system_type(void)
94 {
95 return rt305x_sys_type;
96 }
97
98 unsigned int __cpuinit get_c0_compare_irq(void)
99 {
100 return CP0_LEGACY_COMPARE_IRQ;
101 }
102
103 void __init ramips_soc_setup(void)
104 {
105 rt305x_sysc_base = ioremap_nocache(RT305X_SYSC_BASE, PAGE_SIZE);
106 rt305x_memc_base = ioremap_nocache(RT305X_MEMC_BASE, PAGE_SIZE);
107
108 rt305x_detect_mem_size();
109 rt305x_detect_sys_type();
110 rt305x_detect_sys_freq();
111
112 printk(KERN_INFO "%s running at %lu.%02lu MHz\n", get_system_type(),
113 rt305x_cpu_freq / 1000000,
114 (rt305x_cpu_freq % 1000000) * 100 / 1000000);
115
116 _machine_restart = rt305x_restart;
117 _machine_halt = rt305x_halt;
118 pm_power_off = rt305x_halt;
119
120 rt305x_early_serial_setup();
121 }
122
123 void __init plat_time_init(void)
124 {
125 mips_hpt_frequency = rt305x_cpu_freq / 2;
126 }
127
128 static int __init rt305x_machine_setup(void)
129 {
130 mips_machine_setup(rt305x_mach);
131
132 return 0;
133 }
134
135 arch_initcall(rt305x_machine_setup);
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