1 From 091358d0004ae2d2a28c9132e6976d46cf96fd3e Mon Sep 17 00:00:00 2001
2 From: John Crispin <blogic@openwrt.org>
3 Date: Wed, 21 Mar 2012 14:17:37 +0100
4 Subject: [PATCH 68/70] MIPS: lantiq: adds bootsel helper
7 .../mips/include/asm/mach-lantiq/xway/lantiq_soc.h | 12 ++++++++++++
8 arch/mips/lantiq/xway/reset.c | 12 +++++++++++-
9 2 files changed, 23 insertions(+), 1 deletions(-)
11 --- a/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
12 +++ b/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
14 #define LTQ_MPS_BASE_ADDR (KSEG1 + 0x1F107000)
15 #define LTQ_MPS_CHIPID ((u32 *)(LTQ_MPS_BASE_ADDR + 0x0344))
17 +/* BOOT_SEL - find what boot media we have */
18 +#define BS_EXT_ROM 0x0
27 +extern unsigned char ltq_boot_select(void);
29 /* register access macros for EBU and CGU */
30 #define ltq_ebu_w32(x, y) ltq_w32((x), ltq_ebu_membase + (y))
31 #define ltq_ebu_r32(x) ltq_r32(ltq_ebu_membase + (x))
32 --- a/arch/mips/lantiq/xway/reset.c
33 +++ b/arch/mips/lantiq/xway/reset.c
35 #define RCU_RST_STAT 0x0014
38 -#define RCU_STAT_SHIFT 26
39 +#define RCU_STAT_SHIFT 26
41 +#define RCU_BOOT_SEL_SHIFT 26
42 +#define RCU_BOOT_SEL_MASK 0x7
45 #define RCU_RD_SRST BIT(30)
46 /* Memory Controller */
47 @@ -75,6 +79,12 @@ int ltq_reset_cause(void)
49 EXPORT_SYMBOL_GPL(ltq_reset_cause);
51 +unsigned char ltq_boot_select(void)
53 + u32 val = ltq_rcu_r32(RCU_RST_STAT);
54 + return (val >> RCU_BOOT_SEL_SHIFT) & RCU_BOOT_SEL_MASK;
57 void ltq_reset_once(unsigned int module, ulong usec)
59 ltq_rcu_w32(ltq_rcu_r32(RCU_RST_REQ) | module, RCU_RST_REQ);