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[adm5120] improve support of the Infineon EASY 5120-RT Reference Board
[openwrt.git] / target / linux / adm5120 / files / drivers / usb / host / adm5120-hub.c
1 /*
2 * ADM5120 HCD (Host Controller Driver) for USB
3 *
4 * Copyright (C) 2007,2008 Gabor Juhos <juhosg at openwrt.org>
5 *
6 * This file was derived from: drivers/usb/host/ohci-hub.c
7 * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
8 * (C) Copyright 2000-2004 David Brownell <dbrownell@users.sourceforge.net>
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License version 2 as published
12 * by the Free Software Foundation.
13 *
14 */
15
16 /*-------------------------------------------------------------------------*/
17
18 /*
19 * ADM5120 Root Hub ... the nonsharable stuff
20 */
21
22 #define dbg_port(hc,label,num,value) \
23 admhc_dbg(hc, \
24 "%s port%d " \
25 "= 0x%08x%s%s%s%s%s%s%s%s%s%s%s%s\n", \
26 label, num, value, \
27 (value & ADMHC_PS_PRSC) ? " PRSC" : "", \
28 (value & ADMHC_PS_OCIC) ? " OCIC" : "", \
29 (value & ADMHC_PS_PSSC) ? " PSSC" : "", \
30 (value & ADMHC_PS_PESC) ? " PESC" : "", \
31 (value & ADMHC_PS_CSC) ? " CSC" : "", \
32 \
33 (value & ADMHC_PS_LSDA) ? " LSDA" : "", \
34 (value & ADMHC_PS_PPS) ? " PPS" : "", \
35 (value & ADMHC_PS_PRS) ? " PRS" : "", \
36 (value & ADMHC_PS_POCI) ? " POCI" : "", \
37 (value & ADMHC_PS_PSS) ? " PSS" : "", \
38 \
39 (value & ADMHC_PS_PES) ? " PES" : "", \
40 (value & ADMHC_PS_CCS) ? " CCS" : "" \
41 );
42
43 #define dbg_port_write(hc,label,num,value) \
44 admhc_dbg(hc, \
45 "%s port%d " \
46 "= 0x%08x%s%s%s%s%s%s%s%s%s%s%s%s\n", \
47 label, num, value, \
48 (value & ADMHC_PS_PRSC) ? " PRSC" : "", \
49 (value & ADMHC_PS_OCIC) ? " OCIC" : "", \
50 (value & ADMHC_PS_PSSC) ? " PSSC" : "", \
51 (value & ADMHC_PS_PESC) ? " PESC" : "", \
52 (value & ADMHC_PS_CSC) ? " CSC" : "", \
53 \
54 (value & ADMHC_PS_CPP) ? " CPP" : "", \
55 (value & ADMHC_PS_SPP) ? " SPP" : "", \
56 (value & ADMHC_PS_SPR) ? " SPR" : "", \
57 (value & ADMHC_PS_CPS) ? " CPS" : "", \
58 (value & ADMHC_PS_SPS) ? " SPS" : "", \
59 \
60 (value & ADMHC_PS_SPE) ? " SPE" : "", \
61 (value & ADMHC_PS_CPE) ? " CPE" : "" \
62 );
63
64 /*-------------------------------------------------------------------------*/
65
66 /* hcd->hub_irq_enable() */
67 static void admhc_hub_irq_enable(struct usb_hcd *hcd)
68 {
69 struct admhcd *ahcd = hcd_to_admhcd(hcd);
70
71 spin_lock_irq(&ahcd->lock);
72 if (!ahcd->autostop)
73 del_timer(&hcd->rh_timer); /* Prevent next poll */
74 admhc_intr_enable(ahcd, ADMHC_INTR_INSM);
75 spin_unlock_irq(&ahcd->lock);
76 }
77
78 /*-------------------------------------------------------------------------*/
79
80 /* build "status change" packet (one or two bytes) from HC registers */
81
82 static int
83 admhc_hub_status_data(struct usb_hcd *hcd, char *buf)
84 {
85 struct admhcd *ahcd = hcd_to_admhcd(hcd);
86 int i, changed = 0, length = 1;
87 int any_connected = 0;
88 unsigned long flags;
89 u32 status;
90
91 spin_lock_irqsave(&ahcd->lock, flags);
92 if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags))
93 goto done;
94
95 /* init status */
96 status = admhc_read_rhdesc(ahcd);
97 if (status & (ADMHC_RH_LPSC | ADMHC_RH_OCIC))
98 buf [0] = changed = 1;
99 else
100 buf [0] = 0;
101 if (ahcd->num_ports > 7) {
102 buf [1] = 0;
103 length++;
104 }
105
106 /* look at each port */
107 for (i = 0; i < ahcd->num_ports; i++) {
108 status = admhc_read_portstatus(ahcd, i);
109
110 /* can't autostop if ports are connected */
111 any_connected |= (status & ADMHC_PS_CCS);
112
113 if (status & (ADMHC_PS_CSC | ADMHC_PS_PESC | ADMHC_PS_PSSC
114 | ADMHC_PS_OCIC | ADMHC_PS_PRSC)) {
115 changed = 1;
116 if (i < 7)
117 buf [0] |= 1 << (i + 1);
118 else
119 buf [1] |= 1 << (i - 7);
120 }
121 }
122
123 hcd->poll_rh = admhc_root_hub_state_changes(ahcd, changed,
124 any_connected);
125
126 done:
127 spin_unlock_irqrestore(&ahcd->lock, flags);
128
129 return changed ? length : 0;
130 }
131
132 /*-------------------------------------------------------------------------*/
133
134 static int admhc_get_hub_descriptor(struct admhcd *ahcd, char *buf)
135 {
136 struct usb_hub_descriptor *desc = (struct usb_hub_descriptor *)buf;
137 u32 rh = admhc_read_rhdesc(ahcd);
138 u16 temp;
139
140 desc->bDescriptorType = USB_DT_HUB; /* Hub-descriptor */
141 desc->bPwrOn2PwrGood = ADMHC_POTPGT/2; /* use default value */
142 desc->bHubContrCurrent = 0x00; /* 0mA */
143
144 desc->bNbrPorts = ahcd->num_ports;
145 temp = 1 + (ahcd->num_ports / 8);
146 desc->bDescLength = USB_DT_HUB_NONVAR_SIZE + 2 * temp;
147
148 /* FIXME */
149 temp = 0;
150 if (rh & ADMHC_RH_NPS) /* no power switching? */
151 temp |= 0x0002;
152 if (rh & ADMHC_RH_PSM) /* per-port power switching? */
153 temp |= 0x0001;
154 if (rh & ADMHC_RH_NOCP) /* no overcurrent reporting? */
155 temp |= 0x0010;
156 else if (rh & ADMHC_RH_OCPM) /* per-port overcurrent reporting? */
157 temp |= 0x0008;
158 desc->wHubCharacteristics = (__force __u16)cpu_to_hc16(ahcd, temp);
159
160 /* two bitmaps: ports removable, and usb 1.0 legacy PortPwrCtrlMask */
161 desc->bitmap[0] = 0;
162 desc->bitmap[0] = ~0;
163
164 return 0;
165 }
166
167 static int admhc_get_hub_status(struct admhcd *ahcd, char *buf)
168 {
169 struct usb_hub_status *hs = (struct usb_hub_status *)buf;
170 u32 t = admhc_read_rhdesc(ahcd);
171 u16 status, change;
172
173 status = 0;
174 status |= (t & ADMHC_RH_LPS) ? HUB_STATUS_LOCAL_POWER : 0;
175 status |= (t & ADMHC_RH_OCI) ? HUB_STATUS_OVERCURRENT : 0;
176
177 change = 0;
178 change |= (t & ADMHC_RH_LPSC) ? HUB_CHANGE_LOCAL_POWER : 0;
179 change |= (t & ADMHC_RH_OCIC) ? HUB_CHANGE_OVERCURRENT : 0;
180
181 hs->wHubStatus = (__force __u16)cpu_to_hc16(ahcd, status);
182 hs->wHubChange = (__force __u16)cpu_to_hc16(ahcd, change);
183
184 return 0;
185 }
186
187 static int admhc_get_port_status(struct admhcd *ahcd, unsigned port, char *buf)
188 {
189 struct usb_port_status *ps = (struct usb_port_status *)buf;
190 u32 t = admhc_read_portstatus(ahcd, port);
191 u16 status, change;
192
193 status = 0;
194 status |= (t & ADMHC_PS_CCS) ? USB_PORT_STAT_CONNECTION : 0;
195 status |= (t & ADMHC_PS_PES) ? USB_PORT_STAT_ENABLE : 0;
196 status |= (t & ADMHC_PS_PSS) ? USB_PORT_STAT_SUSPEND : 0;
197 status |= (t & ADMHC_PS_POCI) ? USB_PORT_STAT_OVERCURRENT : 0;
198 status |= (t & ADMHC_PS_PRS) ? USB_PORT_STAT_RESET : 0;
199 status |= (t & ADMHC_PS_PPS) ? USB_PORT_STAT_POWER : 0;
200 status |= (t & ADMHC_PS_LSDA) ? USB_PORT_STAT_LOW_SPEED : 0;
201
202 change = 0;
203 change |= (t & ADMHC_PS_CSC) ? USB_PORT_STAT_C_CONNECTION : 0;
204 change |= (t & ADMHC_PS_PESC) ? USB_PORT_STAT_C_ENABLE : 0;
205 change |= (t & ADMHC_PS_PSSC) ? USB_PORT_STAT_C_SUSPEND : 0;
206 change |= (t & ADMHC_PS_OCIC) ? USB_PORT_STAT_C_OVERCURRENT : 0;
207 change |= (t & ADMHC_PS_PRSC) ? USB_PORT_STAT_C_RESET : 0;
208
209 ps->wPortStatus = (__force __u16)cpu_to_hc16(ahcd, status);
210 ps->wPortChange = (__force __u16)cpu_to_hc16(ahcd, change);
211
212 return 0;
213 }
214
215 /*-------------------------------------------------------------------------*/
216
217 #ifdef CONFIG_USB_OTG
218
219 static int admhc_start_port_reset(struct usb_hcd *hcd, unsigned port)
220 {
221 struct admhcd *ahcd = hcd_to_admhcd(hcd);
222 u32 status;
223
224 if (!port)
225 return -EINVAL;
226 port--;
227
228 /* start port reset before HNP protocol times out */
229 status = admhc_read_portstatus(ahcd, port);
230 if (!(status & ADMHC_PS_CCS))
231 return -ENODEV;
232
233 /* khubd will finish the reset later */
234 admhc_write_portstatus(ahcd, port, ADMHC_PS_PRS);
235 return 0;
236 }
237
238 static void start_hnp(struct admhcd *ahcd);
239
240 #else
241
242 #define admhc_start_port_reset NULL
243
244 #endif
245
246 /*-------------------------------------------------------------------------*/
247
248
249 /* See usb 7.1.7.5: root hubs must issue at least 50 msec reset signaling,
250 * not necessarily continuous ... to guard against resume signaling.
251 * The short timeout is safe for non-root hubs, and is backward-compatible
252 * with earlier Linux hosts.
253 */
254 #ifdef CONFIG_USB_SUSPEND
255 #define PORT_RESET_MSEC 50
256 #else
257 #define PORT_RESET_MSEC 10
258 #endif
259
260 /* this timer value might be vendor-specific ... */
261 #define PORT_RESET_HW_MSEC 10
262
263 /* wrap-aware logic morphed from <linux/jiffies.h> */
264 #define tick_before(t1,t2) ((s16)(((s16)(t1))-((s16)(t2))) < 0)
265
266 /* called from some task, normally khubd */
267 static inline int admhc_port_reset(struct admhcd *ahcd, unsigned port)
268 {
269 u32 t;
270
271 admhc_vdbg(ahcd, "reset port%d\n", port);
272 t = admhc_read_portstatus(ahcd, port);
273 if (!(t & ADMHC_PS_CCS))
274 return -ENODEV;
275
276 admhc_write_portstatus(ahcd, port, ADMHC_PS_SPR);
277 mdelay(10);
278 admhc_write_portstatus(ahcd, port, (ADMHC_PS_SPE | ADMHC_PS_CSC));
279 mdelay(100);
280
281 return 0;
282 }
283
284 static inline int admhc_port_enable(struct admhcd *ahcd, unsigned port)
285 {
286 u32 t;
287
288 admhc_vdbg(ahcd, "enable port%d\n", port);
289 t = admhc_read_portstatus(ahcd, port);
290 if (!(t & ADMHC_PS_CCS))
291 return -ENODEV;
292
293 admhc_write_portstatus(ahcd, port, ADMHC_PS_SPE);
294
295 return 0;
296 }
297
298 static inline int admhc_port_disable(struct admhcd *ahcd, unsigned port)
299 {
300 u32 t;
301
302 admhc_vdbg(ahcd, "disable port%d\n", port);
303 t = admhc_read_portstatus(ahcd, port);
304 if (!(t & ADMHC_PS_CCS))
305 return -ENODEV;
306
307 admhc_write_portstatus(ahcd, port, ADMHC_PS_CPE);
308
309 return 0;
310 }
311
312 static inline int admhc_port_write(struct admhcd *ahcd, unsigned port,
313 u32 val)
314 {
315 #ifdef ADMHC_VERBOSE_DEBUG
316 dbg_port_write(ahcd, "write", port, val);
317 #endif
318 admhc_write_portstatus(ahcd, port, val);
319
320 return 0;
321 }
322
323 static int admhc_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
324 u16 wIndex, char *buf, u16 wLength)
325 {
326 struct admhcd *ahcd = hcd_to_admhcd(hcd);
327 int ports = hcd_to_bus(hcd)->root_hub->maxchild;
328 int ret = 0;
329
330 if (unlikely(!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags)))
331 return -ESHUTDOWN;
332
333 switch (typeReq) {
334 case ClearHubFeature:
335 switch (wValue) {
336 case C_HUB_OVER_CURRENT:
337 #if 0 /* FIXME */
338 admhc_writel(ahcd, ADMHC_RH_OCIC,
339 &ahcd->regs->roothub.status);
340 #endif
341 case C_HUB_LOCAL_POWER:
342 break;
343 default:
344 goto error;
345 }
346 break;
347 case ClearPortFeature:
348 if (!wIndex || wIndex > ports)
349 goto error;
350 wIndex--;
351
352 switch (wValue) {
353 case USB_PORT_FEAT_ENABLE:
354 ret = admhc_port_disable(ahcd, wIndex);
355 break;
356 case USB_PORT_FEAT_SUSPEND:
357 ret = admhc_port_write(ahcd, wIndex, ADMHC_PS_CPS);
358 break;
359 case USB_PORT_FEAT_POWER:
360 ret = admhc_port_write(ahcd, wIndex, ADMHC_PS_CPP);
361 break;
362 case USB_PORT_FEAT_C_CONNECTION:
363 ret = admhc_port_write(ahcd, wIndex, ADMHC_PS_CSC);
364 break;
365 case USB_PORT_FEAT_C_ENABLE:
366 ret = admhc_port_write(ahcd, wIndex, ADMHC_PS_PESC);
367 break;
368 case USB_PORT_FEAT_C_SUSPEND:
369 ret = admhc_port_write(ahcd, wIndex, ADMHC_PS_PSSC);
370 break;
371 case USB_PORT_FEAT_C_OVER_CURRENT:
372 ret = admhc_port_write(ahcd, wIndex, ADMHC_PS_OCIC);
373 break;
374 case USB_PORT_FEAT_C_RESET:
375 ret = admhc_port_write(ahcd, wIndex, ADMHC_PS_PRSC);
376 break;
377 default:
378 goto error;
379 }
380 break;
381 case GetHubDescriptor:
382 ret = admhc_get_hub_descriptor(ahcd, buf);
383 break;
384 case GetHubStatus:
385 ret = admhc_get_hub_status(ahcd, buf);
386 break;
387 case GetPortStatus:
388 if (!wIndex || wIndex > ports)
389 goto error;
390 wIndex--;
391
392 ret = admhc_get_port_status(ahcd, wIndex, buf);
393 break;
394 case SetHubFeature:
395 switch (wValue) {
396 case C_HUB_OVER_CURRENT:
397 /* FIXME: this can be cleared, yes? */
398 case C_HUB_LOCAL_POWER:
399 break;
400 default:
401 goto error;
402 }
403 break;
404 case SetPortFeature:
405 if (!wIndex || wIndex > ports)
406 goto error;
407 wIndex--;
408
409 switch (wValue) {
410 case USB_PORT_FEAT_ENABLE:
411 ret = admhc_port_enable(ahcd, wIndex);
412 break;
413 case USB_PORT_FEAT_RESET:
414 ret = admhc_port_reset(ahcd, wIndex);
415 break;
416 case USB_PORT_FEAT_SUSPEND:
417 #ifdef CONFIG_USB_OTG
418 if (hcd->self.otg_port == (wIndex + 1)
419 && hcd->self.b_hnp_enable)
420 start_hnp(ahcd);
421 else
422 #endif
423 ret = admhc_port_write(ahcd, wIndex, ADMHC_PS_SPS);
424 break;
425 case USB_PORT_FEAT_POWER:
426 ret = admhc_port_write(ahcd, wIndex, ADMHC_PS_SPP);
427 break;
428 default:
429 goto error;
430 }
431 break;
432
433 default:
434 error:
435 /* "protocol stall" on error */
436 ret = -EPIPE;
437 }
438
439 return ret;
440 }
441
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